KR20170009724A - Laminated ceramic electronic component and method for manufacturing same - Google Patents

Abstract

The present invention provides a multilayer ceramic electronic component capable of ensuring fixing force between an external electrode and a multilayer body while having good adhesion between an internal electrode layer and the external electrode inside the multilayer body. According to the present invention, the electronic component comprises a rectangular parallelepiped-shaped multilayer body (12) on which a plurality of dielectrics layers (14) and a plurality of Internet electrode layers (16) are stacked, and external electrodes (22a, 22b) including base electrode layers (24a, 24b) and plating layers (26a, 26b) are formed on both cross sections of the multilayer body (12). When a cut surface including the base electrode layers (24a, 24b) is observed by focused ion beamscanning ion microscopy (FIBSIM), a plurality of Cu crystals and glass phases, and an average length of a boundary line of the Cu crystals having a different orientation is 3 m or less.

Description

TECHNICAL FIELD [0001] The present invention relates to a laminated ceramic electronic component and a method of manufacturing the same.

The present invention relates to a multilayer ceramic electronic component and a method of manufacturing the same. More particularly, the present invention relates to a multilayer ceramic electronic component including a multilayer body having a plurality of dielectric layers and a plurality of internal electrode layers stacked and an external electrode formed on an end face of the multilayer body so as to be electrically connected to the internal electrode layers Multilayer ceramic capacitors and the like, and a method of manufacturing the same.

As a small-sized multilayer ceramic electronic component, for example, a multilayer ceramic capacitor is available. The multilayer ceramic capacitor includes a body in which a dielectric layer and an internal electrode layer are alternately stacked. The internal electrode layers are formed so that the pair of internal electrode layers are alternately exposed at both end faces of the elementary body. One of the internal electrode layers alternately stacked is electrically connected to the inside of the terminal electrode formed so as to cover one end face of the elementary body. The other internal electrode layers alternately stacked are electrically connected to the inside of the terminal electrode formed so as to cover the other end face of the elementary body. In this manner, a capacitance is formed between the terminal electrodes formed at both ends of the elementary body (see Patent Document 1).

Japanese Laid-Open Patent Publication No. 2015-62216

In recent years, miniaturization of multilayer ceramic electronic parts is progressing gradually. In the case of a ceramic electronic device in which an internal electrode layer inside a laminate and an external electrode formed on an end face of the laminate are electrically connected, such as a multilayer ceramic capacitor, the contact area between the internal electrode layer and the external electrode is generally reduced , The bondability between the internal electrode layer and the external electrode deteriorates. Further, the contact area between the external electrode and the laminate becomes smaller, so that the bonding force between the external electrode and the laminate becomes weak.

SUMMARY OF THE INVENTION Accordingly, it is a primary object of the present invention to provide a multilayer ceramic electronic component in which the bonding property between the internal electrode layer and the external electrode in the laminate is good and a strong bonding force can be secured between the external electrode and the laminate.

The multilayer ceramic electronic component according to the present invention includes a stacked body in a rectangular parallelepiped shape,

The laminate has a first main surface and a second main surface facing each other in the stacking direction and a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction and having a plurality of laminated dielectric layers and a plurality of internal electrode layers, , A first cross-section and a second cross-section opposed to each other in the longitudinal direction orthogonal to the stacking direction and the width direction,

The dimension in the longitudinal direction is 0.25 mm or less, the dimension in the lamination direction is 0.125 mm or less, the dimension in the width direction is 0.125 mm or less,

A first outer electrode covering the first end face and extending from the first end face to cover the first main face, the second main face, the first side face and the second side face;

And a second external electrode covering the first end face, the second main face, the first side face, and the second side face by covering the second end face and extending from the second end face,

A first internal electrode layer connected to the first external electrode and a second internal electrode layer connected to the second external electrode are stacked in the stacking direction,

The first outer electrode and the second outer electrode include a plating layer and a base electrode layer,

The underlying electrode layer includes a plurality of Cu crystals and glass when the cut surface including the base electrode layer is observed with a scanning ion microscope,

The plurality of Cu crystals have different crystal orientations,

And an average crystal length of Cu crystals having different crystal orientations is 0.3 占 퐉 or more and 3 占 퐉 or less.

In the multilayer ceramic electronic device according to the present invention, at the cut surface including the multilayer body and the first external electrode or the second external electrode, the interface between the multilayer body and the first external electrode or the interface between the multilayer body and the second external electrode It is preferable that a plurality of Cu crystals and glass are in contact with the laminate at several places in the range of the external electrode of less than 탆 and the glass is in contact at more than 5 places.

In the multilayer ceramic electronic component according to the present invention, the base electrode layer preferably contains Al or Zr.

A method for manufacturing a multilayer ceramic electronic device according to the present invention is a method for manufacturing a multilayer ceramic electronic device including a first main surface and a second main surface facing each other in a stacking direction and a plurality of second main surfaces, Preparing a laminate having a first side face and a second side face and a first end face and a second end face facing each other in the longitudinal direction orthogonal to the lamination direction and the width direction;

Preparing a conductive paste containing Cu particles coated with Al, Zr or Ti;

And a step of applying a conductive paste to the first end face and the second end face of the multilayer body.

In the multilayer ceramic electronic component according to the present invention, by setting the average value of the lengths of the boundary lines of the Cu crystals contained in the base electrode layer to 0.3 mu m or more and 3 mu m or less, the probability of contact between the internal electrode layer thinned in the multilayer body and the Cu crystal So that good conductivity with the internal electrode can be obtained. And a plurality of second electrodes in a range of an outer electrode of less than 2 占 퐉 from the interface between the laminate and the first outer electrode and the interface between the laminate and the second outer electrode at the cut surface including the laminate, Of Cu crystals and glass are in contact with the laminate in several places and the glass is in contact with more than 5 places, so that the adhesion force between the external electrode and the laminate can be strengthened.

According to the present invention, it is possible to obtain a multilayer ceramic electronic component in which the bonding property between the internal electrode layer and the external electrode in the laminate is good and a strong bonding force can be secured between the external electrode and the laminate.

The above and other objects, features, and advantages of the present invention will become more apparent from the following description of the embodiments with reference to the accompanying drawings.

1 is a perspective view showing a multilayer ceramic capacitor as an example of the multilayer ceramic electronic component according to the present invention.
2 is a cross-sectional view taken along the line II-II of the multilayer ceramic capacitor shown in Fig.
3 is a cross-sectional view taken along the line III-III of the multilayer ceramic capacitor shown in Fig.
Fig. 4 shows an electron microscope photograph of a section of an example of the multilayer ceramic capacitor according to the present invention.

As shown in Figs. 1, 2 and 3, the multilayer ceramic capacitor 10 as an example of the multilayer ceramic electronic component includes, for example, a laminate 12 in the form of a rectangular parallelepiped. The stacked body 12 has a plurality of stacked dielectric layers 14 and a plurality of internal electrode layers 16. The laminate 12 further includes a first main surface 12a and a second main surface 12b facing each other in the stacking direction x and a second main surface 12b facing the first main surface 12b in the width direction y orthogonal to the stacking direction x. A first side face 12c and a second side face 12d and a first end face 12e and a second end face 12f opposite to each other in the longitudinal direction z orthogonal to the stacking direction x and the width direction y. It is preferable that the laminated body 12 has rounded corners and ridgelines. The corners are the intersections of three adjacent sides of the laminate, and the ridge lines are the intersections of two adjacent sides of the laminate.

A dielectric material of the dielectric layer 14 of the laminate 12 is, for example, _{BaTiO 3, CaTi O 3, SrTiO} 3 or CaZrO ₃ And the like can be used. Further, a compound such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound may be added to these components in a content range smaller than that of the main component. It is preferable that the dimension of the dielectric layer 14 in the stacking direction x is, for example, 0.3 m or more and 1.0 m or less.

As shown in Figs. 2 and 3, the dielectric layer 14 includes an outer layer portion 14a and an inner layer portion 14b. The outer layer portion 14a is located on the first main surface 12a side and the second main surface 12b side of the layered body 12 and includes the first main surface 12a and the inner electrode layer 16 close to the first major surface 12a And a dielectric layer 14 located between the second main surface 12b and the internal electrode layer 16 nearest to the second major surface 12b. And the region sandwiched between the two outer layer portions is the inner layer portion 14b. The dimension in the stacking direction of the outer layer portion 14a is preferably 15 占 퐉 or more and 20 占 퐉 or less. The dimension of the layered body 12 is preferably 0.05 mm to 0.32 mm in the longitudinal direction L, 0.025 mm or more and 0.18 mm or less in the width direction W, 0.025 mm or more in the thickness direction T 0.240 mm or less. The target value of each dimension is 0.25 mm or less in the longitudinal direction L, 0.125 mm or less in the width direction W, and 0.125 mm or less in the thickness direction T. The dimensions of the laminate can also be measured by a microscope.

2 and 3, the laminate 12 includes a plurality of first internal electrode layers 16a and a plurality of second internal electrode layers 16b (for example, ). A plurality of first internal electrode layers 16a and a plurality of second internal electrode layers 16b are buried so as to be alternately arranged at regular intervals along the stacking direction x of the stacked body 12. [

The one end side of the first internal electrode layer 16a has the lead-out electrode portion 18a drawn out to the first end face 12e of the multilayer body 12. The one end of the second internal electrode layer 16b has a lead electrode portion 18b drawn out to the second end face 12f of the layered body 12. [ Specifically, the lead electrode portion 18a on one end side of the first internal electrode layer 16a is exposed on the first end face 12e of the layered body 12. The lead electrode portion 18b on one end side of the second internal electrode layer 16b is exposed to the second end face 12f of the layered body 12.

The layered body 12 includes the counter electrode portion 20a in which the first internal electrode layer 16a and the second internal electrode layer 16b face each other in the inner layer portion 14b of the dielectric layer 14. [ The stacked body 12 also has the other end in the width direction W of the opposite electrode portion 20a between the one end of the width direction W and the first side face 12c and the opposing electrode portion 20a, (Hereinafter, referred to as "W gap") 20b formed between the two layers 12a and 12d. The stacked body 12 is formed so that the end portion of the first internal electrode layer 16a opposite to the drawing electrode portion 18a and between the second end face 12f and the drawing electrode portion 18b of the second internal electrode layer 16b (Hereinafter referred to as "L gap") 20c formed between the end portion of the laminated body 12 and the first end face 12e.

Here, the length of the L gap 20c at the end of the layered body 12 is preferably 20 占 퐉 or more and 40 占 퐉 or less. It is also preferable that the length of the W gap 20b on the side of the layered body 12 is 15 占 퐉 or more and 20 占 퐉 or less.

The internal electrode layer 16 contains, for example, a metal such as Ni, Cu, Ag, Pd, Ag-Pd alloy or Au. The internal electrode layer 16 may also include dielectric particles having the same composition as that of ceramics contained in the dielectric layer 14. The number of the internal electrode layers 16 is preferably 50 or less. The thickness of the internal electrode layer 16 is preferably 0.3 mu m or more and 1.2 mu m or less.

The external electrode 22 is formed on the first end face 12e side and the second end face 12f side of the layered body 12. The external electrode 22 has a first external electrode 22a and a second external electrode 22b.

A first external electrode 22a is formed on the side of the first end face 12e of the layered body 12. [ The first external electrode 22a covers the first end face 12e of the multilayer body 12 and extends from the first end face 12e to form the first major face 12a, the second major face 12b, the first side face 12c And a portion of the second side face 12d. In this case, the first external electrode 22a is electrically connected to the extraction electrode portion 18a of the first internal electrode layer 16a.

And a second external electrode 22b is formed on the side of the second end face 12f of the layered body 12. [ The second outer electrode 22b covers the second end face 12f of the layered body 12 and extends from the second end face 12f to form the first main face 12a, the second main face 12b, the first side face 12c And a portion of the second side face 12d. In this case, the second external electrode 22b is electrically connected to the extraction electrode portion 18b of the second internal electrode layer 16b.

In the stacked body 12, the first internal electrode layer 16a and the second internal electrode layer 16b face each other through the dielectric layer 14 in each counter electrode portion 20a, thereby forming a capacitance. Therefore, a capacitance can be obtained between the first external electrode 22a to which the first internal electrode layer 16a is connected and the second external electrode 22b to which the second internal electrode layer 16b is connected. Therefore, the multilayer ceramic electronic component having such a structure functions as a capacitor.

As shown in Fig. 4, the first external electrode 22a has a base electrode layer 24a and a plating layer 26a in this order from the laminate body 12 side. Likewise, the second external electrode 22b has a base electrode layer 24b and a plating layer 26b, in this order from the side of the layered structure 12.

The base electrode layers 24a and 24b each include at least one selected from a bake layer, a resin layer, and a thin film layer. However, since the present invention relates to the bake layer, the base electrode layers 24a and 24b Explain.

The baking layer includes a glass containing Si and Cu as a metal. The baking layer is formed by baking a conductive paste containing glass and a metal applied to the laminate 12 and baking the dielectric layer 14 and the internal electrode layer 16 after baking. The thickness of the thickest part of the baking layer is preferably 5 占 퐉 or more and 25 占 퐉 or less.

A resin layer containing conductive particles and a thermosetting resin may be formed on the baking layer. The thickness of the thickest portion of the resin layer is preferably 5 占 퐉 or more and 25 占 퐉 or less. At least one kind selected from Cu, Ni, Sn, Ag, Pd, Ag-Pd alloy, Au and the like is used as the plating layers 26a and 26b.

The plating layers 26a and 26b may be formed by a plurality of layers. Layer structure of an Ni plated layer formed on the baking layer and a Sn plated layer formed on the Ni plated layer. The Ni plating layer is used for preventing the underlying electrode layers 24a and 24b from being eroded by the solder when the multilayer ceramic electronic component is mounted, and the Sn plating layer improves the wettability of the solder when the multilayer ceramic electronic component is mounted So that it can be easily mounted.

The thickness per layer of the plated layer is preferably 1 탆 or more and 8 탆 or less.

The dimension of the layered body 12 is preferably 0.18 mm or more and 0.32 mm or less in the longitudinal direction L, 0.09 mm or more and 0.18 mm or less in the width direction W, and 0.09 mm or less in the thickness direction T Or more and 0.240 mm or less. The target value of each dimension is 0.25 mm or less in the longitudinal direction (L), 0.125 mm or less in the width direction (W), and 0.125 mm or less in the thickness direction (T). The dimensions of the laminate can be measured by a micrometer.

The average thickness of each of the plurality of conductor layers and the plurality of dielectric layers is measured as follows. First, the multilayer ceramic capacitor 10 is polished so that the multilayer body is exposed so that a cut surface (hereinafter referred to as "LT cut surface") including the longitudinal direction L and the thickness direction T is exposed. By observing this LT cut surface with a scanning electron microscope, the thickness of each part is observed. In this case, the thickness is measured on a total of five lines passing through the center of the cut surface of the laminate 12, along the center line along the thickness direction T and two lines extending from the center line to both sides. The average value of these five measurements is the average thickness of each part. In order to obtain a more accurate average thickness, the five measured values are obtained for each of the upper, middle, and lower portions in the thickness direction T, and the average value of these measured values becomes the average thickness of each portion.

Next, a manufacturing process of the multilayer ceramic capacitor 10 will be described. First, a dielectric sheet and a conductive paste for internal electrodes are prepared. The dielectric sheet and the conductive paste for internal electrodes include a binder and a solvent, but known organic binders and organic solvents can be used.

On the dielectric sheet, for example, a conductive paste for internal electrodes is printed in a predetermined pattern by screen printing, gravure printing, or the like, thereby forming an internal electrode pattern.

In addition, a predetermined number of outer-layer dielectric sheets on which no internal electrode pattern is formed are stacked in a predetermined number, dielectric sheets on which internal electrodes are formed are sequentially stacked, and a predetermined number of outer-layer dielectric sheets are laminated thereon.

The obtained laminated sheet is pressed in the lamination direction by means of an hydrostatic press or the like to produce a laminated block.

Next, the laminated block is cut to a predetermined size, and the laminated chip is cut. At this time, the corner portions and ridgeline portions of the multilayer chip may be rounded by barrel polishing or the like.

Further, the laminate is fired to produce a laminate. The firing temperature at this time depends on the material of the dielectric and the internal electrode, but is preferably 900 ° C or more and 1300 ° C or less.

A conductive paste for external electrodes is applied to both end faces of the obtained laminate 12 and baked to form a baking layer for the external electrode. At this time, the baking temperature is preferably 700 ° C or higher and 900 ° C or lower.

A Cu powder is contained in the conductive paste for the external electrode, and the Cu powder is formed by a liquid phase reduction method. And the size of the Cu powder is specified to be 50% of the total amount of the Cu powder which is distributed at a particle size of 0.2 μm or more and 2 μm or less. The Cu powder preferably contains an oxide of Al and is preferably coated with an oxide such as Zr.

When the conductive paste is baked, the inner electrode layer 16 of the layered body 12 and the Cu crystal in the external electrode are brought into contact with each other, so that the internal electrode layer 16 and the external electrode 22 are electrically connected. Therefore, in order for the Cu crystals of the external electrode 22 and the lead electrode portions 18a and 18b of the internal electrode layer to easily contact each other, it is advantageous that the Cu crystal in the external electrode 22 is small.

In order to reduce the Cu crystal in the external electrode 22, the sintering speed of the conductive paste for external electrodes is preferably slow. Therefore, it is preferable that oxides are dotted around the Cu powder in the conductive paste or inside the Cu powder. Such an oxide is an oxide of Zr, Al, Ti, or Si, and particularly preferably an oxide of Zr.

If necessary, the surface of the baking layer of the conductive paste for external electrodes is plated. Zr, Al, and Ti included in the external electrode can be detected by Dynamic-SIMS. Zr exists at the crystal interface between the Cu crystals and at the interface between the Cu crystal and the glass. It is possible to slow down the sintering speed with Zr, and it becomes easy to match the softening behavior of Cu and glass.

With respect to the thus-obtained multilayer ceramic capacitor 10, the Cu crystal in the external electrode 22 can be observed as follows.

First, the multilayer ceramic capacitor 10 is polished so that the LT cut surface including the external electrode 22 is exposed. It is also preferable to remove the metal deflection so that the metal outer electrode 22 is not sagged by polishing. The cut surfaces including the base electrode layers 24a and 24b are cut out as thin flakes by a focused ion beam (hereinafter, FIB), and picked up by a scanning ion type electron microscope (hereinafter SIM).

Among the crystals of Cu, Cu crystals having different crystal orientations appear different on the SIM. When the contrasts are all the same, the contrast is adjusted. The crystal length is calculated by drawing a virtual line approximately parallel to the end face of the layered body 12 by 30 占 퐉 and dividing the length of the imaginary line by the number of crystals overlapping with the imaginary line. Next, the crystal lengths of three portions on the SIM are calculated, and the average value is defined as the average crystal length. In this multilayer ceramic capacitor 10, the average crystal length of the Cu crystal is set to 3 m or less so that the contact performance between the internal electrode layer 16 and the external electrode 22 is improved, and the conductive performance between the internal electrode and the external electrode Can be improved.

Further, by drawing a virtual line 30 mu m substantially parallel to the range of less than 2 mu m from the first end face 12e and the second end face 12f of the layered body 12 and counting the number of the glass existing on the straight line, It can be seen how much the glass contained in the underlying electrode layers 24a and 24b is in contact with the layered product 12. [ When the number of the glass is five or more, the fixing strength of the base electrode layers 24a and 24b and the laminate 12 becomes strong. However, even if the number of the glass is 5 or more and the fixing force is strong, if the number of the Cu crystals is less than 5, the connectivity between the external electrode 22 and the internal electrode layer 16 becomes worse. Therefore, the number of the glass and the number of the Cu crystals are five or more, respectively, so that the connection with the internal electrode layer can be improved and a good fixing force can be ensured. In addition, the total number of glass and Cu crystals is limited to 15.

Such an effect will be apparent from the following examples.

(Experimental Example 1)

A multilayer ceramic capacitor was produced using the above-described manufacturing method. 30 multilayer ceramic capacitors of four patterns each having an average length of Cu crystals included in the external electrode of 0.3 mu m or more and 3 mu m or less as target values were fabricated as Examples 1 to 4. A multilayer ceramic capacitor in which the average length of the Cu crystals included in the external electrode is 5 mu m as the target value, and two patterns in the multilayer ceramic capacitor in which the average length of the Cu crystals included in the external electrodes is 0.1 mu m as the target value Were prepared, respectively, to give Comparative Example 1 and Comparative Example 2, respectively. The evaluation of the connectivity with the internal electrode layer was carried out by measuring 30 electrostatic capacities and calculating the CV value of the electrostatic capacity. The CV value of 5% or more was evaluated as "NG " It was evaluated as "G". Similarly, 100 multilayer ceramic capacitors of four patterns each having an average length of the length of Cu crystals included in the external electrode of 0.3 占 퐉 or more and 3 占 퐉 or less as target values were made to be Examples 1 to 4, respectively. A multilayer ceramic capacitor having an average length of 5 mu m as an average length of the length of Cu crystals included in the external electrode, a multilayer ceramic capacitor having an average length of 0.1 mu m as an average length of the length of Cu crystals contained in the external electrode, Were prepared, respectively, to give Comparative Example 1 and Comparative Example 2, respectively. Likewise, when external electrodes are inspected for external defects in evaluation of defects in the external electrodes and foaming occurs on the surface of the external electrodes, defecation of the external electrodes is insufficient, NG ". In the case where there is no bubble-like swelling on the surface of the external electrode, there is no defect and it is determined as "G ". The results are shown in Table 1. If the average length of the Cu crystals is reduced to 0.1 mu m, the number of Cu crystals in the external electrode becomes excessive and the degreasing property is lowered, thereby causing structural defects in the external electrode. Therefore, it is not possible to evaluate the connectivity with the internal electrode layer.

(Experimental Example 2)

A multilayer ceramic capacitor was produced using the above-described production method, and other evaluations were conducted. The number of contacts of the glass contained in the external electrode with the stacked body and the number of contacts of the Cu crystals included in the external electrode with the stacked body are 5 or more as a target value and 5 or more as a target value Respectively. After the fabrication, the connection to the internal electrode layer and the fixability of the laminate and the external electrode were evaluated. Evaluation of the connectivity of the internal electrode layers was the same as in Experimental Example 1. The fixation with the external electrode was evaluated as follows. On the substrate, a solder of product name SA C305, manufactured by SENJU KINZAKKO CHEMICAL CO., LTD., Was printed with a thickness of 20 탆. Next, a multilayer ceramic capacitor was mounted on a substrate by solder mounting, and a horizontal pushing test was performed in which the multilayer ceramic capacitor was pressed beside the multilayer ceramic capacitor in parallel with the substrate. It was judged to be "NG " when the horizontal pushing force was gradually increased from 0 N to 0.5 N, and one of the ten multilayer ceramic capacitors in which the laminate and the external electrode were peeled off was found. The results are shown in Table 2. Further, only the laminate was broken by the horizontal pushing test, and the case where the laminate was adhered to the external electrode was defined as "G ".

10: Multilayer Ceramic Capacitor 12: Laminate
12a: first main surface 12b: second main surface
12c: first side 12d: second side
12e: first end face 12f: second end face
14: dielectric layer 14a: outer layer portion
14b: inner layer portion 16: inner electrode layer
16a: first internal electrode layer 16b: second internal electrode layer
18a, 18b: lead-out electrode portion 20a: opposing electrode portion
20b: W gap 20c: L gap
22: external electrode 22a: first external electrode
22b: second outer electrode 24a, 24b: base electrode layer
26a and 26b:

Claims (4)

A laminate in a rectangular parallelepiped shape,
Wherein the laminate has a first main surface and a second main surface facing each other in the stacking direction and a first side facing the width direction orthogonal to the stacking direction and a second main surface facing the first main surface, Two side faces and a first end face and a second end face facing each other in the longitudinal direction orthogonal to the stacking direction and the width direction,
The dimension in the longitudinal direction is 0.25 mm or less, the dimension in the stacking direction is 0.125 mm or less, the dimension in the width direction is 0.125 mm or less,
A first external electrode covering the first end face and extending from the first end face to cover the first main face, the second main face, the first side face, and the second side face;
And a second external electrode covering the second end face and extending from the second end face to cover the first main face, the second main face, the first side face, and the second side face,
A first internal electrode layer connected to the first external electrode and a second internal electrode layer connected to the second external electrode are stacked in the stacking direction,
Wherein the first external electrode and the second external electrode include a plating layer and a base electrode layer,
Wherein the base electrode layer includes a plurality of Cu crystals and a glass when a cut surface including the base electrode layer is observed with a scanning ion microscope,
Wherein the plurality of Cu crystals have different crystal orientations,
Wherein an average crystal length of Cu crystals having different crystal orientations is 0.3 占 퐉 or more and 3 占 퐉 or less. The method according to claim 1,
And the second outer electrode is formed on the interface between the laminate and the first outer electrode or on the interface between the laminate and the second outer electrode at a cut surface including the laminate and the first outer electrode or the second outer electrode, Wherein the plurality of Cu crystals and the glass are in contact with the laminate at a plurality of places in a range of external electrodes, and the glass is in contact with at least five places. 3. The method according to claim 1 or 2,
Wherein the base electrode layer contains Al or Zr. A first main surface and a second major surface facing each other in a stacking direction and having a plurality of stacked dielectric layers and a plurality of internal electrode layers, a first side surface and a second side opposed to each other in a width direction perpendicular to the stacking direction, And a first cross-section and a second cross-section opposed to each other in a longitudinal direction perpendicular to the width direction,
Preparing a conductive paste containing Cu particles coated with Al, Zr or Ti;
And applying the conductive paste to the first end face and the second end face of the laminate.

Images