KR20160087176A - Printed circuit board and method of manufacturing the same - Google Patents

Abstract

Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board comprises: a plurality of build-up layers on which a circuit layer and an insulation layer to cover the circuit layer are successively stacked; and a glass layer configured to come into contact with the build-up layer placed on the lowermost position among the plurality of build-up layers and touch the bottom surface of the circuit layer which is included on the build-up layer placed on the lowermost position. The purpose of the present invention is to provide a printed circuit board configured to easily implement a micro circuit and prevent warpage deformation.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a printed circuit board (PCB)

The present invention relates to a printed circuit board, and more particularly, to a printed circuit board including a glass member and a method of manufacturing the same.

Printed circuit boards (PCBs) are circuit boards that are wired on an insulated substrate. Recent trends in thinning and densification of electronic products have led to demand for thinner printed circuit boards. Studies on multilayering and micro-circuit implementation are underway.

Conventionally, a printed circuit board builds up a circuit on both sides of a base substrate, and a solder resist made of a mixture of a polymer material and an inorganic filler is applied to the outermost periphery. Then, the solder resist is partly opened to expose the pad, and a solder ball is formed to electrically connect the pad to an external circuit such as a semiconductor chip.

However, as the substrate becomes thinner, the substrate is bent due to various environmental factors.

That is, the polymer material constituting the solder resist or the interlayer insulating layer inside the substrate has a coefficient of thermal expansion of about 40 ppm / ° C, and particularly, it is mismatched with the wiring metal and progressed under high temperature conditions such as reflow The substrate may be lifted or the entire substrate may be warped.

In addition, in the case of a polymer material, a modulus value indicating a force required to deform a constant length is only about 2 to 5 GPa, which causes deformation even in a weak impact in a chip mounting process.

Patent Document 1: JP-A-2009-239224 Patent Document 2: JP-A-2003-282774

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and it is an object of the present invention to provide a printed circuit board which is easy to implement a microcircuit and does not cause bending deformation by providing a member made of a glass material on the outermost layer of the substrate, SUMMARY OF THE INVENTION

According to an aspect of the present invention, there is provided a substrate having a glass member on one side thereof. The substrate is provided so as to contact a plurality of buildup layers and a buildup layer positioned at the lowermost portion of the plurality of buildup layers, And a glass layer in contact with the circuit layer included in the buildup layer located at the lowermost portion.

Wherein a protective member is further provided on an outer surface of the glass layer, or an insulating film is further formed on a surface of the glass layer, or a portion adjacent to a side surface of the build-up layer is removed from the glass layer, A substrate can be provided.

In order to achieve the above object, another embodiment of the present invention is a substrate provided with glass members on both sides thereof, wherein the plurality of buildup layers are provided so as to be in contact with a buildup layer located at the top of the plurality of buildup layers An upper glass layer on which a cavity for exposing a part of a circuit layer included in the uppermost build-up layer is formed, and a build-up layer provided so as to be in contact with a lowermost build-up layer in the plurality of build- And a lower glass layer on which a cavity for exposing a part of the circuit layer included in the upper layer is formed.

According to the present invention, the coefficient of thermal expansion of the entire substrate is reduced, and deformation such as substrate warpage does not occur.

In addition, according to the present invention, moisture penetration into the inside of the substrate is prevented, and no interlayer lifting problem occurs.

Further, according to the present invention, it is possible to realize a fine circuit without occurrence of defects such as pattern deterioration.

1 is a cross-sectional view of a printed circuit board according to a first embodiment of the present invention;
2 is a sectional view of a printed circuit board according to a second embodiment of the present invention
3 is a sectional view of a printed circuit board according to a third embodiment of the present invention
4 is a cross-sectional view of a printed circuit board according to a fourth embodiment of the present invention
5 is a cross-sectional view of a printed circuit board according to a fifth embodiment of the present invention
6 is a cross-sectional view of a printed circuit board according to a sixth embodiment of the present invention
7 is a cross-sectional view of a printed circuit board according to a seventh embodiment of the present invention
8 is a cross-sectional view of a printed circuit board according to an eighth embodiment of the present invention
9 to 25 are process drawings showing a method for manufacturing a printed circuit board of the present invention
26 to 31 are process drawings showing a method for manufacturing a printed circuit board according to another embodiment of the present invention

The advantages and features of the present invention and the techniques for achieving them will be apparent from the following detailed description taken in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. The present embodiments are provided so that the disclosure of the present invention is not only limited thereto, but also may enable others skilled in the art to fully understand the scope of the invention.

The terms used herein are intended to illustrate the embodiments and are not intended to limit the invention. In this specification, the singular forms include plural forms unless otherwise specified in the text. Further, elements, steps, operations, and / or elements mentioned in the specification do not preclude the presence or addition of one or more other elements, steps, operations, and / or elements.

On the other hand, the constituent elements of the drawings are not necessarily drawn to scale, and for example, the sizes of some constituent elements of the drawings may be exaggerated relative to other constituent elements to facilitate understanding of the present invention. Like reference numerals refer to like elements throughout the drawings, and for purposes of simplicity and clarity of illustration, the drawings illustrate a general manner of organization and are not intended to unnecessarily obscure the discussion of the described embodiments of the present invention Detailed descriptions of known features and techniques may be omitted so as to avoid obscuring the invention.

Hereinafter, the configuration and operation effects of the present invention will be described in more detail with reference to the accompanying drawings.

1 is a cross-sectional view of a printed circuit board according to a first embodiment of the present invention.

Referring to FIG. 1, the printed circuit board 100 of this embodiment includes a build-up layer 110 stacked in a plurality of layers and a glass layer 120 stacked on the outermost layer.

The build-up layer 110 includes a circuit layer 111 and an insulating layer 112 covering the circuit layer 111 in this order. In the present embodiment, the build-up layer 110 is composed of two layers, but the number of layers may be more than that according to a required specification. In addition, although not shown in detail to show only the gist of the invention, the circuit layers 111 of each layer may be electrically connected via vias.

The circuit layer 111 includes a pad which is wired according to a previously designed pattern with a metal wire for transmitting an electric signal and serves as a connection point with an external structure such as a semiconductor chip or a main board. In order to secure connection reliability, the pad is generally formed in a circular plane shape having a diameter of several tens of micrometers, and a solder ball is attached thereon.

Therefore, for stable signal transmission, the circuit layer 111 may be formed of a metal such as Ag, Pd, Al, Ni, Ti, Au, Cu) and platinum (Pt) may be used.

The circuit layer 111 may be formed using a conventional plating process known in the art such as a Semi-Additive Process (SAP), a Modified Semi-Additive Process (MSAP), or a Subtractive The circuit layer 111 includes a base seed layer 111a and a plating layer 111b formed by growing a metal on the seed layer 111a.

Since the insulating layer 112 is thicker than the circuit layer 111, the circuit layers 111 of each layer are interlayer-insulated by the insulating layer 112, and in particular, the insulating layer 112 stacked on the uppermost layer And functions as a solder resist for preventing the solder ball from adhering to an unnecessary portion and preventing the circuit layer 111 from being deteriorated by oxygen or moisture.

Therefore, the insulating layer 112 may be formed of a polymer resin having excellent heat resistance, solvent resistance, and chemical resistance as well as electrical insulation, such as epoxy resin, phenol resin, urethane resin, silicone resin, polyimide resin, A prepreg impregnated with a reinforcing material such as an inorganic filler, or the like can be used.

However, as the content ratio of the reinforcing material increases, the ratio of the resin decreases, and thus the adhesion with the circuit layer 111 may be reduced. Further, since the glass transition temperature (Tg) of the resin generally falls below the reflow temperature (approximately 260 캜), deformation such as substrate warpage is likely to occur.

The glass layer 120 serves as a means for preventing the glass layer 120 from contacting the buildup layer 110 located at the lowermost part and thus the circuit layer 111 included in the buildup layer 110 located at the lowermost part, The circuit layer 111 is covered.

The bottom surface of the bottom layer 111 is exposed to the outside of the insulating layer 112 so that the glass layer 120 is exposed on the bottom surface of the circuit layer 111, .

That is, the glass layer 120 is located at the outermost portion of the substrate and functions as a solder resist for protecting the circuit layer 111 from the outside, and serves as a supporting layer of the circuit layer 111 located at the lowermost portion. In other words, the lowermost circuit layer 111 is formed on the glass layer 120 as a support base through a plating process. The effect of this will be described in detail in the following manufacturing method.

A cavity 120a for attaching the solder ball is formed on the glass layer 120. A portion of the circuit layer 111 located at the lowermost portion through the cavity 120a is exposed to the outside.

In this case, since the circuit layer 111 is composed of the seed layer 111a and the plating layer 111b formed on the seed layer 111a, the metal exposed through the cavity 120a may be a seed layer So that the solder ball formed in the cavity 120a comes into contact with the seed layer 111a.

As described above, since the printed circuit board 100 of the present invention uses the glass layer 120 having a low thermal expansion coefficient (about 3.2 ppm / ° C) and high rigidity (about 75 GPa) as the solder resist, The occurrence can be reduced.

The polymer material as a main component of the insulating layer 112 generally has a moisture absorption rate of 0.1 to 1.0%. When moisture is absorbed and then subjected to a high-temperature process, lifting of the substrate occurs due to pressure due to rapid expansion of water . However, since the moisture absorption rate of the glass material is close to 0%, the problem of lifting due to moisture absorption can be solved when the glass layer 120 is used as in the present invention.

2 is a cross-sectional view of a printed circuit board according to a second embodiment of the present invention.

Since the brittleness is weak in the case of glass, exposure to the outside is highly likely to be damaged in the process of manufacturing the substrate or the chip mounting process. Accordingly, in order to prevent breakage of the glass layer 120 due to external force, the present invention provides a printed circuit board 100 having a protection member 130 formed on the outer surface of the glass layer 120, as shown in FIG. do.

Here, the 'outer surface' of the glass layer 120 means a surface exposed to the outside except for the bonding surface with the insulating layer 112. Although the protective member 130 is formed on only the lower surface of the glass layer 120 in the drawing, the protective member 130 may be formed on both sides including the lower surface of the glass layer 120, As shown in FIG. However, the protection member 130 is formed with a hole at a position corresponding to the cavity 120a so that the circuit layer 111 can be opened.

The protective member 130 may be formed of a thin film formed of a plastic film or a plasma-coated laminate, or a sheet of a predetermined thickness containing a polymer resin having excellent elasticity as a main component.

3 is a cross-sectional view of a printed circuit board according to a third embodiment of the present invention.

Referring to FIG. 3, the printed circuit board 100 according to the present embodiment has a structure in which an insulating film 140 is further formed on the laminated surface of the glass layer 120, that is, the bonding surface with the insulating layer 112.

In the case of glass, since the surface roughness value is small, the adhesion with the circuit layer 111 can be reduced. In order to solve this problem, it is possible to perform surface treatment such as plasma, ion beam and chemical pretreatment on the glass surface. In this embodiment, the insulating layer 140 is applied to the glass layer 120, and the circuit layer 111 is formed thereon You may. Here, the cavity 120a is formed to penetrate to the insulating film 140 below the cavity 120a so that a part of the circuit layer 111, that is, the pad, may be exposed.

The polymeric resin, which is a constituent material of the insulating film 140, And has a surface roughness of about 0.1 to 0.7 mu m, so that adhesion with the circuit layer 111 is enhanced.

4 is a cross-sectional view of a printed circuit board according to a fourth embodiment of the present invention.

In this embodiment, a printed circuit board 100 is shown in which the side surface of the glass layer 120, that is, the side adjacent to the side surface of the build-up layer 110, is removed. Accordingly, the glass layer 120 has a shorter length than the build-up layer 110, and both ends of the glass layer 120 enter into the substrate when viewed from the side of the substrate.

Such a structure is for preventing breakage of the glass layer 120 at the time of cutting, and a detailed description thereof will be described in the manufacturing method described later.

In the above description, only the structure in which the glass member is provided on only one side of the substrate is shown. However, when the thermal deformation of the substrate is large, the glass member may be provided on both sides of the substrate. do.

5 is a cross-sectional view of a printed circuit board according to a fifth embodiment of the present invention.

5, the printed circuit board 200 of the present embodiment includes a plurality of build-up layers 210 in which a circuit layer 211 and an insulating layer 212 covering the circuit layer 211 are stacked in order, The upper glass layer 222 provided to be in contact with the uppermost buildup layer 210 and the lower glass layer 221 provided in contact with the buildup layer 210 located at the lowermost part are provided with two glass Member exists.

The upper glass layer 222 and the lower glass layer 221 function as a solder resist which is located at the outermost portion of the substrate and protects the circuit layer 111 from the outside, and in the case of the lower glass layer 221, Directly contacts the base surface of the circuit layer 111 located on the substrate 111, and serves as a support base thereof.

A cavity 222a is formed in the upper glass layer 222 to expose a part of the circuit layer 211 located at the uppermost portion, for example, a pad. Similarly, the lower glass layer 221 is provided with a circuit layer 211 For example, a pad is exposed.

The cavity 222a formed in the upper glass layer 222 is formed to penetrate to the underlying insulating layer 212 and the circuit layer 211 is formed on the seed layer 211a and the seed layer 211a And the plating layer 211b, the metal exposed to the outside through the cavity 222a becomes the plating layer 211b.

The bottom surface of the circuit layer 211 is in contact with the lower glass layer 221 so that the metal exposed to the outside through the cavity 221a formed in the lower glass layer 221 is in contact with the seed layer 211a ).

6, 7, and 8 are sectional views of a printed circuit board according to a sixth embodiment, a seventh embodiment, and an eighth embodiment of the present invention, respectively.

A protective member 230 is provided on the outer surfaces of the upper glass layer 222 and the lower glass layer 221 in order to protect the upper glass layer 222 and the lower glass layer 221 from an external force Thereby providing a printed circuit board 200 that is further formed. Holes are formed in the respective protective members 230 at positions corresponding to the cavities 221a and 222a so that the circuit layer 211 can be opened.

The insulating layer 240 is further formed on the laminated surface of the lower glass layer 221, that is, the bonding surface of the lower glass layer 221 with the insulating layer 212, in order to enhance adhesion with the circuit layer 211, (200). Here, the cavity 221a formed in the lower glass layer 221 is formed to penetrate to the insulating film 240 below the lower glass layer 221 so that a part of the circuit layer 211 can be exposed.

The polymeric resin, which is a constituent material of the insulating film 240, is strong in adhesion, It has a surface roughness of about 0.1 to 0.7 탆 and enhances adhesion with the circuit layer 211. All

In the eighth embodiment, in order to prevent breakage of the glass during cutting, it is preferable that the side surface of the upper glass layer 222 and the lower glass layer 221, that is, the portion adjacent to the side surface of the build- The printed circuit board 200 of FIG.

The upper glass layer 222 and the lower glass layer 221 have a length shorter than that of the build-up layer 210 and are disposed at both ends of the upper glass layer 222 and lower glass layer 222, 221 are formed into the inside of the substrate.

Now, a method for manufacturing a printed circuit board of the present invention will be described.

9 to 25 are process drawings showing a method for manufacturing a printed circuit board of the present invention.

In order to manufacture the printed circuit board of the present invention, first, a lower glass layer 221 is prepared (FIG. 9).

Next, a step of forming a plurality of build-up layers 210 is performed by sequentially laminating a circuit layer 211 and an insulating layer 212 covering the circuit layer 211 on the lower glass layer 221 .

To this end, a copper seed layer 211a is formed on the lower glass layer 221 (FIG. 10), and the seed layer 211a is electrolytically plated with a lead wire to form a plating layer 211b of a predetermined pattern ( 11). Then, when the unnecessary portion of the seed layer 211a is etched, the circuit layer 211 is formed (FIG. 12), and the insulating layer 212 is formed to cover the circuit layer 211 by a method such as spin coating One buildup layer 210 is completed (FIG. 13).

Here, when the bottom surface of the circuit layer 211 is roughened (that is, when the value of the surface roughness is large), a large amount of etchant is required to remove the seed layer, which causes undercut, May be caused.

However, in the case of the lower glass layer 221 used as the bottom surface of the circuit layer 211 in the present invention, The seed layer can be completely removed even under weak etching conditions because it has a very smooth surface around 0.01 mu m, and as a result, a fine circuit can be realized.

The buildup layer 210 is laminated to the required number of layers (Fig. 14), and the insulating layer 212 stacked on the uppermost portion is subjected to cavity processing so that the circuit layer 211, specifically the part of the plating layer 211b, .

Next, the process of forming the cavity 221a in the lower glass layer 221 completes a printed circuit board on which solder resist of a glass member is formed on one side of the substrate (FIG. 15). Alternatively, when the upper glass layer 222 is laminated on the build-up layer 210 located at the uppermost position after the build-up layer 210 is formed and the cavity 222a is formed in the upper glass layer 222, The solder resist of the glass member is formed on the printed circuit board (Fig. 16).

Here, the processing of the cavities 221a and 222a can be performed by using a facility such as a CO ₂ laser or a YAG laser or through an etching process.

First, a photosensitive resist 10 is attached to the outer peripheral surface of the build-up layer 210 including the lower glass layer 221 (FIG. 17). 18). When the etchant is supplied to the open portion, the cavity 221a is formed at a desired position, and then the resist is removed (Fig. 19).

When the lower glass layer 221 is formed, a protection member 230 may be further formed on the outer surface of the lower glass layer 221 to prevent glass breakage (only the lower glass layer 221 is formed However, the upper glass layer 222 may also be applied to the upper glass layer 222, which is the same for other embodiments.

The protection member 230 may be formed by removing a portion of the protection member 230 such that the cavity 221a is opened after the protection member 230 is attached when the cavity 221a is processed, The protective member 230 may be attached to the lower glass layer 221 before processing and then the protective member 230 may be simultaneously passed through the lower glass layer 221 (FIG. 21).

3, a method of manufacturing a printed circuit board according to an embodiment of the present invention includes the steps of forming an insulating layer 240 on a lower glass layer 221 before forming a buildup layer 210, (Fig. 22).

The insulating layer 240 may be formed by a conventional deposition method or a solvent process such as spin coating, dip coating, doctor blading, screen printing, inkjet printing, or thermal transfer, The buildup layer 210 is formed on the insulating layer 240 thus formed. The method of forming the build-up layer 210 on the insulating film 240 is the same as the method of forming the build-up layer 210 on the lower glass layer 221 (FIGS. 9 to 14) The bar is omitted here.

When the strip substrate is completed as shown in FIG. 23, a cutting process (routing process) is performed in which the substrate is cut into unit substrates using a blade, a laser, or a bit to fit the size of the product At this time, cracks are generated in the cut surface due to the characteristic of the glass material having weak brittleness, and this is transferred by tensile stress at high temperature, so that the entire lower glass layer 221 can be broken.

In order to prevent this, the present invention may further include a step of removing a portion where the cutting line L passes through the lower glass layer 221 before cutting (FIG. 24).

The removal process may be performed using an equipment such as a CO ₂ laser or a YAG laser or an etching process as in the case of processing the cavity 221 a.

As shown in FIG. 25, when the portion of the lower glass layer 221 passing through the cutting line L is first removed, the strip substrate can be stably unitized without cracks.

26 to 31 are process drawings illustrating a method of manufacturing a printed circuit board according to another embodiment of the present invention.

In this embodiment, two substrates are simultaneously manufactured using two lower glass layers 221, and the other method is similar to the above-described embodiment.

That is, the two lower glass layers 221 are adhered to each other with the lower faces facing each other (FIG. 26) through the adhesive 20, and a plurality of buildup layers 210 are formed on the upper surface of each lower glass layer 221 (Fig. 27).

Then, the adhesive 20 is removed to separate the two lower glass layers 221 (Fig. 28), and the cavities 221a are formed in the respective lower glass layers 221 (Fig. 29).

The processing of the cavity 120a can be performed using a facility such as a CO ₂ laser or a YAG laser or through an etching process. Since the etching process has been described above, a detailed description will be omitted.

When the protective member 230 is attached to the separated surface in a state where the two lower glass layers 221 are separated and the protective member 230 is passed through the lower glass layer 221 together with the lower glass layer 221, A plurality of printed circuit boards according to the example can be manufactured.

The insulating layer 240 is formed on the upper surface of each lower glass layer 221 before the build-up layer 210 is formed (FIG. 30) Can be manufactured.

In addition, a plurality of printed circuit boards according to the embodiment of FIG. 4 can be manufactured by cutting off the lower glass layer 221 where the cut line L passes through the separated two strip substrates, and then performing the cutting process .

The upper glass layer 222 is laminated on the uppermost insulating layer 212 before the two lower glass layers 221 are separated (FIG. 31) When the cavities 221a and 222a are formed in the upper glass layer 222, a plurality of printed circuit boards according to the embodiment of FIG. 5 can be manufactured.

The foregoing detailed description is illustrative of the present invention. It is also to be understood that the foregoing is illustrative and explanatory of preferred embodiments of the invention only, and that the invention may be used in various other combinations, modifications and environments. That is, it is possible to make changes or modifications within the scope of the concept of the invention disclosed in this specification, the disclosure and the equivalents of the disclosure and / or the scope of the art or knowledge of the present invention. The foregoing embodiments are intended to illustrate the best mode contemplated for carrying out the invention and are not intended to limit the scope of the present invention to other modes of operation known in the art for utilizing other inventions such as the present invention, Various changes are possible. Accordingly, the foregoing description of the invention is not intended to limit the invention to the precise embodiments disclosed. It is also to be understood that the appended claims are intended to cover such other embodiments.

100, 200: printed circuit board according to the present invention
111, 211: circuit layer
111a and 211a: a seed layer
111b and 211b:
112, 212: insulating layer
110, 210: Buildup layer
120: glass layer
221: Lower glass layer
222: upper glass layer
120a, 221a, 222a: cavity
130, 230: protective member
140, 240: insulating film

Claims (26)

A plurality of build-up layers in which a circuit layer and an insulating layer covering the circuit layer are alternately stacked; And
And a glass layer provided so as to be in contact with a buildup layer located at the lowermost part of the plurality of buildup layers and in contact with a base surface of a circuit layer included in the buildup layer positioned at the lowermost part.
The method according to claim 1,
Wherein the glass layer includes a cavity for exposing a part of a circuit layer contained in the buildup layer positioned at the lowermost part.
The method according to claim 1,
Wherein the circuit layer is composed of a seed layer and a plating layer formed on the seed layer, and the circuit layer included in the build-up layer located at the lowermost portion is exposed through the cavity.
The method according to claim 1,
Wherein the glass layer has a portion adjacent to a side surface of the buildup layer removed.
The method according to claim 1,
And a protective member provided on an outer surface of the glass layer.
The method according to claim 1,
And an insulating film formed on the laminated surface of the glass layer.
A plurality of build-up layers in which a circuit layer and an insulating layer covering the circuit layer are alternately stacked;
An upper glass layer provided in contact with a buildup layer located at an uppermost position in the plurality of buildup layers and having a cavity for exposing a part of a circuit layer included in the uppermost buildup layer; And
And a lower glass layer which is provided in contact with a buildup layer located at the lowermost part of the plurality of buildup layers and in which a cavity for exposing a part of the circuit layer included in the buildup layer located at the lowermost part is formed.
8. The method of claim 7,
Wherein the lower glass layer is in contact with a base surface of a circuit layer included in the build-up layer positioned at the lowermost part.
8. The method of claim 7,
Wherein the circuit layer is composed of a seed layer and a plating layer formed on the seed layer, the circuit layer included in the build-up layer located at the lowermost portion is exposed through a cavity formed in the lower glass layer, Wherein the circuit layer included in the built-up layer is exposed through the cavity formed in the upper glass layer.
8. The method of claim 7,
Wherein portions of the upper glass layer and the lower glass layer adjacent to the sides of the build-up layer are removed.
8. The method of claim 7,
And a protection member provided on an outer surface of the upper glass layer and the lower glass layer.
8. The method of claim 7,
And an insulating film formed on a laminated surface of the lower glass layer.
Preparing a lower glass layer;
Forming a plurality of build-up layers by sequentially stacking a circuit layer and an insulating layer covering the circuit layer on the lower glass layer; And
And forming a cavity in the lower glass layer.
14. The method of claim 13,
Further comprising the step of laminating an upper glass layer on a buildup layer located at the uppermost position in the plurality of buildup layers after forming the buildup layer and forming a cavity in the upper glass layer.
14. The method of claim 13,
Further comprising the step of forming an insulating film on the lower glass layer before forming the build-up layer, wherein the build-up layer is formed on the insulating film.
14. The method of claim 13,
Further comprising removing a portion of the lower glass layer where the cutting line passes.
14. The method of claim 13,
Wherein the forming of the cavity proceeds through a laser processing or etching process.
17. The method of claim 16,
The etching process includes the steps of: attaching a resist to an outer peripheral surface of the build-up layer including the lower glass layer; removing a portion where the cavity is to be formed in the resist; and supplying an etchant to the removed portion Comprising a printed circuit board.
14. The method of claim 13,
And forming a protective member on an outer surface of the lower glass layer.
Bonding the two lower glass layers so that the lower surface faces each other through the adhesive;
Forming a plurality of build-up layers by sequentially laminating a circuit layer and an insulating layer covering the circuit layer on the upper surface of each of the lower glass layers;
Separating the two lower glass layers; And
And forming a cavity in each of the lower glass layers.
21. The method of claim 20,
The upper glass layer is laminated on the buildup layer located at the uppermost position in the plurality of buildup layers before the two lower glass layers are separated, and after separating the two lower glass layers, a cavity is formed in each of the upper glass layers And forming a conductive layer on the printed circuit board.
21. The method of claim 20,
Further comprising the step of forming an insulating film on the upper surface of each of the lower glass layers before forming the build-up layer, wherein the build-up layer is formed on the insulating film.
21. The method of claim 20,
Further comprising removing a portion of the respective lower glass layer through which the cutting line passes after separating the two lower glass layers.
21. The method of claim 20,
Wherein the forming of the cavity proceeds through a laser processing or etching process.
25. The method of claim 24,
The etching process includes the steps of: attaching a resist to an outer peripheral surface of the build-up layer including the lower glass layer; removing a portion where the cavity is to be formed in the resist; and supplying an etchant to the removed portion Comprising a printed circuit board.
21. The method of claim 20,
Further comprising forming a protective member on an outer surface of the lower glass layer after separating the two lower glass layers.

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