KR20160068022A - Fabricating method for thin film transistor array substrate - Google Patents

Abstract

A method of fabricating a thin film transistor array substrate is disclosed. The method of fabricating a thin film transistor array substrate comprises: preparing a substrate including a first region where a second gate electrode is disposed, a second region where a first gate electrode is disposed, and a third region adjacent to the first region and the second region; arranging a first gate insulating layer on the substrate; arranging a semiconductor layer material on the substrate; arranging a gate insulating layer material on the semiconductor layer material; arranging a third gate electrode material on the gate insulating layer material; arranging a photoresist on the gate electrode insulating layer material; and etching the photoresist using a half-tone mask that is disposed to face the substrate and includes a transmissive portion facing the first region, a half-transmissive portion facing the second region, and a blocking portion corresponding to the third region.

Description

[0001] The present invention relates to a thin film transistor array substrate,

The present invention relates to a method of manufacturing a thin film transistor array substrate, and more particularly, to a method of manufacturing a thin film transistor array substrate that simplifies a process of a thin film transistor array substrate including a thin film transistor having a double gate electrode structure.

BACKGROUND ART [0002] The development of an information society has been accelerated due to the development of an information display device which is light and highly portable. A liquid crystal display (LCD), which is a typical flat panel display, has been commercialized to replace cathode ray tube display devices. Organic light emitting displays (OLEDs) Emitting Diode Display).

The organic light emitting display device requires no separate light source such as a backlight used in a liquid crystal display device, so that it can be realized as thin as compared with a liquid crystal display device and has excellent color reproducibility, thereby realizing a thinner and clearer image. In addition, the organic light emitting display device has a wide viewing angle, excellent contrast ratio, fast response time, and low power consumption.

An organic light emitting display uses a thin film transistor array substrate including a plurality of thin film transistors for driving. Such a thin film transistor array substrate is manufactured through a manufacturing process using a photolithography technique. However, a process using a photosensitive organic resin material called a photoresist requires a number of processes such as exposure, development, firing, peeling, and the like. Therefore, as the number of photolithography steps increases, there is a problem that the manufacturing cost increases.

The present invention is characterized in that the second gate insulating film of the first thin film transistor, the third gate insulating film of the second thin film transistor, and the third gate electrode are arranged using one mask by using one mask, And a method for producing the same.

According to an aspect of the present invention, there is provided a method of fabricating a thin film transistor array substrate including forming a first region in which a second gate electrode is disposed, a second region in which a first gate electrode is disposed, And a third region disposed adjacent to the region, and a first gate insulating film is disposed on the substrate. Thereafter, a semiconductor layer material is disposed on the substrate, and a gate insulating film material is disposed on the semiconductor layer material. A third gate electrode material is disposed on the gate insulating film material, and a photoresist is disposed on the gate electrode material. Then, the photoresist, which is disposed opposite to the substrate and includes a halftone mask including a transmissive portion facing the first region, a transflective portion facing the second region, and a blocking portion corresponding to the third region, Etch. As a result, the steps necessary for disposing the first thin film transistor and the second thin film transistor can be simplified, and the manufacturing cost can be reduced.

A method of manufacturing a thin film transistor array substrate according to the present invention is a method of manufacturing a thin film transistor array substrate by disposing a second gate insulating film of a first thin film transistor, a third gate insulating film of a second thin film transistor and a third gate electrode using one mask , There is an effect of simplifying the process.

1 is a cross-sectional view illustrating an organic light emitting display device including a thin film transistor array substrate according to the present invention.
2A to 2G are views showing a method of manufacturing a thin film transistor array substrate according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

1 is a cross-sectional view illustrating an organic light emitting display device including a thin film transistor array substrate according to the present invention. Referring to FIG. 1, an organic light emitting display device according to the present invention includes a first thin film transistor Ts1, a second thin film transistor Ts2, and an organic electroluminescent device. Here, the first thin film transistor Ts1 and the second thin film transistor Ts2 are electrically connected, and the second thin film transistor Ts2 can drive the organic electroluminescent device. In this case, the first thin film transistor Ts1 may be a switching thin film transistor and the second thin film transistor Ts2 may be a driving thin film transistor.

In detail, the first gate electrode 101 of the first thin film transistor Ts1 is disposed on the substrate 100. [ The second gate electrode 102 of the second thin film transistor Tr2 is disposed apart from the first gate electrode 101. [ Here, the second gate electrode 102 of the second thin film transistor Tr2 may serve as a light shielding film of the second thin film transistor Tr2. Thus, the optical reliability of the organic light emitting display device can be improved.

The first gate electrode 101 and the second gate electrode 102 may be formed of the same material in the same layer. The first gate electrode 101 and the second gate electrode 102 may be formed of Cu, Mo, Al, Ag, Ti, Ta, or a combination thereof. Further, although the single metal layer is shown in the drawing, at least two or more metal layers may be laminated.

A first gate insulating film 103 is disposed on a substrate including the first gate electrode 101 and the second gate electrode 102. The first semiconductor layer 104 of the first thin film transistor Ts1 and the second semiconductor layer 105 of the second thin film transistor Ts2 are disposed on the first gate insulating film 103. [

Here, the first semiconductor layer 104 and the second semiconductor layer 105 may be made of an oxide semiconductor material. The oxide semiconductor material has a high transmittance and high electron mobility.

A, B and C are each selected from Zn, Cd, Ga, In, Sn, Hf and Zr. The oxide semiconductor material may be represented by AxByCzO (x, y, z? 0). Preferably, the oxide semiconductor material may be selected from ZnO, InGaZnO _4, ZnInO, ZnSnO, InZnHfO, SnInO and SnO, is not limited.

A second gate insulating layer 106 is disposed on the first semiconductor layer 104 and a third gate insulating layer 107 is disposed on the second semiconductor layer 105. The second gate insulating layer 106 is disposed in a channel region of the first semiconductor layer 104 and the third gate insulating layer 107 is disposed in a channel region of the second semiconductor layer 105, As shown in FIG. At this time, the second gate insulating layer 106 and the third gate insulating layer 107 may serve as an etch stop layer.

A third gate electrode 108 of the second thin film transistor Tr2 is disposed on the third gate insulating film 107. [ Here, the second gate insulating film 106 and the third gate insulating film 107 may be formed using a mask used for forming the third gate electrode 108. [ Accordingly, the manufacturing process of the organic light emitting display device can be simplified.

A protective film 113 is disposed on the substrate 100 including the third gate electrode 108. A first source electrode 109 and a first drain electrode 110 of the first thin film transistor Tr1 are disposed on the passivation layer 113. [ The second source electrode 111 and the second drain electrode 112 of the second thin film transistor Tr2 are disposed on the protective layer 113. [

The first source electrode 109, the first drain electrode 110, the second source electrode 111, and the second drain electrode 112 may be formed of the same material in the same layer. The first source electrode 109, the first drain electrode 110, the second source electrode 111 and the second drain electrode 112 may be formed of any one of Cu, Mo, Al, Ag, Ti, Ta, May be formed. Further, although the single metal layer is shown in the drawing, at least two or more metal layers may be laminated.

The first source electrode 109 and the first drain electrode 110 are connected to the first semiconductor layer 104 through contact holes formed on the protective layer 113. The second source electrode 111 and the second drain electrode 112 are connected to the second semiconductor layer 105 through a contact hole formed on the protective layer 113.

In this manner, the first thin film transistor Tr1 and the second thin film transistor Tr2 are disposed on the substrate 100. [ Here, the second thin film transistor Tr2 may have a double gate electrode structure including two gate electrodes. Here, the optical reliability and current capability of the device can be improved due to the second gate electrode 102 of the second thin film transistor Tr2. Thus, the electro-optical characteristic and the luminance uniformity of the display device can be improved.

The planarization layer 114 is disposed on the substrate 100 including the first source electrode 109, the first drain electrode 110, the second source electrode 111, and the second drain electrode 112 . A first electrode 115 of the organic electroluminescent device is disposed on the planarization film. The first electrode 115 is connected to the second drain electrode 112 of the second thin film transistor Tr2 through a contact hole formed on the planarization layer 114. [ Here, the first electrode 115 may be an anode electrode. However, the first electrode 115 is not limited thereto, and the first electrode 115 may be a cathode. Hereinafter, the first embodiment will be described in which the first electrode 115 is an anode.

The first electrode 115 may be formed as a single layer made of a transparent conductive material having a relatively high work function value. Accordingly, a bottom emission type organic light emitting display device that emits light from the second electrode 118 to the first electrode 115 can be realized.

In addition, a reflective layer may be further formed under the first electrode 115. In this case, a top emission type organic light emitting display device may be realized in which light emitted from the second electrode 118 to the first electrode 115 is reflected to emit light upward.

The shape of the first electrode 115 is not limited to the drawing, and the first electrode 115 may be formed in multiple layers. For example, it may be formed as a three-layer structure in which a second layer is formed on the first layer and a third layer is formed on the second layer.

Here, the first layer and the third layer may be transparent conductive materials. For example, the transparent conductive material may be ITO or IZO. The second layer may be a reflective layer. In this case, the second layer may be a metal or a metal alloy layer. For example, a metal alloy layer containing Ag or Ag. Accordingly, the organic electroluminescent device reflects light emitted from the second electrode 118 to the first electrode 115, thereby realizing a top emission type organic light emitting display device.

A bank pattern 116 defining an emission region and a non-emission region of the organic light emitting display device is disposed on a portion of the upper surface of the first electrode 115. An organic light emitting layer 117 is disposed on a region surrounded by the bank pattern 116.

The organic light emitting layer 117 may be a single layer made of a light emitting material. The organic light emitting layer 117 may include a hole injection layer, a hole transporting layer, an emitting material layer, an electron transporting layer, Layer (electron injection layer).

A second electrode 118 of the organic electroluminescent device is disposed on the substrate 100 including the organic light emitting layer 117. In this case, the second electrode 118 may be a cathode electrode. Also, although not shown in the figure, the color filter array substrate may be disposed opposite to the substrate 100 including the organic electroluminescent device.

The organic light emitting display according to the present invention can improve the optical reliability and current capability of the device because the second thin film transistor Tr2 includes the second gate electrode 102 and the third gate electrode 108. [ Thus, the electro-optical characteristic and the luminance uniformity of the display device can be improved. The second gate insulating film 106 of the first thin film transistor Tr1 and the third gate insulating film 107 and the third gate electrode 108 of the second thin film transistor Tr2 are arranged, Thereby, the process can be simplified.

Next, a manufacturing method of the thin film transistor array substrate according to the present invention will be described in detail with reference to FIGS. 2A to 2G. 2A to 2G are views showing a method of manufacturing a thin film transistor array substrate according to the present invention.

2A to 2G, a first region in which the second gate electrode 102 is disposed, a second region in which the first gate electrode 101 is disposed, and a second region in which the first gate electrode 101 and the second gate electrode A substrate 100 including three regions is provided.

A first gate insulating layer 103 is disposed on the substrate 100 and a semiconductor layer material 204 is disposed on the substrate 100. Thereafter, a gate insulating layer material 206 is disposed on the substrate 100 and a third gate electrode material 208 is disposed on the gate insulating layer material 206. Thereafter, the photoresist 200 is disposed on the third gate electrode material 208.

The transmission portion 303 facing the first region, the transflective portion 302 facing the second region, and the blocking portion 301 corresponding to the third region are disposed opposite to the substrate 100, The photoresist 200 is etched by using a halftone mask 300 including a photoresist pattern. Thereafter, the third gate electrode material 208 corresponding to the third region is etched and removed.

A portion of the gate insulating film material 204 corresponding to the third region is etched using the photoresist arranged in the first region and the second region as a mask. Thereafter, a portion of the photoresist 200b corresponding to the first region and the photoresist 200a corresponding to the second region are etched. Then, the third gate electrode material 204 disposed corresponding to the second region is etched.

Thereafter, a portion of the gate insulating film material disposed in the second region and a gate insulating film material disposed in the third region are etched using the photoresist 200c disposed in the first region as a mask. Then, the photoresist 200c disposed in the first region is etched and removed.

Here, the second thin film transistor Tr2 may be disposed in the first region, the first thin film transistor Tr1 may be disposed in the second region, and the thin film transistor may not be disposed in the third region.

More specifically, referring to FIG. 2A, a gate electrode material is disposed on the substrate 100. FIG. The gate electrode material is patterned through a photolithography process. A first gate electrode 101 of the first thin film transistor and a second gate electrode 102 of the second thin film transistor disposed apart from the first gate electrode 101 are disposed on the substrate 100 .

A first gate insulating film 103 is disposed on a substrate 100 including the first gate electrode 101 and the second gate electrode 102. A semiconductor layer material 204 is disposed on a substrate 100 including the first gate insulating layer 103. On the semiconductor layer material 204, a gate insulating film material 206 for forming a second gate insulating film and a third gate insulating film is disposed.

A third gate electrode material 208 is disposed on the gate insulating film material 206. A photoresist (200) is disposed on the third gate electrode material (208). At this time, the photoresist 200 may be a negative photoresist. The negative photoresist is a photosensitive material which is a material which is cured when light is irradiated.

A mask 300 is disposed opposite to the substrate 100 on which the photoresist 200 is formed. The mask 300 may be a halftone mask. In detail, the mask 300 includes a blocking portion 301, a transflective portion 302, and a transmissive portion 303. The transmissive portion 303 transmits light as it is, and the transflective portion 302 passes less light than the transmissive portion 303, and the blocking portion 301 completely blocks the light.

The photoresist 200 is irradiated with light through the mask 300. Here, the photoresist 200 facing the transflective portion 302 of the mask 300 is semi-cured by the light to be irradiated. Further, the photoresist 200 facing the transmissive portion 303 of the mask 300 is cured by the irradiated light.

Referring to FIG. 2B, the photoresist 200 facing the transflective portion 302 of the mask 300 overlaps the first gate electrode 101 of the first thin film transistor to form a first photoresist pattern 200a. The photoresist 200 facing the transmissive portion 303 of the mask 300 is formed of a second photoresist pattern 200b having a high height, overlapping the second gate electrode 102 of the second thin film transistor . The photoresist 200 facing the blocking portion 301 of the mask 300 is removed to expose the third gate electrode material 208.

Therefore, the first photoresist pattern 200a formed in the region corresponding to the transflective portion 302 of the mask 300 is thinner than the second photoresist pattern 200b formed in the region corresponding to the transmissive portion 303 .

The photoresist can be formed using a positive photoresist. In this case, the pattern of the halftone mask that is the mask 300 must be reversed.

Referring to FIG. 2C, the exposed third gate electrode material is etched using the first photoresist pattern 200a and the second photoresist pattern 200b as a mask. The third gate electrode material 111 may be etched to form a gate electrode pattern 208a and a third gate electrode pattern 108a.

The gate electrode pattern 208a may be formed under the first photoresist pattern 200a and the third gate electrode pattern 108a may be formed under the second photoresist pattern 200b. The third gate electrode pattern 108a may be the same as the third gate electrode. Here, in the region where the gate electrode pattern 208a and the third gate electrode pattern 108a are not formed, the gate insulating film material 206 is exposed.

Referring to FIG. 2D, the exposed gate insulating layer material 206 is etched using the first photoresist pattern 200a and the second photoresist pattern 200b as masks. In detail, the gate insulating film material 206 is etched using the first photoresist pattern 200a and the gate electrode pattern 208a as masks. At the same time, the gate insulating film material 206 is etched using the second photoresist pattern 200b and the third gate electrode pattern 108a as a mask.

 The thickness of the gate insulating layer material 206b disposed under the first photoresist pattern 200a and the second photoresist pattern 200b can be controlled by adjusting the thicknesses of the first photoresist pattern 200a and the second photoresist pattern 200b, The thickness of the region where the pattern 200b is not disposed can be made thicker than the thickness of the region where the pattern 200b is not disposed.

Referring to FIG. 2E, the first photoresist pattern 200a may be removed through an ashing process. At this time, a portion of the second photoresist pattern 200b may be removed together to form a third photoresist pattern 200c having a thickness smaller than that of the second photoresist pattern 200b. Thereafter, the gate electrode pattern 208a is removed by etching. Accordingly, the gate insulating layer material 206a may be exposed in an area other than a lower region of the third photoresist pattern 200c.

Referring to FIG. 2F, a part of the exposed gate insulating film material 206a is etched using the third photoresist pattern 200c as a mask. At this time, the gate insulating film material 106a disposed at a position overlapping with the first gate electrode 101 of the first thin film transistor becomes the second gate insulating film 106. [

Here, the height of the second gate insulating layer 106 is lower than the gate insulating layer material 107a disposed under the third photoresist pattern 200c. Then, all of the gate insulating film material disposed in the remaining region is removed to expose the semiconductor layer material. At this time, the gate insulating film material can be removed by a dry etching process.

The semiconductor layer material 204a of the exposed region can be simultaneously conductive while the gate insulating film material is dry etched. Accordingly, a separate doping process for making the semiconductor layer material 204a conductive can be omitted.

Here, the semiconductor layer material 204a disposed under the second gate insulating layer 106 and the third gate insulating layer material 107a may not be made conductive. The regions of the semiconductor layer material 204a disposed below the second gate insulating film 106 and the third gate insulating film material 107a may be a channel region of the first semiconductor layer and a channel region of the second semiconductor layer, have.

Next, referring to FIG. 2G, the third photoresist pattern 200c is removed. As a result, the third gate electrode material 108a disposed under the third photoresist pattern 200c becomes the third gate electrode 108. That is, the third gate electrode 108 may be formed through the same mask as the second gate insulating film 107 and the third gate insulating film 107.

The third gate insulating film material 107a disposed under the third gate electrode 108 becomes the third gate insulating film 107. [ That is, the third gate insulating layer 107 may be formed of the same material as the second gate insulating layer 106. Thus, the process of forming the second gate insulating film 106 and the third gate insulating film 107 can be simplified.

Here, the height of the third gate insulating film 107 may be higher than the height of the second gate insulating film 106. Thus, the parasitic capacitance of the organic light emitting display can be reduced.

Although not shown in the drawing, the first semiconductor layer of the first thin film transistor and the second semiconductor layer of the second thin film transistor may be formed by etching the semiconductor layer material 204a. A protective layer 113 may be further formed on the substrate 100 on which the first and second semiconductor layers are disposed. A first source electrode and a first drain electrode of the first thin film transistor connected to the first semiconductor layer are formed through a contact hole formed in the protective film, and a second thin film transistor connected to the second semiconductor layer The second source electrode and the second drain electrode can be formed.

The method for fabricating a thin film transistor array substrate of an organic light emitting display according to the present invention includes forming a second gate insulating film 106 of a first thin film transistor, a third gate insulating film 107 and a third gate electrode 108 of a second thin film transistor, By using one mask, the manufacturing process can be simplified and the manufacturing cost can be reduced.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: substrate 102: second gate electrode
103: first gate insulating film 105: second semiconductor layer
107: third gate insulating film 108: third gate electrode
111: second source electrode 112: second drain electrode

Claims (7)

Providing a substrate including a first region in which a second gate electrode is disposed, a second region in which a first gate electrode is disposed, and a third region adjacent to the first and second regions;
Disposing a first gate insulating film on the substrate;
Disposing a semiconductor layer material on the substrate;
Disposing a gate insulating film material on the substrate;
Disposing a third gate electrode material on the substrate;
Disposing a photoresist on the substrate; And
The photoresist is etched using a halftone mask disposed opposite to the substrate and including a transmissive portion facing the first region, a transflective portion facing the second region, and a blocking portion corresponding to the third region, The method comprising the steps of:
The method according to claim 1,
And etching the third gate electrode material corresponding to the third region.
The method according to claim 1,
And etching a part of the gate insulating film material corresponding to the third region using the photoresist disposed in the first region and the second region as a mask.
The method according to claim 1,
Further comprising etching a portion of the photoresist corresponding to the first region and a photoresist corresponding to the second region.
The method according to claim 1,
And etching the third gate electrode material disposed corresponding to the second region.
The method according to claim 1,
Further comprising the step of etching a part of the gate insulating film material disposed in the second region and a gate insulating film material disposed in the third region using the photoresist disposed in the first region as a mask .
The method according to claim 1,
And removing the photoresist disposed in the first region.

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