KR20160058297A - Organic Light Emitting Diode Display Device and Method of Fabricating the Same - Google Patents

Abstract

The present invention provides an organic light emitting diode display device. The organic light emitting diode display device includes a substrate; a thin film transistor in the upper part of the substrate; a first electrode connected to a drain electrode of the thin film transistor; a bank layer which covers the edge of the first electrode, and has a transmission hole corresponding to the first electrode; a light emitting layer located in the upper part of the first electrode in the transmission hole; a second electrode in the upper part of the light emitting layer; an auxiliary electrode which is located in the upper part of the bank layer, and touches the second electrode; and a capping layer which is located in the upper part of the second electrode except the auxiliary electrode. So, the organic light emitting diode display device with large size, high resolution, and uniform brightness can be provided.

Description

Technical Field [0001] The present invention relates to an organic light emitting diode (OLED) display device and a fabrication method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode (OLED) display device, and more particularly, to a large-area, high-resolution organic light emitting diode display device capable of providing uniform luminance and a method of manufacturing the same.

2. Description of the Related Art Flat panel displays having excellent characteristics such as thinning, lightening, and low power consumption have been widely developed and applied to various fields.

Among the flat panel display devices, an organic light emitting diode (OLED) display device, also referred to as an organic electroluminescent display device or organic electroluminescent display device, An electron injecting charge is injected into the light emitting layer formed between the anode which is the injection electrode, and the electron and the hole are paired, and then the light is emitted while disappearing. Such an organic light emitting diode display device can be formed not only on a flexible substrate such as a plastic but also because it has a large contrast ratio and response time of several microseconds since it is a self- It is easy to manufacture and design a driving circuit because it is easy to operate, is not limited in viewing angle, is stable at a low temperature, and can be driven at a relatively low voltage of 5 V to 15 V DC.

The organic light emitting diode display device can be classified into a passive matrix type and an active matrix type according to a driving method. An active type organic light emitting diode display device capable of low power consumption, fixed size, and large size is widely used in various display devices. .

1 is a circuit diagram of one pixel region of a general organic light emitting diode display device.

1, the organic light emitting diode display device includes a gate line GL and a data line DL that define a pixel region P and intersect with each other, and each pixel region P includes a switching thin film A transistor Ts, a driving thin film transistor Td, a storage capacitor Cst, and a light emitting diode De are formed.

More specifically, the gate electrode of the switching thin film transistor Ts is connected to the gate wiring GL and the source electrode thereof is connected to the data wiring DL. The gate electrode of the driving thin film transistor Td is connected to the drain electrode of the switching thin film transistor Ts, and the source electrode thereof is connected to the high potential voltage VDD. The anode of the light emitting diode De is connected to the drain electrode of the driving thin film transistor Td and the cathode is connected to the low potential voltage VSS. The storage capacitor Cst is connected to the gate electrode and the drain electrode of the driving thin film transistor Td.

The switching TFTs turn on according to the gate signal applied through the gate line GL and the data line DL is turned on at this time. Is applied to the gate electrode of the driving thin film transistor Td and the one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

The driving thin film transistor Td is turned on according to the data signal to control the current flowing through the light emitting diode De to display an image. The light emitting diode De emits light by the current of the high potential voltage (VDD) transmitted through the driving thin film transistor Td.

That is, the amount of current flowing through the light emitting diode De is proportional to the size of the data signal, and the intensity of light emitted by the light emitting diode De is proportional to the amount of current flowing through the light emitting diode De, ) Displays different gradations according to the size of the data signal, and as a result, the organic light emitting diode display displays an image.

The storage capacitor Cst maintains the charge corresponding to the data signal for one frame to keep the amount of the current flowing through the light emitting diode De constant and to keep the gradation displayed by the light emitting diode De constant .

The organic light emitting diode display device is divided into a lower light emitting mode and a top light emitting mode according to a light emitting direction. In the bottom emission type, light from the light emitting diode is output to the substrate on which the thin film transistor is formed through the anode. In the top emission type, light from the light emitting diode is output to the side opposite to the substrate through the cathode. In general, in an organic light emitting diode display device, a thin film transistor is formed under a light emitting diode. Therefore, an effective light emitting area is limited by a thin film transistor in a lower light emitting method, and an upper light emitting method has a wider effective light emitting area than a lower light emitting method. Therefore, since the upper emission type has a higher aperture ratio than the lower emission type, it is widely used in large-area high-resolution display devices.

However, since the cathode is mainly formed using a metal material, the cathode must have a relatively thin thickness in order to output light through the cathode in the top emission organic light emitting diode display. As a result, the resistance of the cathode becomes high. In a large-area high-resolution display device, a low-potential voltage drop (VSS voltage drop) occurs due to the resistance of the cathode.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide an organic light emitting diode display device having a large area, a high resolution and a uniform luminance, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a thin film transistor comprising: a substrate; a thin film transistor on the substrate; a first electrode connected to a drain electrode of the thin film transistor; A light emitting layer positioned above the first electrode in the transmission hole; a second electrode disposed on the upper portion of the light emitting layer; and a second electrode disposed on the bank layer and in contact with the second electrode, the bank layer having a transmission hole corresponding to the electrode, An auxiliary electrode, and a capping layer located above the second electrode except for the auxiliary electrode.

The organic light emitting diode display includes a pixel having a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to the pixel.

Alternatively, the organic light emitting diode display device includes a pixel having a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to each of the sub-pixels.

Alternatively, the organic light emitting diode display device includes a pixel having a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to two adjacent pixels.

The auxiliary electrode overlaps with the first electrode.

The auxiliary electrode is made of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and an alloy thereof, and the capping layer is made of an organic material.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: forming a thin film transistor on a substrate; forming a first electrode connected to the drain electrode of the thin film transistor on the thin film transistor; Forming a light emitting layer located above the first electrode in the transmission hole; forming a second electrode on the entire surface of the substrate above the light emitting layer; And forming an auxiliary electrode in contact with the second electrode by spraying a conductive solution onto the capping layer corresponding to the bank layer. A manufacturing method of a light emitting diode display device is provided.

The forming of the auxiliary electrode may include spraying the conductive solution to dissolve the capping layer on the bank layer to form a conductive solution layer in contact with the second electrode and drying the conductive solution layer .

The conductive solution includes a solute of a metal material and a solvent, and the solute includes at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof.

The light emitting layer includes a hole injecting layer, a hole transporting layer, a light emitting material layer, an electron transporting layer, and an electron injecting layer. At least one of the hole injecting layer, the hole transporting layer, and the light emitting material layer is formed by a solution process using an organic solution, The solvent of the organic solution is the same as the solvent of the conductive solution.

The present invention provides an organic light emitting diode display device having a high aperture ratio and a large area and a high resolution by allowing light emitted from a light emitting layer to be output to the outside through a second electrode, The resistance of the electrode can be lowered to make the luminance uniform.

At this time, since the auxiliary electrode is formed on a different layer from the first electrode and overlaps with the first electrode, the area ratio of the first electrode is increased to increase the aperture ratio, and the efficiency and lifetime of the display device can be improved.

In addition, since the auxiliary electrode forms the auxiliary electrode through the solution process after the formation of the capping layer, the process can be simplified and the manufacturing time and cost can be reduced.

On the other hand, since the thickness of the auxiliary electrode can be easily adjusted, the area of the auxiliary electrode can be reduced to prevent the resistance of the second electrode from decreasing while increasing the aperture ratio.

1 is a circuit diagram of one pixel region of a general organic light emitting diode display device.
2 is a cross-sectional view illustrating an organic light emitting diode display device according to a first embodiment of the present invention.
FIG. 3A is a plan view schematically showing an organic light emitting diode display device according to a first embodiment of the present invention, and FIG. 3B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the first embodiment of the present invention FIG.
4 is a cross-sectional view illustrating an organic light emitting diode display device according to a second embodiment of the present invention.
5A is a plan view schematically showing an organic light emitting diode display device according to a second embodiment of the present invention, and FIG. 5B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the second embodiment of the present invention FIG.
6A to 6G are cross-sectional views illustrating a display device in each step of the manufacturing process of the organic light emitting diode display device according to the second embodiment of the present invention.
FIG. 7A is a plan view schematically showing an organic light emitting diode display device according to a third embodiment of the present invention, and FIG. 7B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the third embodiment of the present invention FIG.

Hereinafter, an organic light emitting diode display and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the drawings.

- First Embodiment -

2 is a cross-sectional view illustrating an organic light emitting diode display device according to a first embodiment of the present invention, and shows a structure corresponding to one pixel region. FIG. 3A is a plan view schematically showing an organic light emitting diode display device according to a first embodiment of the present invention, and FIG. 3B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the first embodiment of the present invention And FIGS. 3A and 3B show a structure corresponding to one pixel. Each of the sub-pixels SP1, SP2 and SP3 corresponds to one pixel region P and corresponds to the pixel region P of FIG. 2 P).

First, as shown in FIG. 2, a semiconductor layer 122 patterned on an insulating substrate 110 is formed. The substrate 110 may be a glass substrate or a plastic substrate. In this case, a light shielding pattern (not shown) and a buffer layer (not shown) may be formed under the semiconductor layer 122, and the light shielding pattern may be formed on the semiconductor layer 122 And prevents the semiconductor layer 122 from being deteriorated by light. Alternatively, the semiconductor layer 122 may be made of polycrystalline silicon. In this case, impurities may be doped on both edges of the semiconductor layer 122.

A gate insulating layer 130 made of an insulating material is formed on the entire surface of the substrate 110 on the semiconductor layer 122. The gate insulating film 130 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ). When the semiconductor layer 122 is made of polycrystalline silicon, the gate insulating layer 130 may be formed of silicon oxide (SiO ₂ ) or silicon nitride (SiNx).

A gate electrode 132 made of a conductive material such as metal is formed on the gate insulating layer 130 to correspond to the semiconductor layer 122. A gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 130. The gate wiring extends along the first direction, and the first capacitor electrode is connected to the gate electrode 132. [

In the embodiment of the present invention, the gate insulating layer 130 is formed on the entire surface of the substrate 110, but the gate insulating layer 130 may be patterned to have the same shape as the gate electrode 132.

An interlayer insulating layer 140 made of an insulating material is formed on the entire surface of the substrate 110 on the gate electrode 132. The interlayer insulating film 140 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x), or may be formed of an organic insulating material such as benzocyclobutene or photo acryl .

The interlayer insulating film 140 has first and second contact holes 140a and 140b that expose both upper surfaces of the semiconductor layer 122. [ The first and second contact holes 140a and 140b are spaced apart from the gate electrode 132 on both sides of the gate electrode 132. Here, the first and second contact holes 140a and 140b are also formed in the gate insulating film 130. Alternatively, when the gate insulating film 130 is patterned to have the same shape as the gate electrode 132, the first and second contact holes 140a and 140b are formed only in the interlayer insulating film 140. [

Source and drain electrodes 152 and 154 are formed on the interlayer insulating layer 140 with a conductive material such as a metal. A data line (not shown), a power supply line (not shown), and a second capacitor electrode (not shown) may be formed on the interlayer insulating layer 140 in the second direction.

The source and drain electrodes 152 and 154 are spaced around the gate electrode 132 and contact both sides of the semiconductor layer 122 through the first and second contact holes 140a and 140b, respectively. Although not shown, the data line extends along the second direction and crosses the gate line to define the pixel region P, and the power line is located apart from the data line. The second capacitor electrode is connected to the drain electrode 154, and overlaps the first capacitor electrode to form a storage capacitor between the two interlayer insulating films 140 as a dielectric.

On the other hand, the semiconductor layer 122, the gate electrode 132, and the source and drain electrodes 152 and 154 constitute a thin film transistor. Here, the thin film transistor has a coplanar structure in which the gate electrode 132 and the source and drain electrodes 152 and 154 are located on one side of the semiconductor layer 122, that is, above the semiconductor layer 122.

Alternatively, the thin film transistor may have an inverted staggered structure in which a gate electrode is positioned below the semiconductor layer and source and drain electrodes are located above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

Here, the thin film transistor corresponds to a driving thin film transistor of the organic light emitting diode display, and a switching thin film transistor (not shown) having the same structure as the driving thin film transistor is further formed on the substrate 110, (Not shown) of the switching thin film transistor and the source electrode 152 of the driving thin film transistor is connected to the power supply wiring (not shown). In addition, a gate electrode (not shown) and a source electrode (not shown) of the switching thin film transistor are connected to the gate wiring and the data wiring, respectively.

A protective layer 160 is formed on the entire surface of the substrate 110 as an insulating material over the source and drain electrodes 152 and 154. The protective film 160 has a flat upper surface and a drain contact hole 160a for exposing the drain electrode 154. [ Here, although the drain contact hole 160a is formed directly on the second contact hole 140b, the drain contact hole 160a may be formed apart from the second contact hole 140b.

The protective film 160 may be formed of an organic insulating material such as benzocyclobutene or photoacryl.

A first electrode 162 is formed on the passivation layer 160 with a conductive material having a relatively high work function. The first electrode 162 is formed for each pixel region P and contacts the drain electrode 154 through the drain contact hole 160a. For example, the first electrode 162 may be formed of a transparent conductive material such as indium tin oxide (IZO) or indium zinc oxide (IZO).

Meanwhile, the first electrode 162 may further include a reflective layer (not shown) made of an opaque conductive material. For example, the reflective layer may be formed of an aluminum-palladium-copper (APC) alloy, and the first electrode 162 may have a triple-layer structure of ITO / APC / ITO.

The auxiliary electrode 164 may be formed on the protective layer 160 to be spaced apart from the first electrode 162 and the auxiliary electrode 164 may be formed of the same material as the first electrode 162.

The auxiliary electrode 164 is formed along the edge of the pixel region P. [ 3A, the auxiliary electrode 164 extends in the first direction and the second direction on the substrate 110, and has a lattice shape including one opening per pixel region P. Referring to FIG. The first electrode 162 is located in the opening of the auxiliary electrode 164.

A bank layer 170 is formed of an insulating material on the first electrode 162 and the auxiliary electrode 164. The bank layer 170 covers the edges of the first electrode 162 and the auxiliary electrode 164 and has a through hole 170a for exposing the first electrode 162. [ Referring to FIG. 3B, the bank layer 170 is patterned corresponding to each pixel region P, and the auxiliary electrode 164 between adjacent bank layers 170 is exposed.

A light emitting layer 180 is formed on the first electrode 162 exposed through the transmission hole 170a of the bank layer 170. [ The light emitting layer 180 includes a hole injecting layer 181 sequentially stacked from the top of the first electrode 162, a hole transporting layer 182, a light-emitting material layer ) 183, an electron transporting layer 184, and an electron injecting layer 185. The luminescent material layer 183 may be one of red, green and blue luminescent material layers.

Here, the hole injection layer 181, the hole transport layer 182, the electron transport layer 184, and the electron injection layer 185 are formed substantially on the entire surface of the substrate 110 except for the upper portion of the auxiliary electrode 164, The layer 183 is formed only in the transmission hole 170a. Alternatively, the hole injection layer 181, the hole transport layer 182, and the light emitting material layer 183 are formed only in the transmission hole 170a, and the electron transport layer 184 and the electron injection layer 185 are formed on the substrate 110, Or may be formed on the entire surface.

A second electrode 192 is formed on the entire surface of the substrate 110 with a conductive material having a relatively low work function on the light emitting layer 180. The second electrode 192 is in contact with the auxiliary electrode 164 exposed between the adjacent bank layers 170. Here, the second electrode 192 may be formed of aluminum, magnesium, silver, or an alloy thereof, and may have a relatively small thickness so that light is transmitted therethrough. At this time, the light transmittance of the second electrode 192 may be about 45-50%.

The first electrode 162 and the emission layer 180 and the second electrode 192 constitute an organic light emitting diode and the first electrode 162 serves as an anode and the second electrode 192 serves as a cathode cathode. Here, the organic light emitting diode display device is a top emission type in which light emitted from the light emitting layer 180 is output to the outside through the second electrode 192.

A capping layer 194 is formed on the entire surface of the substrate 110 on the second electrode 192. The capping layer 194 improves the light extraction efficiency in the top emission organic light emitting diode display.

In the organic light emitting diode display device according to the first embodiment of the present invention, the resistance of the second electrode 192 may be lowered by connecting the second electrode 192 to the auxiliary electrode 164, thereby improving the problem of luminance unevenness .

In this organic light emitting diode display device, the hole injection layer 181, the hole transport layer 182, the electron transport layer 184, the electron injection layer 185, or the electron transport layer 184 and the electron injection layer 186 Since these are formed on the entire surface of the substrate 110, these layers are also formed on the auxiliary electrode 164. Therefore, in order to make the second electrode 192 contact with the auxiliary electrode 164, the hole injection layer 181, the hole transport layer 182, the electron transport layer 184, and the electron injection layer 185 above the auxiliary electrode 164, Or the electron transport layer 184 and the electron injection layer 186 must be removed, and a photolithography process is required for this purpose. Since the photolithography process involves several steps such as application of a photoresist, exposure using a mask, development of a photoresist, and etching of a target film, the addition of a photolithography process increases manufacturing time and cost.

In the organic light emitting diode display device according to the first embodiment of the present invention, since the auxiliary electrode 164 is formed on the same layer as the first electrode 162, the first electrode 162 And the effective light emitting area according to the area of the first electrode 162 is reduced. Therefore, the aperture ratio is reduced, and the efficiency and lifetime of the display device are reduced.

- Second Embodiment -

FIG. 4 is a cross-sectional view illustrating an organic light emitting diode display device according to a second embodiment of the present invention, and shows a structure corresponding to one pixel region. 5A is a plan view schematically showing an organic light emitting diode display device according to a second embodiment of the present invention, and FIG. 5B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the second embodiment of the present invention And FIGS. 5A and 5B show a structure corresponding to one pixel. Each of the sub-pixels SP1, SP2 and SP3 corresponds to one pixel region P and corresponds to the pixel region P of FIG. 4 P).

First, as shown in FIG. 4, a semiconductor layer 222 patterned on an insulating substrate 210 is formed. The substrate 210 may be a glass substrate or a plastic substrate. In this case, a light shielding pattern (not shown) and a buffer layer (not shown) may be formed under the semiconductor layer 222, and the light shielding pattern may be formed on the semiconductor layer 222 And prevents the semiconductor layer 222 from being deteriorated by light. Alternatively, the semiconductor layer 222 may be made of polycrystalline silicon. In this case, impurities may be doped on both edges of the semiconductor layer 222.

A gate insulating layer 230 made of an insulating material is formed on the entire surface of the substrate 210 on the semiconductor layer 222. A gate insulating film 230 can be formed of an inorganic insulating material such as silicon oxide (SiO _2). When the semiconductor layer 222 is made of polycrystalline silicon, the gate insulating layer 230 may be formed of silicon oxide (SiO ₂ ) or silicon nitride (SiNx).

A gate electrode 232 made of a conductive material such as metal is formed on the gate insulating layer 230 to correspond to the semiconductor layer 222. A gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 230. The gate wiring extends along the first direction, and the first capacitor electrode is connected to the gate electrode 232.

Although the gate insulating layer 230 is formed on the entire surface of the substrate 210 in the exemplary embodiment of the present invention, the gate insulating layer 230 may be patterned to have the same shape as the gate electrode 232.

An interlayer insulating layer 240 made of an insulating material is formed on the entire surface of the substrate 210 on the gate electrode 232. The interlayer insulating film 240 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx), or may be formed of an organic insulating material such as benzocyclobutene or photo acryl .

The interlayer insulating film 240 has first and second contact holes 240a and 240b that expose upper surfaces on both sides of the semiconductor layer 222. [ The first and second contact holes 240a and 240b are spaced apart from the gate electrode 232 on both sides of the gate electrode 232. Here, the first and second contact holes 240a and 240b are also formed in the gate insulating film 230. Alternatively, when the gate insulating film 230 is patterned to have the same shape as the gate electrode 232, the first and second contact holes 240a and 240b are formed only in the interlayer insulating film 240.

On the interlayer insulating layer 240, source and drain electrodes 252 and 254 are formed of a conductive material such as a metal. Further, a data line (not shown), a power supply line (not shown), and a second capacitor electrode (not shown) may be formed on the interlayer insulating layer 240 in the second direction.

The source and drain electrodes 252 and 254 are spaced about the gate electrode 232 and contact both sides of the semiconductor layer 222 through the first and second contact holes 240a and 240b, respectively. Although not shown, the data line extends along the second direction and crosses the gate line to define the pixel region P, and the power line is located apart from the data line. The second capacitor electrode is connected to the drain electrode 254, overlaps the first capacitor electrode, and forms an interlayer insulating film 240 between the two as a storage capacitor.

On the other hand, the semiconductor layer 222, the gate electrode 232, and the source and drain electrodes 252 and 254 form a thin film transistor. Here, the thin film transistor has a coplanar structure in which the gate electrode 232 and the source and drain electrodes 252 and 254 are located on one side of the semiconductor layer 222, that is, above the semiconductor layer 222.

Alternatively, the thin film transistor may have an inverted staggered structure in which a gate electrode is positioned below the semiconductor layer and source and drain electrodes are located above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

Here, the thin film transistor corresponds to a driving thin film transistor of the organic light emitting diode display, and a switching thin film transistor (not shown) having the same structure as the driving thin film transistor is further formed on the substrate 210, (Not shown) of the switching thin film transistor and the source electrode 252 of the driving thin film transistor is connected to the power supply wiring (not shown). In addition, a gate electrode (not shown) and a source electrode (not shown) of the switching thin film transistor are connected to the gate wiring and the data wiring, respectively.

A protective film 260 is formed on the entire surface of the substrate 210 as an insulating material on the source and drain electrodes 252 and 254. The protective film 260 has a flat upper surface and a drain contact hole 260a that exposes the drain electrode 254. [ Here, the drain contact hole 260a is formed directly on the second contact hole 240b, but may be formed apart from the second contact hole 240b.

The protective film 260 may be formed of an organic insulating material such as benzocyclobutene or photoacryl.

A first electrode 262 is formed of a conductive material having a relatively high work function on the passivation layer 260. The first electrode 262 is formed for each pixel region P and contacts the drain electrode 254 through the drain contact hole 260a. For example, the first electrode 262 may be formed of a transparent conductive material such as indium tin oxide (IZO) or indium zinc oxide (IZO).

Meanwhile, the first electrode 262 may further include a reflective layer (not shown) made of an opaque conductive material. For example, the reflective layer may be formed of an aluminum-palladium-copper (APC) alloy, and the first electrode 262 may have a triple-layer structure of ITO / APC / ITO.

A bank layer 270 is formed on the first electrode 262 as an insulating material. The bank layer 270 covers the edge of the first electrode 262 and has a through hole 270a for exposing the first electrode 262. [ Referring to FIG. 5B, the bank layers 270 corresponding to the adjacent pixel regions P are integrally connected to each other.

The light emitting layer 280 is formed on the first electrode 262 exposed through the transmission hole 270a of the bank layer 270. The light emitting layer 280 includes a hole injecting layer 281 sequentially stacked from the top of the first electrode 262 and a hole transporting layer 282, a light emitting material layer 283, an electron transporting layer 284, and an electron injecting layer 285 ). The luminescent material layer 283 may be one of red, green and blue luminescent material layers.

The hole injection layer 281, the hole transport layer 282 and the light emitting material layer 283 are formed only in the transmission hole 270a and the electron transport layer 284 and the electron injection layer 285 are substantially formed on the substrate 210 ). Alternatively, the hole injecting layer 281, the hole transporting layer 282, the electron transporting layer 284, and the electron injecting layer 285 may be formed substantially on the entire surface of the substrate 210, (Not shown). Alternatively, the hole injection layer 281, the hole transport layer 282, the light emitting material layer 283, the electron transport layer 284, and the electron injection layer 285 may all be formed only in the transmission hole 270a.

A second electrode 292 is formed on the entire surface of the substrate 210 as a conductive material having a relatively low work function on the light emitting layer 280. Here, the second electrode 292 may be formed of aluminum, magnesium, silver, or an alloy thereof, and has a relatively thin thickness so that light is transmitted therethrough. At this time, the light transmittance of the second electrode 292 may be about 45-50%.

The first electrode 262 and the light emitting layer 280 and the second electrode 292 form an organic light emitting diode and the first electrode 262 serves as an anode and the second electrode 292 serves as a cathode cathode. Here, the organic light emitting diode display device is a top emission type in which light emitted from the light emitting layer 280 is output to the outside through the second electrode 292.

An auxiliary electrode 296 is formed on the second electrode 292 above the bank layer 270. A capping layer 294 is formed on the second electrode 292 except for the auxiliary electrode 296, On the entire surface of the substrate 210. 4, the auxiliary electrode 296 is not formed on the bank layer 270 above the drain electrode 254. The auxiliary electrode 296 is formed on the bank layer 270 above the drain electrode 254. However, And the auxiliary electrode 296 may be omitted on the bank layer 270 above the drain electrode 254 if necessary.

The capping layer 294 can be made of an organic material and improves light extraction efficiency in the top emission organic light emitting diode display.

Referring to FIG. 5A, the auxiliary electrode 296 extends in the first direction and the second direction on the substrate 210 and has a lattice shape including one opening per pixel region (P). The auxiliary electrode 296 may be formed of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof. The auxiliary electrode 296 may partially overlap the first electrode 262.

In the organic light emitting diode display device according to the second embodiment of the present invention, the resistance of the second electrode 292 may be lowered by connecting the second electrode 292 to the auxiliary electrode 296, thereby improving the problem of luminance unevenness .

The auxiliary electrode 296 may be formed on a different layer from the first electrode 262 and overlapped with the first electrode 262 so that the area of the first electrode 262 is increased so that the area of the first electrode 262 Is increased. Therefore, the aperture ratio is increased, and the efficiency and life of the display device can be improved.

A method of manufacturing an organic light emitting diode display according to a second embodiment of the present invention will be described with reference to the drawings.

6A to 6G are cross-sectional views illustrating a display device in each step of the manufacturing process of the organic light emitting diode display device according to the second embodiment of the present invention.

6A, a semiconductor material is deposited on the insulating substrate 210 to form a semiconductor material layer (not shown), and then a semiconductor material layer is selectively removed through a photolithography process using a mask, (222).

Here, the insulating substrate 210 may be a glass substrate or a plastic substrate. In addition, the semiconductor layer 222 may be made of an oxide semiconductor material, and the oxide semiconductor material may be indium gallium zinc oxide (IGZO) or indium tin zinc oxide (ITZO) ), Indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium oxide (IGO), or indium aluminum zinc oxide : IAZO). At this time, a light shielding pattern (not shown) and a buffer layer (not shown) may be further formed under the semiconductor layer 222.

Alternatively, the semiconductor layer 222 may be made of polycrystalline silicon.

Next, a gate insulating layer 230 is formed on the entire surface of the substrate 210 by depositing an insulating material on the semiconductor layer 222 by chemical vapor deposition or the like. A gate insulating film 230 can be formed of an inorganic insulating material such as silicon oxide (SiO ₂₎ or silicon nitride (SiNx). When the semiconductor layer 222 is formed of an oxide semiconductor material, the gate insulating layer 230 is preferably formed of silicon oxide (SiO ₂ ).

Next, a conductive material such as a metal is deposited on the gate insulating layer 230 by sputtering or the like to form a first conductive material layer (not shown), and then, through a photolithography process using a mask, The gate electrode 232 is formed. The gate electrode 232 has a width narrower than that of the semiconductor layer 222 and is positioned corresponding to the center of the semiconductor layer 222.

The gate electrode 232 may be formed of at least one of aluminum (A), copper (Cu), molybdenum (Mo), chromium (Cr), nickel (Ni), tungsten (W)

On the other hand, a first capacitor electrode (not shown) and a gate wiring (not shown) are formed together with the gate electrode 232. Although not shown, the first capacitor electrode is connected to the gate electrode 232, and the gate wiring extends along the first direction.

An interlayer insulating layer 240 is formed on the entire surface of the substrate 210 by depositing or coating an insulating material on the gate electrode 232. An interlayer insulating layer 240 and a gate insulating layer 230 Are selectively removed to form first and second contact holes 240a and 240b that expose both upper surfaces of the semiconductor layer 222. [ The first and second contact holes 240a and 240b are spaced apart from the gate electrode 232 on both sides of the gate electrode 232.

The interlayer insulating film 240 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx), or may be formed of an organic insulating material such as benzocyclobutene or photo acryl .

Next, a conductive material such as metal is deposited on the interlayer insulating layer 240 by sputtering or the like to form a second conductive material layer (not shown), and then, through a photolithography process using a mask, The source and drain electrodes 252 and 254 are formed. The source and drain electrodes 252 and 254 are spaced apart from each other around the gate electrode 232 and are in contact with both sides of the semiconductor layer 222 through the first and second contact holes 240a and 240b.

The source and drain electrodes 252 and 254 are formed of at least one of aluminum (A), copper (Cu), molybdenum (Mo), chromium (Cr), nickel (Ni), tungsten .

On the other hand, a data line (not shown), a second capacitor electrode (not shown) and a power line (not shown) are formed together with the source and drain electrodes 252 and 254. Although not shown, the data line extends along the second direction, and intersects the gate line to define the pixel region. The second capacitor electrode is connected to the drain electrode 254, and the power supply wiring is located apart from the data wiring.

Next, as shown in FIG. 6B, a protective film 260 is formed on the entire surface of the substrate 210 by depositing or applying an insulating material on the source and drain electrodes 252 and 254, and a photolithography process using a mask A drain contact hole 260a is formed to expose the drain electrode 254 by selectively removing the passivation layer 260. [ The drain contact hole 260a is formed directly on the second contact hole 240b and the drain contact hole 260a may be formed apart from the second contact hole 240b.

The protective film 260 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x), or an organic insulating material such as benzocyclobutene or photo acryl, It is preferable to be formed of an organic insulating material so as to have a flat surface.

Next, a conductive material having a relatively high work function is deposited on the passivation layer 260 by sputtering or the like to form a first electrode material layer (not shown). Through the photolithography process using the mask, The first electrode 262 is formed. The first electrode 262 is located in each pixel region and contacts the drain electrode 254 through the drain contact hole 260a.

The first electrode 262 may include a transparent conductive layer and a reflective layer. The transparent layer may be made of indium tin oxide (ITO) or indium zinc oxide (IZO), and the reflective layer may be made of an aluminum-palladium-copper (APC) alloy ≪ / RTI > For example, the first electrode 262 may have a triple-layer structure of ITO / APC / ITO.

Next, as shown in FIG. 6C, a bank material layer (not shown) is formed on the entire surface of the substrate 210 by depositing or applying an insulating material on the first electrode 262, and a photolithography process using a mask A bank layer 270 having a transmission hole 270a is formed by selectively removing the bank material layer. The bank layer 270 covers the edge of the first electrode 262 and the first electrode 262 is exposed through the transmission hole 270a.

6D, a hole injecting material and a hole transporting material (not shown) are formed by a solution process using an injecting device (not shown) on the exposed first electrode 262 in the through hole 270a. And a hole injecting layer 281, a hole transporting layer 282, and a light emitting material layer 283 are sequentially formed. As a solution process, a printing method or a coating method may be used. For example, ink-jetting, nozzle printing, or screen printing may be used.

Here, the light emitting material layer 283 of FIG. 6D may be any one of red, green, and blue light emitting material layers, and the remaining light emitting material layers are sequentially formed in adjacent pixel regions. For example, the luminescent material layer 283 of Fig. 6D may be a red luminescent material layer in the red pixel region. Accordingly, a red luminescent material is formed through a solution process to form a red luminescent material layer 283 in a red pixel region, a green luminescent material is formed through a solution process, and a green luminescent material layer (not shown) And a blue light emitting material is formed through a solution process to form a blue light emitting material layer (not shown) in a blue pixel region. The order of formation of the red, green and blue luminescent material layers may be changed.

6E, an electron transporting material and an electron injecting material are vacuum-deposited on the light emitting material layer 283 to sequentially form an electron transporting layer 284 and an electron injecting layer 285 on the entire surface of the substrate 210 .

The hole injecting layer 281 and the hole transporting layer 282, the light emitting material layer 283, the electron transporting layer 284 and the electron injecting layer 285 on the first electrode 262 constitute the light emitting layer 280.

When a hole injecting layer 281, a hole transporting layer 282, a light emitting layer 283, an electron transporting layer 284 and an electron injecting layer 285 are formed for each pixel region by vacuum deposition using a fine metal mask, There arises problems such as alignment accuracy between the mask and the substrate 210 and mass production. As the size of the substrate 210 increases, problems such as deflection of the mask may occur. A hole injection layer 281 and a hole transport layer 282 and a light emitting material layer 283 are formed through a solution process and an electron transport layer 284 and an electron injection layer 285 are formed on the entire surface of the substrate 210 in a vacuum The problem of alignment accuracy between the mask and the substrate 210 and problems such as mask deflection can be prevented.

The hole injecting layer 281 and the hole transporting layer 282 may be formed on the entire surface of the substrate 210. The hole injecting layer 281 and the hole transporting layer 282 may be formed by a vacuum deposition method.

A second electrode 292 is formed on the entire surface of the substrate 210 by depositing a conductive material having a relatively low work function on the electron injection layer 285 by sputtering or the like. The second electrode 292 may be formed of a metal material such as aluminum, magnesium, and silver, and has a relatively small thickness so that light is transmitted.

Next, an organic material is vacuum-deposited on the second electrode 292 to form a capping layer 294 on the entire surface of the substrate 210.

Next, as shown in Fig. 6F, the conductive solution layer 296a is formed by injecting the conductive solution onto the bank layer 270 using the injection device 298. [ The conductive solution layer 296a melts the capping layer 294 on the bank layer 270 and contacts the lower second electrode 292. Here, the conductive solution layer 296a may be formed by an ink jetting method, a nozzle printing method, a screen printing method, or the like in an atmospheric nitrogen (N ₂ ) atmosphere. At this time, since the thickness of the conductive solution layer 296a is varied according to the number of times of application, the required thickness can be obtained by controlling the number of times of application. The thickness of the thin film formed by the printing method in one application is thicker do. Therefore, the conductive solution layer 296a having a desired thickness can be formed by applying 1 to 10 times in the case of the ink-jet method and applying 1 to 2 times in the case of the printing method.

The conductive solution includes a solute of the metal material and a solvent capable of dissolving the organic material of the capping layer 294. The solute may be at least one of gold (Au) and silver (Ag), aluminum (Al), copper (Cu), and alloys thereof. The form of the solute is not limited as long as it can be dissolved in a solvent. and may be a nanowire or paste. The solvent dissolves the organic material of the capping layer 294 and facilitates the contact of the solute with the second electrode 292 and the hole injecting layer 281, the hole transporting layer 282 or the light emitting material layer 283 May be the same as the solvent of the organic solution used in the solution process. For example, the solvent may be selected from the group consisting of ethylene glycol, 4-methylanisole, ethyl benzoate, isopropyl alcohol (IPA), acetone, N-methyl pyrrolidone.

Subsequently, as shown in FIG. 6G, the conductive solution layer (296a in FIG. 6F) is dried to form an auxiliary electrode 296 made of a solute of a metal material on the bank layer 270. Next, as shown in FIG. The auxiliary electrode 296 contacts the second electrode 292 to lower the resistance of the second electrode 292. At this time, the conductive solution layer (296a in FIG. 6F) may be dried by vacuum drying and / or heat drying. For example, in the case of vacuum drying, it can be carried out at a pressure of 10 ^-2 torr or less for about 5 minutes to 60 minutes, and in the case of heat drying, for 0.5 to 4 hours at a pressure of 10 ³ torr or less, Vacuum drying and heating and drying may be repeated one or more times.

In the organic light emitting diode display device according to the second embodiment of the present invention, since the auxiliary electrode 296 is formed through the solution process after the formation of the capping layer 294, the process can be simplified and the manufacturing time and cost can be reduced.

Further, the thickness of the auxiliary electrode 296 formed by the solution process can be easily adjusted. Therefore, the thickness of the auxiliary electrode 296 can be increased to reduce the area of the auxiliary electrode 296, thereby increasing the aperture ratio.

- Third Embodiment -

FIG. 7A is a plan view schematically showing an organic light emitting diode display device according to a third embodiment of the present invention, and FIG. 7B is a cross-sectional view schematically showing a bank layer of the organic light emitting diode display device according to the third embodiment of the present invention And Figs. 7A and 7B show a structure corresponding to one pixel. Here, one pixel includes red, green, and blue sub-pixels SP1, SP2, and SP3, and each of the sub-pixels SP1, SP2, and SP3 corresponds to one pixel region P. The organic light emitting diode display device according to the third embodiment of the present invention has the same structure as the organic light emitting diode display device according to the second embodiment shown in FIG. 4, and a description thereof will be omitted.

7A and 7B, a first electrode 362 is formed for each pixel region P and a bank layer 370 is formed over the first electrode 362. The bank layer 370 covers the edge of the first electrode 362 and has a through hole 370a for exposing the first electrode 262. [ The bank layers 370 corresponding to the adjacent pixel regions P are integrally connected to each other.

A light emitting layer (not shown) is formed on the first electrode 362 exposed through the transmission hole 370a of the bank layer 370. A second electrode (not shown) (Not shown). An auxiliary electrode 396 is formed on the second electrode on the bank layer 370 and a capping layer (not shown) is formed on the second electrode except for the auxiliary electrode 396.

The auxiliary electrode 396 extends in the first direction and the second direction on the substrate and has a lattice shape including one opening per pixel. That is, auxiliary electrodes are not formed between adjacent sub-pixels SP1, SP2, SP3 in one pixel.

Therefore, the width of the bank layer 370 between the adjacent sub-pixels SP1, SP2 and SP3 in one pixel can be narrower than the width of the bank layer (270 in Fig. 5B) in the second embodiment, Can be increased and the aperture ratio can be increased. At this time, by adjusting the thickness of the auxiliary electrode 396, the resistance of the second electrode can be made the same as in the second embodiment.

On the other hand, although not shown, the auxiliary electrode may have one opening corresponding to two pixels. That is, the auxiliary electrode has one opening corresponding to the adjacent first and second pixels, and between the first pixel and the second pixel, between the adjacent sub-pixels in the first pixel, and the sub-pixel adjacent in the second pixel, No auxiliary electrode is formed.

Therefore, the width of the bank layer between the first pixel and the second pixel can be narrower than the width of the bank layer (370 in Fig. 7B) between adjacent pixels in the third embodiment, The aperture ratio can be further increased. At this time, by adjusting the thickness of the auxiliary electrode, the resistance of the second electrode can be made the same as in the third embodiment.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention as defined in the appended claims. And changes may be made without departing from the spirit and scope of the invention.

110, 210: substrate 122, 222: semiconductor layer
130, 230: gate insulating film 132, 232: gate electrode
140, 240: interlayer insulating film 140a, 240a, 140b, 240b: first and second contact holes
152, 252: source electrode 154, 254: drain electrode
160, 260: protective film 160a, 260a: drain contact hole
162, 262, 362: first electrode 164, 296, 396: auxiliary electrode
170, 270, 370: bank layer 170a, 270a, 370a: transmission hole
170b: auxiliary contact hole 180, 280: light emitting layer
181, 281: Hole injection layer 182, 282: Hole transport layer
183, 283: light emitting material layer 184, 284: electron transporting layer
185, 285: electron injection layer 192, 292: second electrode
194, 294: capping layer 298: injection device
P: pixel region SP1, SP2, SP3: sub pixel

Claims (10)

Claims [1]
A thin film transistor on the substrate;
A first electrode connected to a drain electrode of the thin film transistor;
A bank layer covering an edge of the first electrode and having a through hole corresponding to the first electrode;
A light emitting layer located above the first electrode in the transmission hole;
A second electrode on the light emitting layer;
An auxiliary electrode located above the bank layer and in contact with the second electrode;
The capping layer located above the second electrode except for the auxiliary electrode,
And an organic light emitting diode (OLED) display device.
The method according to claim 1,
Wherein the organic light emitting diode display device includes a plurality of sub pixels, and the auxiliary electrode has one opening corresponding to the pixel.
The method according to claim 1,
Wherein the organic light emitting diode display device includes a plurality of sub pixels, and the auxiliary electrode has one opening corresponding to each of the sub pixels.
The method according to claim 1,
Wherein the organic light emitting diode display device includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to two neighboring pixels.
The method according to claim 1,
And the auxiliary electrode overlaps with the first electrode.
The method according to claim 1,
Wherein the auxiliary electrode comprises at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and an alloy thereof, and the capping layer is made of an organic material .
Forming a thin film transistor on a substrate;
Forming a first electrode connected to a drain electrode of the thin film transistor on the thin film transistor;
Forming a bank layer having a transmission hole exposing the first electrode;
Forming a light emitting layer located above the first electrode in the transmission hole;
Forming a second electrode on the entire surface of the substrate above the light emitting layer;
Forming a capping layer on the entire surface of the substrate above the second electrode;
Forming an auxiliary electrode in contact with the second electrode by spraying a conductive solution onto the capping layer corresponding to the bank layer
Wherein the organic light emitting diode display device comprises:
8. The method of claim 7,
The forming of the auxiliary electrode may include spraying the conductive solution to dissolve the capping layer on the bank layer to form a conductive solution layer in contact with the second electrode and drying the conductive solution layer Wherein the organic light emitting diode display device comprises:
9. The method of claim 8,
Wherein the conductive solution comprises a solute of a metal material and a solvent and the solute is at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu) A method of manufacturing a diode display device.
10. The method of claim 9,
The light emitting layer includes a hole injecting layer, a hole transporting layer, a light emitting material layer, an electron transporting layer, and an electron injecting layer. At least one of the hole injecting layer, the hole transporting layer, and the light emitting material layer is formed by a solution process using an organic solution, Wherein the solvent of the organic solution is the same as the solvent of the conductive solution.

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