KR20160055378A - Liquid Crystal Display Device and Driving Method thereof - Google Patents

Abstract

The present invention relates to a liquid crystal display device which comprises a first substrate, a gate line, a data line, a thin film transistor, a common electrode, a pixel electrode, and a storage capacitor. The gate line is located on the first substrate. The data line is located on the first substrate and crosses the gate line. The thin film transistor is located in a non-transmission unit. The pixel electrode is located in the non-transmission unit. The storage capacitor comprises a storage capacitor prepared by the pixel electrode adjacent to the common electrode. Therefore, the liquid crystal display device can maximize liquid crystal driving efficiency, obtain a capacity of the storage capacitor, and maximize a transmission rate and an aperture rate.

Description

[0001] The present invention relates to a liquid crystal display device and a driving method thereof,

The present invention relates to a liquid crystal display device and a driving method thereof.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting diode (OLED) display and a plasma liquid crystal display (PDP) ) Have been increasing. Among them, liquid crystal display devices capable of realizing high resolution and capable of not only miniaturization but also enlargement are widely used.

A liquid crystal display device includes a liquid crystal panel and a backlight unit. The liquid crystal panel includes a transistor substrate formed with a thin film transistor, a storage capacitor, and the like, and a liquid crystal layer disposed between the color filter substrate and the color filter substrate on which the color filter and the black matrix are formed.

The liquid crystal panel includes subpixels. The subpixels include a pixel electrode and a common electrode for applying an electric field to the liquid crystal layer, respectively. Light emitted from the backlight unit is emitted through the transmissive portion of the subpixel. The transmittance of light is defined corresponding to the size of the transmissive portion of the subpixel.

However, in the liquid crystal display device proposed in the related art, the pixel electrode and the common electrode have to be formed in the transmissive portion of the subpixel on the driving characteristic of the liquid crystal. Accordingly, the liquid crystal display device proposed in the related art is expected to be difficult to satisfy the transmittance, the space (capacity) of the storage capacitor, and the driving efficiency of the liquid crystal when the liquid crystal panel is realized with an ultra-high resolution. do.

In order to solve the above problems, the present invention provides a liquid crystal display device capable of maximizing a liquid crystal driving efficiency, securing a capacity of a storage capacitor, and maximizing a transmittance and an aperture ratio.

The present invention relates to a liquid crystal display device including a first substrate, a gate line, a data line, a thin film transistor, a common electrode, a pixel electrode, and a storage capacitor. The gate line is located on the first substrate. The data lines are located on the first substrate and cross the gate lines. The thin film transistor is located at the non-transducer portion where the gate line and the data line intersect. The common electrode is located at the non-transmissive portion. The pixel electrode is located at the non-transmissive portion. The storage capacitor includes a storage capacitor provided by a pixel electrode adjacent to the common electrode.

And a barrier rib positioned corresponding to the data line, wherein the common electrode and the pixel electrode may be located on the barrier rib.

A data line disposed on the first insulating film; a second insulating film located on the first insulating film and covering the data line; and a second insulating film located on the second insulating film and corresponding to the data line A lower electrode positioned on the barrier rib, a third insulating film located on the lower electrode, and an upper electrode located on the third insulating film.

The area occupied by the lower electrode and the upper electrode may be different.

The lower electrode may be formed to cover both side surfaces and the upper surface of the barrier rib, and the upper electrode may be formed to cover one side of the barrier rib.

The barrier ribs may have a constant taper shape so that the lower electrode and the upper electrode are formed with a slope.

The lower electrode and the upper electrode may be selected as an opaque metal material.

In another aspect, the present invention relates to a liquid crystal display, comprising: a first substrate; A sub-pixel located on the first substrate and having a transmissive portion and a non-transmissive portion; And a liquid crystal panel including subpixels, wherein the pixel electrode and the common electrode of the subpixel are formed only in the non-transmissive portion.

In another aspect, the present invention relates to a liquid crystal display, comprising: a first substrate; A sub-pixel located on the first substrate and having a transmissive portion and a non-transmissive portion; And a liquid crystal panel including subpixels, wherein only the first substrate and the insulating film are located in the transmissive portion of the subpixel.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display, comprising: supplying a gate signal and a data signal such that a horizontal electric field is formed between a pixel electrode located on one side wall and a common electrode located on the other side wall; ; And providing light so that the liquid crystal is rotated corresponding to the horizontal electric field and the image is displayed based on the transmitted light.

Since the electrodes are not formed in the transmissive portion (or the active region) of the subpixel, the maximum LC mode efficiency can be achieved, and the electrodes located in the transmissive portion disappear, thereby improving the transmissivity and the aperture ratio There is an effect that can be. Further, since the storage capacitor is formed on the side surface of the partition corresponding to the length of the non-penetration portion, sufficient space (capacity) can be ensured, and as a result, driving in the form of one block IPS (IPS) It is possible to secure the maximum transmittance in contrast. In addition, when the liquid crystal panel is implemented at an ultra-high resolution, the present invention has the effect of increasing the degree of freedom of design so as to satisfy the transmittance, the space (capacity) of the storage capacitor, and the driving efficiency of the liquid crystal.

1 is a block diagram schematically showing a liquid crystal display device.
2 is a circuit configuration diagram of the subpixel shown in FIG.
FIGS. 3 and 4 are views showing transmittances of the electrodes and the transmissive portion located in the transmissive portion of the conventional liquid crystal panel.
5 is a plan view of a subpixel according to an embodiment of the invention.
6 is a cross-sectional view of the region A1-A2 of Fig. 5;
7 is a cross-sectional view of the thin film transistor portion of FIG.
8 is a view showing transmittance of a transmissive portion of a liquid crystal panel according to an embodiment of the present invention.
9 is a view for explaining driving characteristics of a subpixel according to an embodiment of the present invention;
Figs. 10 and 11 illustrate exemplary alignment angles of the liquid crystal layer. Fig.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram schematically showing a liquid crystal display device, and FIG. 2 is a circuit block diagram of the subpixel shown in FIG.

1 and 2, a liquid crystal display includes a timing controller 130, a gate driver 140, a data driver 150, a liquid crystal panel 160, and a backlight unit 170.

The timing controller 130 receives a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, a clock signal, and a data signal from the outside. The timing controller 130 controls the operation timings of the data driver 150 and the gate driver 140 using timing signals such as a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a clock signal.

The timing controller 130 can determine the frame period by counting the data enable signal of one horizontal period, so that the vertical synchronizing signal and the horizontal synchronizing signal supplied from the outside can be omitted. The control signals generated by the timing controller 130 include a gate timing control signal GDC for controlling the operation timing of the gate driver 140 and a data timing control signal DDC for controlling the operation timing of the data driver 150. [ ) May be included.

The gate driver 140 outputs a gate signal while shifting the level of the gate voltage in response to the gate timing control signal GDC supplied from the timing controller 130. The gate driver 140 supplies a gate signal to the liquid crystal panel 160 through the gate lines GL. The gate driver 140 may be formed in the form of an IC or a gate in panel in the liquid crystal panel 160.

The data driver 150 samples and latches the data signal DATA in response to the data timing control signal DDC supplied from the timing controller 130 and converts the sampled data signal into an analog form corresponding to the gamma reference voltage. The data driver 150 supplies the data signal DATA to the liquid crystal panel 160 through the data lines DL. The data driver 150 is formed in an IC form.

The liquid crystal panel 160 displays an image corresponding to the gate signal and the data signal DATA supplied from the driving unit including the gate driving unit 140 and the data driving unit 150. The liquid crystal panel 160 includes a first substrate on which a thin film transistor or the like is formed, a second substrate on which a color filter or the like is formed, and a liquid crystal layer interposed between the first substrate and the second substrate. A lower polarizer is attached to the lower surface of the first substrate, and an upper polarizer is attached to the upper surface of the second substrate. The liquid crystal panel 160 includes a plurality of sub-pixels SP for controlling light provided through the backlight unit 170.

One sub-pixel includes a switching transistor TFT, a storage capacitor Cst, and a liquid crystal layer Clc. The gate electrode of the switching transistor TFT is connected to the gate line GL1 and the source electrode thereof is connected to the data line DL1.

One end of the storage capacitor Cst is connected to the drain electrode of the switching transistor TFT and the other end is connected to the common voltage line Vcom. The liquid crystal layer Clc is formed between the pixel electrode 1 connected to the drain electrode of the switching transistor TFT and the common electrode 2 connected to the common voltage line Vcom.

The backlight unit 170 provides light to the liquid crystal panel 160. The backlight unit 170 includes a light emitting diode (hereinafter, LED), an LED driver for driving the LED, a light guide plate for converting the light emitted from the LED into a surface light source, and optical sheets for condensing and diffusing light emitted from the light guide plate .

Hereinafter, the description of the embodiments of the present invention will be described in addition to the problems of the prior art.

5 is a plan view of a sub-pixel according to an embodiment of the present invention. FIG. 6 is a cross-sectional view taken along the line A1- FIG. 7 is a cross-sectional view of a thin film transistor portion of FIG. 5, and FIG. 8 is a view illustrating a transmittance of a transmissive portion of a liquid crystal panel according to an embodiment of the present invention.

The liquid crystal display displays an image by adjusting the amount of light emitted through the transmissive portion of the subpixel. The transmittance that determines the amount of light is defined corresponding to the size of the transmissive portion of the subpixel.

However, in the liquid crystal display device proposed in the related art, the pixel electrodes PXL and the transmissive portions of the subpixels defined on the first substrate 160a, as shown in FIGS. 3A and 4A, The common electrode Vcom could not be formed. Therefore, in order to solve the transmittance problem, the pixel electrode PXL and the common electrode Vcom are formed of a transparent oxide (for example, ITO) or the like.

However, in the liquid crystal display device proposed in the related art, from the problem of lowering the transmittance due to the pixel electrode (PXL) and the common electrode (Vcom) located in the transmissive portion as in the TDA region of (b) I could not be completely free.

In particular, in the structure of FIG. 4, the pixel electrode PXL is separated in the transmissive portion, while the common electrode Vcom is formed to correspond to the transmissive portion (transparent electrode passes through twice). 3 (b) and FIG. 4 (b), the transmittance of the structure of FIG. 4 is lower than that of FIG.

In the liquid crystal display device proposed in the related art, the transmittance and the liquid crystal driving efficiency are reduced, and when the pixel pitch is reduced, the area of the electrode becomes smaller, so that it is difficult to secure a storage capacitor.

As a result, in the liquid crystal display device proposed in the related art, it is expected that when the liquid crystal panel is realized with an ultra-high resolution due to the electrodes located in the transmissive portion, it is difficult to satisfy the transmittance, the space of the storage capacitor and the driving efficiency of the liquid crystal.

Therefore, one embodiment of the present invention is designed in the following conditions to avoid the problem of the transmittance of the transmissive portion, which is a problem of the conventional liquid crystal display.

A pixel electrode and a common electrode necessary for liquid crystal driving are formed on the non-transmissive portion close to the vertical electrode shape so that electrodes are not present in the transmissive portion. The storage capacitor is formed in the non-transmissive portion corresponding to the electrodes formed in the form of the vertical electrode. Accordingly, the present invention can provide many advantages in realizing a liquid crystal panel with an ultra-high resolution, such as maximizing the liquid crystal driving efficiency, securing the capacity of the storage capacitor, maximizing the transmittance and the aperture ratio.

Hereinafter, an embodiment of the present invention will be described in detail as follows.

As shown in FIG. 5, the Nth sub-pixel SPn is formed in the intersection region of the N th data line DLn and the N th gate line GLn located on the first substrate 160a. The Nth sub-pixel SPn includes a thin film transistor TFT, a storage capacitor Cst, a pixel electrode PXL, and a common electrode Vcom which are located in a non-transmissive portion (region excluding a transmissive portion).

The pixel electrode PXL and the common electrode Vcom are formed in a line shape (or a rectangular shape) corresponding to the Nth data line DLn located in the non-transmissive portion. At this time, the common electrode Vcom may be formed to occupy an area larger than the area occupied by the pixel electrode PXL. This is because the first side of the common electrode Vcom forms a storage capacitor with the adjacent pixel electrode PXL and the second side located on the opposite side forms an electric field with the pixel electrode PXL apart from the pixel electrode PXL .

The thin film transistor TFT is formed with a source electrode, a drain electrode, and a gate electrode in the intersection region of the Nth data line DLn and the Nth gate line GLn. The storage capacitor Cst is formed by the pixel electrode PXL and the common electrode Vcom located in parallel with the Nth data line DLn. At this time, the capacitance of the storage capacitor Cst corresponds to the area occupied by the pixel electrode PXL and the common electrode Vcom.

As shown in FIGS. 5 and 6, a first insulating layer 162 is formed on the first substrate 160a. The first insulating layer 162 may be a single layer or multiple layers of a silicon oxide layer (SiOx) or a silicon nitride layer (SiNx).

A data metal layer 164 is formed on the first insulating film 162. A part of the data metal layer 164 becomes a data line. In addition, a part of the data metal layer 164 becomes the source electrode and the drain electrode of the thin film transistor TFT. The data metal layer 164 may be formed of one or an alloy selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, And may be a single layer or a multilayer.

A second insulating layer 165 is formed on the first insulating layer 162. The second insulating film 165 may be formed of an organic material such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), a polyimide, a benzocyclobutene series resin, an acrylate, a photoacrylate, ≪ / RTI >

A barrier rib 166 is formed on the second insulating film 165. The barrier ribs 166 are located in a line shape corresponding to the data metal layer (or data line) 164 located in the non-transmissive portion. The barrier rib 166 has a structure in which an electrode can be formed on a side surface thereof. For this, the barrier rib 166 has a larger area on the side facing the partition wall adjacent to the lower surface or the upper surface.

For example, the barrier rib 166 is formed in a constant tapered shape (or trapezoidal shape) having a height such that the lower surface is wider than the upper surface and the electrode can be formed on the side surface. Therefore, both side surfaces of the barrier rib 166 are inclined. Meanwhile, the barrier rib 166 corresponds to a relatively high structure among the structures positioned between the first substrate 160a and the second substrate 160b. Therefore, the barrier rib 166 may also serve as a spacer for maintaining a cell gap between the first substrate 160a and the second substrate 160b.

A common electrode 167 (Vcom) connected to the common voltage line is formed on the barrier rib 166. The common electrode 167 (Vcom) is formed so as to cover both side surfaces and the upper surface of the partition 166 located at the non-transmissive portion. Since the common electrode 167 and Vcom are formed on the barrier ribs 166 located in the non-transmissive portion, the common electrode 167 and the common electrode 167 may be formed of a metal such as molybdenum (Mo), aluminum (Al), chrome (Cr) Titanium (Ti), nickel (Ni), copper (Cu), and the like.

Therefore, when the common electrode 167 (Vcom) is formed of an opaque metal material, it has a low resistance structure together with a common voltage line. As the side surfaces of the barrier rib 166 are inclined, the common electrode 167 (Vcom) has a slope. Since the common electrode 167 (Vcom) forms an electric field together with the pixel electrode 169 (PXL), its slope is preferably as close as possible to the vertical direction.

A third insulating film 168 is formed on the common electrode 167 (Vcom). The third insulating layer 168 may be a single layer or multiple layers of a silicon oxide (SiOx) layer or a silicon nitride (SiNx) layer. The third insulating film 168 serves as an insulating film that constitutes a storage capacitor between the pixel electrode 169 and the common electrode 167 (Vcom), which are formed later, while insulating the common electrode 167 (Vcom). Therefore, the third insulating film 168 can be formed with a material and a thickness that can sufficiently secure the capacity of the storage capacitor.

On the third insulating film 168, pixel electrodes 169 (PXL) are formed. The pixel electrodes 169 and PXL are formed to cover one side (or one side surface and the upper surface) of the barrier ribs 166 located in the non-transmissive portion. Since the pixel electrodes 169 and PXL are formed on the barrier ribs 166 located in the non-transmissive portion, the pixel electrodes 169 and PXL may be formed of molybdenum (Mo), aluminum (Al), chromium (Cr) Titanium (Ti), nickel (Ni), copper (Cu), and the like.

Therefore, when the pixel electrode 169 (PXL) is formed of an opaque metal material, it has a low resistance structure. As the side surfaces of the barrier rib 166 are inclined, the pixel electrode 169 (PXL) has a slope. Since the pixel electrodes 169 and PXL form an electric field together with the common electrode 167 (Vcom), the slope thereof is preferably as close as possible to the vertical direction.

A color filter CF is formed on the second substrate 160b. The color filter (CF) serves to convert the color of light. The color filter CF converts the color of light emitted through the transmissive portion to red, green or blue. Therefore, the color filter CF may be formed only at a position corresponding to the transmissive portion of the Nth sub-pixel SPn. In the embodiment, the color filter CF is formed on the inner surface of the second substrate 160b facing the first substrate 160a. However, the position of the color filter CF is not limited thereto.

A black matrix BM is formed on the color filter CF. The black matrix BM is formed corresponding to the non-transmissive portion. The black matrix BM serves to substantially define the size (region) of the transmissive portion, and prevents the problem that the light passing through the transmissive portion is mixed with another color (crosstalk). For this purpose, the black matrix (BM) may be made of a resin including black pigment, but is not limited thereto. Meanwhile, in the embodiment, the black matrix BM is formed on the inner surface of the second substrate 160b facing the first substrate 160a. However, the position of the black matrix BM is not limited thereto.

Hereinafter, an example of a thin film transistor (TFT) will be described with reference to FIGS. 5 to 7. FIG.

As shown in FIGS. 5 to 7, a gate metal layer 161 (G) is formed on the first substrate 160a. A part of the gate metal layer 161 (G) becomes the gate electrode of the thin film transistor (TFT). A part of the gate metal layer 161 (G) becomes a gate line. The gate metal layers 161 and G may be formed of one selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni and Cu. And may be composed of a single layer or multiple layers.

A first insulating layer 162 is formed on the gate metal layer 161 (G). The first insulating layer 162 may be a single layer or multiple layers of a silicon oxide layer (SiOx) or a silicon nitride layer (SiNx).

A semiconductor layer 163 is formed on the first insulating film 162. The semiconductor layer 163 may be selected from the group consisting of a silicon (Si) -based oxide, an oxide-based semiconductor, a graphene-based semiconductor including carbon nanotubes (CNT), a nitride semiconductor, and an organic semiconductor semiconductor .

On the first insulating film 162, data metal layers 164a and 164b are formed. The data metal layers 164a and 164b cover the source and drain regions of the semiconductor layer 163 and are also electrically connected. The data metal layers 164a and 164b are divided into the source electrode 164a and the drain electrode 164b and the source electrode 164b of the thin film transistor TFT. The data metal layers 164a and 164b may be formed of one selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, And may be composed of a single layer or multiple layers.

A second insulating film 165 is formed on the data metal layers 164a and 164b. The second insulating layer 165 may be formed of a material such as silicon oxide (SiOx), silicon nitride (SiNx), polyimide, benzocyclobutene series resin, acrylate, And may be formed of an organic material such as a photoacrylate. The second insulating film 165 has a contact hole CH exposing a part of the drain electrode 164b (D).

On the second insulating film 165, pixel electrodes 169 (PXL) are formed. The pixel electrodes 169 and PXL are electrically connected to the drain electrodes 164b and 164b of the thin film transistor TFT through the contact holes CH of the second insulating film 165. [

In the above description, the thin film transistor (TFT) is formed in a staggered form. However, this is only one example. A thin film transistor (TFT) may be formed in a coplanar form or another form.

The first substrate 160a and the second substrate 160b described above are arranged so that structures formed on the first substrate 160a and the second substrate 160b face each other and are sealed together by an adhesive member. A liquid crystal layer is interposed between the first substrate 160a and the second substrate 160b which are sealed together.

The Nth subpixel SPn is connected to the Nth data line DLn, the Nth gate line GLn, the thin film transistor TFT, the storage capacitor Cst, the pixel electrode PXL And the common electrode Vcom, as well as the wiring and the electrode and the element are formed. In the Nth sub-pixel SPn, an electrode or the like is not formed in the transmissive portion.

8, a liquid crystal panel may be implemented as a sub-pixel having a structure in which the common electrode Vcom and the pixel electrode PXL are located on the barrier rib 166, It can be completely free from the problem of lowering the transmittance. As can be seen from the description, the reason why the transmissivity is not completely reduced is that the common electrode Vcom and the pixel electrode PXL are not located in the transmissive portion.

Hereinafter, examples of the driving characteristics of the sub-pixels and the alignment angle of the liquid crystal layer according to an embodiment of the present invention will be described.

FIG. 9 is a view for explaining driving characteristics of a subpixel according to an embodiment of the present invention, and FIGS. 10 and 11 are illustrations of alignment angles of a liquid crystal layer.

9, a subpixel according to an exemplary embodiment of the present invention includes a pixel electrode PXL and a common electrode Vcom formed in a non-transmissive portion close to a vertical electrode, The storage capacitor Cst is formed by the electrode Vcom.

When the thin film transistor is driven in response to the data voltage stored in the storage capacitor Cst, a horizontal electric field E is generated between the pixel electrode PXL located on one side wall and the common electrode Vcom located on the other side wall .

The liquid crystal located therebetween is rotated by the horizontal electric field E formed between the pixel electrode PXL located on one side wall and the common electrode Vcom located on the other side wall. The transmittance of light is varied corresponding to the rotation angle of the liquid crystal.

In order to drive the liquid crystal panel using the above characteristics, a gate signal and data (data) are generated so that a horizontal electric field E is formed between the pixel electrode PXL located on one side wall and the common electrode Vcom located on the other side wall. Signal. The liquid crystal is rotated corresponding to the horizontal electric field E, and light is provided to display an image based on the transmitted light.

The liquid crystal layer Clc positioned between the pixel electrode PXL located on one side wall and the common electrode Vcom located on the other side wall is substantially parallel to the data line DL, Respectively. To this end, the alignment film is rubbed at 0 DEG with respect to the Y-axis (y) which is the data line DL.

11, the liquid crystal layer Clc located between the pixel electrode PXL located on one side wall and the common electrode Vcom located on the other side wall is not parallel to the data line DL Respectively. For this purpose, the alignment film is rubbed at 7 DEG with respect to the Y-axis (y) which is the data line DL.

10 and 11, a subpixel according to an exemplary embodiment of the present invention includes a pixel electrode PXL located on one side wall and a horizontal electric field (Vcom) formed between the common electrode Vcom located on the other side wall The liquid crystal is rotated by the electric field E. Therefore, the alignment layer capable of defining the alignment angle of the liquid crystal layer Clc is preferably rubbed at 0 to 7 degrees with respect to the Y-axis (y), which is the data line DL, but is not limited thereto.

In one embodiment of the present invention, a pixel electrode is formed after a common electrode is formed on a barrier rib. However, this is only an example, and a common electrode may be formed after the pixel electrode is formed on the barrier ribs first.

In this case, the pixel electrode and the common electrode may not be formed in a line shape corresponding to the non-transmissive portion but may be formed in another shape (a shape in which some regions are patterned). Therefore, an electrode positioned on the barrier rib can be defined as a lower electrode, and an electrode positioned on the lower electrode can be defined as an upper electrode.

As described above, since the electrodes are not formed in the transmissive portion (or the active region) of the subpixel, the maximum LC mode efficiency can be achieved, and the electrodes located in the transmissive portion disappear, thereby improving the transmissivity and the aperture ratio There is an effect that can be done.

In addition, the present invention can secure a sufficient space (capacity) by forming a storage capacitor on the side of the partition corresponding to the length of the non-transducer portion, and as a result, driving in the form of a one block IPS (In Block Switching) So that it is possible to secure the maximum transmittance with respect to the opening area.

In addition, when the liquid crystal panel is implemented at an ultra-high resolution, the present invention has the effect of increasing the degree of freedom of design so as to satisfy the transmittance, the space (capacity) of the storage capacitor, and the driving efficiency of the liquid crystal.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

130: timing controller 140: gate driver
150: data driver 160: liquid crystal panel
170: Backlight unit TFT: Thin film transistor
Cst: storage capacitor 160a: first substrate
162: first insulating film 164: data metal layer
165: second insulating film 166: barrier rib
167, Vcom: common electrode 168: third insulating film
169, PXL: pixel electrode

Claims (10)

A first substrate;
A gate line positioned on the first substrate;
A data line located on the first substrate and intersecting the gate line;
A thin film transistor located at a non-transmissive portion where the gate line and the data line intersect;
A common electrode located at the non-transducer portion;
A pixel electrode located at the non-transmissive portion; And
And a storage capacitor provided by the pixel electrode adjacent to the common electrode. The method according to claim 1,
Further comprising a partition located in correspondence with the data line,
And the common electrode and the pixel electrode are located on the barrier rib. The method according to claim 1,
A first insulating film disposed on the first substrate,
The data line located on the first insulating film,
A second insulating layer located on the first insulating layer and covering the data line,
Barrier ribs located on the second insulating layer and corresponding to the data lines,
A lower electrode positioned on the barrier rib,
A third insulating film located on the lower electrode,
And an upper electrode positioned on the third insulating film. The method of claim 3,
Wherein the area occupied by the lower electrode and the area occupied by the upper electrode is different. The method of claim 3,
Wherein the lower electrode is formed to cover both side surfaces and the upper surface of the partition,
Wherein the upper electrode is formed to cover one side of the barrier rib. The method of claim 3,
The partition wall
Wherein the lower electrode and the upper electrode have a constant taper shape so as to have a slope. The method according to claim 1,
The lower electrode and the upper electrode
And is selected from opaque metal materials. A first substrate;
A sub-pixel located on the first substrate and having a transmissive portion and a non-transmissive portion; And
And a liquid crystal panel including the sub-pixel,
Wherein the pixel electrode and the common electrode of the subpixel are formed only in the non-transmissive portion. A first substrate;
A sub-pixel located on the first substrate and having a transmissive portion and a non-transmissive portion; And
And a liquid crystal panel including the sub-pixel,
And wherein only the first substrate and the insulating film are located in the transmissive portion of the subpixel. Supplying a gate signal and a data signal such that a horizontal electric field is formed between the pixel electrode located on one side wall and the common electrode located on the other side wall; And
And providing light so that an image is displayed on the basis of light transmitted through the liquid crystal rotated and corresponding to the horizontal electric field.

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