KR20160007407A - Organic light emitting display device and method of fabricating the same - Google Patents

Abstract

The present invention relates to an organic light emitting display device and a method for fabricating the same. The organic light emitting display device using a top emission scheme reduces the resistance of a cathode by forming an auxiliary electrode. In addition, the present invention is to prevent damage to a pad electrode due to etchant in patterning an anode by having the pad electrode, which is exposed to the outside, composed of a plurality of pad electrode layers, and sealing a low resistance pad electrode layer by applying a material capable of preventing corrosion caused by moisture or oxygen to an uppermost layer, or applying a clad structure to the pad electrode.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic electroluminescence display device and a method of manufacturing the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting display device and a method of manufacturing the same, and more particularly, to a top emission organic light emitting display device and a method of manufacturing the same.

Recently, there is a growing interest in information display, and as the demand for portable information media increases, research and commercialization of a lightweight flat panel display (FPD) has been focused on.

In such a flat panel display device, a liquid crystal display device (LCD) is one of the remarkable display devices which is light and consumes less power.

As another display device, an organic light emitting display device has a self-emission type and therefore is superior in viewing angle and contrast ratio to a liquid crystal display device. In addition, since a backlight is not required, it is possible to make a light-weight thin type, and it is also advantageous in terms of power consumption. It has the advantage of being able to drive DC low voltage and has a fast response speed.

Hereinafter, the basic structure and operating characteristics of the organic light emitting display will be described in detail with reference to the drawings.

1 is a diagram for explaining the principle of light emission of a general organic light emitting diode.

An organic light emitting display generally includes an organic light emitting diode having a structure as shown in FIG.

1, an organic light emitting diode includes an anode 18 as a pixel electrode, a cathode 28 as a common electrode, and organic compound layers 31, 32, 35, 36, and 37 formed therebetween Respectively.

The hole injection layer 31, the hole transport layer 32, the emission layer 35, the electron injection layer 35, and the hole injection layer 34 are formed on the organic compound layers 31, 32, 35, An electron transport layer 36 and an electron injection layer 37. [

When the positive and negative driving voltages are applied to the anode 18 and the cathode 28, the organic light emitting diode having the above structure passes through the hole transporting layer 32 and the electron transporting layer 36 One electron is moved to the light emitting layer 35 to form an exciton. When excitons are transited from an excited state to a ground state, that is, a stable state, light of a predetermined wavelength is generated.

An organic light emitting display displays an image by arranging sub-pixels in which organic light emitting diodes having the above-described structure are formed in a matrix form and selectively controlling the sub-pixels with a data voltage and a scan voltage.

At this time, the organic light emitting display device is divided into an active matrix method using a passive matrix or a switching element using a TFT. The active matrix method selectively turns on the active element TFT to select the sub-pixel and maintains the emission of the sub-pixel with the voltage held in the storage capacitor.

In addition, the organic light emitting display may be classified into a top emission type, a bottom emission type, and a dual emission type depending on a direction in which light is emitted.

The top emission type organic light emitting display device is a type in which light is emitted in a direction opposite to the substrate on which the sub-pixels are arranged. Such a front emission type organic light emitting display device has an advantage that the aperture ratio can be increased as compared with the backlight emission method in which light is emitted toward the substrate on which the sub-pixels are arranged.

In such a top emission type organic light emitting display, an anode is formed under the organic compound layer and a cathode is formed on the organic compound layer through which light is transmitted.

At this time, the cathode should be formed to be thin (~ 100 Å) in order to be realized as a semi-transparent film having a low work function. In this case, the cathode has a high resistance.

As described above, in the front emission type organic light emitting display, a voltage drop (IR drop) occurs due to a high specific resistance of the cathode. Accordingly, voltages of different levels are applied to each sub-pixel, resulting in non-uniformity of luminance or image quality. In particular, as the size of the panel increases, the voltage drop can be intensified.

Meanwhile, the organic light emitting display device is divided into a display area and a pad area outside the display area.

At this time, a thin film transistor and an organic light emitting diode are formed in the display region.

The pad region is provided with a thin film transistor from an external power source and a pad electrode for applying a signal voltage to the organic light emitting diode.

At this time, the pad electrode formed in the pad region may cause corrosion due to external moisture and oxygen. In addition, depending on the material constituting the pad electrode, corrosion may also be caused by a specific etchant. When the pad electrode is corroded, signal transmission is not smooth and reliability may be a problem.

An object of the present invention is to provide an organic electroluminescent display device capable of preventing corrosion of the pad electrode exposed to the outside by water and oxygen and preventing the pad electrode from being damaged by the etchant when the anode is patterned, .

It is another object of the present invention to provide an organic light emitting display device and a method of manufacturing the same that can simplify a process required to form a plurality of pad electrode layers.

Other objects and features of the present invention will be described in the following description of the invention and the claims.

According to an aspect of the present invention, there is provided an organic light emitting display including: a thin film transistor in a display region of a substrate; An organic light emitting diode connected to the thin film transistor; And a plurality of pad electrodes formed on the pad region of the substrate and configured to provide a signal to the display region, the pad electrodes including at least a first pad electrode layer, a second pad electrode layer, and a third pad electrode layer.

In this case, the first pad electrode layer is an adhesion promoting layer disposed on the back surface of the second pad electrode layer, and the second pad electrode layer has a lower resistivity than the first pad electrode layer and the third pad electrode layer And the third pad electrode layer may be an etch stopper of the second pad electrode layer disposed on the upper surface of the second pad electrode layer.

The second pad electrode layer may include Cu, and the first pad electrode layer may include molybdenum titanium (MoTi), titanium (Ti), or an alloy thereof.

At this time, the material of the first pad electrode layer may be the same as the material of the third pad electrode layer.

And a protective film configured to cover at least a portion of the first pad electrode layer, the second pad electrode layer, the side surfaces of the third pad electrode layer, and the upper surface of the third pad electrode layer.

The third pad electrode layer may be configured to contact both sides of the first pad electrode layer, and may be configured to seal the second pad electrode layer.

Wherein the organic light emitting diode includes a first electrode, an organic compound layer, and a second electrode, the second pad electrode layer is made of a material etched into an etchant used for patterning the first electrode, Layer may be made of a material which is not etched with the etchant used in patterning the first electrode.

At this time, the first electrode may be composed of one of Ag, Al, and Al or an alloy containing Al.

At this time, the plurality of pad electrodes may not include the same material as the first electrode.

The etchant used in patterning the first electrode may include at least one of phosphoric acid, nitric acid, and acetic acid, and may not include potassium fluoro acid and hydrogen peroxide.

At least a portion of the plurality of pad electrodes may further include a fourth pad electrode layer disposed on a back surface of the first pad electrode layer and contacting the first pad electrode layer.

At this time, the adhesion promoting layer, which is the first pad electrode layer, may be made of a material configured to increase the adhesive force between the second pad electrode layer and the fourth pad electrode layer.

The gate electrode may further include a gate insulating layer disposed between the fourth pad electrode layer and the first pad electrode layer and covering a portion of the upper surface of the fourth pad electrode layer.

According to another aspect of the present invention, there is provided an organic light emitting display including: a pad line and a pad electrode in the pad region; And an anode patterned by etching in the display region, wherein the pad electrode has a three-layer structure, and the uppermost layer and the lowermost layer of the three-layer structure are made of the same material, and the uppermost layer is used for patterning the anode It may be composed of a material which does not react with the catalyst and prevents the corrosion of the intermediate layer of the three-layer structure.

At this time, the uppermost layer may be configured to contact both sides of the lowermost layer, and may be configured to seal the intermediate layer.

At this time, the intermediate layer includes Cu, and the uppermost layer may include molybdenum titanium (MoTi), titanium (Ti), or an alloy thereof.

The display area may further include a data line, and the intermediate layer and the top layer may be on the same layer as the data line.

The anode may be made of one of Ag, Al and an alloy containing Ag or Al.

A method of fabricating an organic light emitting display according to an exemplary embodiment of the present invention includes: forming a thin film transistor on a display region of a substrate; Forming a pad electrode having a three-layer structure on a pad region of the substrate; Forming a protective film on the thin film transistor and the pad electrode having the three-layer structure; Forming an open hole for exposing the uppermost layer of the three-layered pad electrode to the outside by selectively removing the protective layer of the pad region; And patterning the anode on the protective film over the thin film transistor by etching.

At this time, the top layer exposed through the open hole during the patterning step may not be affected by the etching.

At this time, the middle layer of the pad electrode having the three-layer structure includes Cu, and the lowermost layer and the uppermost layer of the pad electrode having the three-layer structure include molybdenum titanium (MoTi), titanium (Ti) , The etchant used in patterning the anode may include at least one of phosphoric acid, nitric acid, and acetic acid, and may not contain potassium fluorosilicate and hydrogen peroxide.

The uppermost layer may be formed to contact both sides of the lowermost layer of the three-layered pad electrode, and may be formed to seal the intermediate layer of the three-layered pad electrode.

As described above, the organic light emitting display according to one embodiment of the present invention and the method of fabricating the same according to an embodiment of the present invention can reduce the resistance of a cathode by forming auxiliary electrodes, Of the present invention.

In addition, the organic electroluminescent display device and the method of manufacturing the same according to an embodiment of the present invention may include a pad electrode layer exposed to the outside and a material capable of preventing corrosion from moisture and oxygen on the uppermost layer. It is possible to prevent the occurrence of corrosion and migration of the pad electrode, thereby preventing defective signal transmission.

In addition, the organic light emitting display and the method of fabricating the same according to an exemplary embodiment of the present invention may include a method of applying a clad structure to a pad electrode to seal the low resistance pad electrode layer, thereby preventing damaging of the pad electrode can do. As a result, reliability is improved, and defects are reduced and productivity is improved.

In addition, the method of fabricating an organic light emitting display according to an embodiment of the present invention simplifies the processes required to form a plurality of pad electrode layers, thereby reducing manufacturing costs.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining a principle of light emission of a general organic light emitting diode. FIG.
2 is a view for explaining a sub-pixel structure of an organic light emitting display device;
FIG. 3 is a perspective view illustrating an exemplary structure of an organic light emitting display device according to a first embodiment of the present invention. FIG.
4A and 4B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a first embodiment of the present invention.
5A and 5B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a second embodiment of the present invention;
6A to 6J are cross-sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 5A.
7A to 7G are sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 5B.
8A and 8B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a third embodiment of the present invention.
9A and 9B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a fourth embodiment of the present invention.
10A and 10B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a fifth embodiment of the present invention.
11A to 11J are cross-sectional views sequentially illustrating a method of manufacturing an organic light emitting display device according to a fifth embodiment of the present invention shown in FIG. 10A.
12A to 12F are sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a fifth embodiment of the present invention shown in FIG. 10B.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. It should be understood, however, that the invention is not limited to the disclosed embodiments, but is capable of many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, To fully disclose the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification. The dimensions and relative sizes of the layers and regions in the figures may be exaggerated for clarity of illustration.

It will be understood that when an element or layer is referred to as being another element or "on" or "on ", it includes both intervening layers or other elements in the middle, do. On the other hand, when a device is referred to as "directly on" or "directly above ", it does not intervene another device or layer in the middle.

The terms spatially relative, "below," "lower," "above," "upper," and the like, And may be used to easily describe the correlation with other elements or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when inverting an element shown in the figures, an element described as "below" or "beneath" of another element may be placed "above" another element. Thus, the exemplary term "below" can include both downward and upward directions.

The terminology used herein is for the purpose of describing embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. &Quot; comprise "and / or" comprising ", as used in the specification, means that the presence of stated elements, Or additions.

2 is a view illustrating a sub-pixel structure of an organic light emitting display device.

2, the organic light emitting display includes a gate line GL arranged in a first direction and a data line DL spaced apart from each other in a second direction crossing the first direction and a driving power line VDDL Sub-pixel region is defined by the sub-pixel region.

A switching thin film transistor ST, a driving thin film transistor DT, a storage capacitor C and an organic light emitting diode OLED may be included in one sub-pixel region.

The switching thin film transistor ST is switched in accordance with a gate signal supplied to the gate line GL to supply a data signal to the data line DL to the driving thin film transistor DT.

The driving thin film transistor DT is switched according to a data signal supplied from the switching thin film transistor ST to control a current flowing from the driving power supply line VDDL to the organic light emitting diode OLED.

The storage capacitor C is connected between the gate electrode of the driving thin film transistor DT and the base power line VSSL to store a voltage corresponding to the data signal supplied to the gate electrode of the driving thin film transistor DT, The ON state of the driving transistor DT is maintained constant for one frame.

The organic light emitting diode OLED is electrically connected between the source electrode or the drain electrode of the driving thin film transistor DT and the base power supply line VSSL and is turned on by the current corresponding to the data signal supplied from the driving thin film transistor DT. do.

3 is a perspective view illustrating an exemplary structure of an organic light emitting display device according to a first embodiment of the present invention. 3 illustrates an organic light emitting display device in which a flexible printed circuit board (FPCB) is coupled to a pad region.

4A and 4B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a first embodiment of the present invention.

4A illustrates one sub-pixel including a TFT portion and a capacitor forming portion of the organic light emitting display device. 4B shows a part of the gate pad area and the data pad area in order.

In particular, FIG. 4A shows an organic light emitting display device of a top emission type using a TFT having a coplanar structure as an example. However, the present invention is not limited to a TFT having a coplanar structure.

3, the organic light emitting display according to the first embodiment of the present invention includes a panel assembly 100 for displaying an image and a flexible circuit board 140 connected to the panel assembly 100, .

The panel assembly 100 includes a TFT substrate 110 on which an active area AA and a pad area are defined and an encapsulation layer formed on the TFT substrate 110 while covering the display area AA 120).

At this time, the pad region can be exposed without being covered by the sealing layer 120.

The TFT substrate 110 on which TFTs and organic light emitting diodes are formed may be a polyimide substrate as a base substrate, and a back plate 105 may be attached to the back surface of the TFT substrate 110.

A polarizer (not shown) may be attached on the sealing layer 120 to prevent reflection of light incident from the outside.

At this time, although not shown, the sub-pixels are arranged in a matrix in the display area AA of the TFT substrate 110. [ Driving elements such as a scan driver and a data driver for driving the sub-pixels and other parts are located outside the display area AA.

The display area AA of the TFT substrate 110 will be described in detail with reference to FIG. 4A, the organic light emitting display according to the first embodiment of the present invention may include a substrate 110, a driving thin film transistor DT, an organic light emitting diode, and an auxiliary electrode line VSSLa .

First, the driving thin film transistor DT includes a semiconductor layer 124, a gate electrode 121, a source electrode 122, and a drain electrode 123.

The semiconductor layer 124 is formed on a substrate 110 made of an insulating material such as silicon (Si), glass, or a transparent plastic or a polymer film. However, the substrate 110 of the present invention is not limited to the above-described insulating material, and a plurality of layers formed on the substrate 110 and a material capable of supporting the elements are sufficient.

The semiconductor layer 124 may be an amorphous silicon film or a polycrystalline silicon film crystallized from amorphous silicon, an oxide semiconductor, an organic semiconductor, or the like.

At this time, a buffer layer (not shown) may be further formed between the substrate 110 and the semiconductor layer 124. The buffer layer may be formed to protect a thin film transistor formed in a subsequent process from impurities such as alkali ions flowing out from the substrate 110. [

On the semiconductor layer 124, a gate insulating film 115a made of a silicon nitride film (SiNx) or a silicon oxide film (SiO2) is formed. A gate line (not shown) and a lower sustain electrode 109 including a gate electrode 121 are formed thereon.

The gate insulating film 115a may be formed in the display region and the pad region. That is, the gate insulating layer 115a may be formed on the entire surface of the substrate 110 on which the semiconductor layer 124 is formed. However, the present invention is not limited thereto.

The gate electrode 121 may be formed to overlap with the semiconductor layer 124 in the display region.

The gate electrode 121 and the gate line may be formed integrally.

The gate electrode 121 and the gate line and the lower sustain electrode 109 are formed of a first metal material having low resistance characteristics such as aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr) (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or an alloy thereof.

The gate electrode 121, the gate line, and the lower sustain electrode 109 are formed as a single layer in the drawing, but may be formed of at least two or more layers.

An inter insulation layer 115b made of a silicon nitride film, a silicon oxide film, or the like is formed on the gate electrode 121, the gate line, and the lower sustain electrode 109. A data line (not shown), a driving voltage line (not shown), source / drain electrodes 122 and 123, and an upper sustain electrode 119 are formed thereon. At this time, the interlayer insulating film 115b may include a plurality of contact holes.

The source electrode 122 and the drain electrode 123 are spaced apart from each other by a predetermined distance and are electrically connected to the semiconductor layer 124. More specifically, a semiconductor layer contact hole exposing the semiconductor layer 124 is formed in the gate insulating film 115a and the interlayer insulating film 115b, and the source / drain electrodes 122 and 123 are formed through the semiconductor layer contact holes. And is electrically connected to the semiconductor layer 124.

The source electrode 122 and the data line may be formed integrally.

The data line, the driving voltage line, the source / drain electrodes 122 and 123, and the upper sustain electrode 119 are formed as a single layer in the drawing, but may be formed of at least two or more layers.

At this time, the upper sustain electrode 119 overlaps a part of the lower sustain electrode 109 under the interlayer insulating film 115b to form a storage capacitor.

The data line, the driving voltage line, the source / drain electrodes 122 and 123 and the upper sustain electrode 119 are formed of a second metal material having low resistance characteristics such as aluminum (Al), copper (Cu), molybdenum (Mo) ), Chrome (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) or an alloy thereof.

A protective film 115c and a planarization film 115d are formed on a substrate 110 on which a data line, a driving voltage line, source / drain electrodes 122 and 123 and an upper sustain electrode 119 are formed. The passivation layer 115c is formed on the display region and the pad region and may be formed on the entire surface of the substrate 110. [ The planarizing film 115d may not be formed in the pad region. That is, the planarization film 115d may be formed only in the display region where the thin film transistor is formed.

Next, the organic light emitting diode may include a first electrode 118, an organic compound layer 130, and a second electrode 128.

The organic light emitting diode is electrically connected to the driving thin film transistor DT. More specifically, a drain contact hole exposing the drain electrode 123 of the driving thin film transistor DT is formed in the protective film 115c and the planarization film 115d formed on the driving thin film transistor DT. The organic light emitting diode is electrically connected to the drain electrode 123 of the driving thin film transistor DT through the drain contact hole.

That is, the first electrode 118 is formed on the planarization film 115d and is electrically connected to the drain electrode 123 of the driving TFT DT through the drain contact hole.

The first electrode 118 supplies current (or voltage) to the organic compound layer 130, and defines a light emitting region having a predetermined area.

In addition, the first electrode 118 serves as an anode. Accordingly, the first electrode 118 may include a transparent conductive material having a relatively large work function. For example, the first electrode 118 may be composed of a plurality of electrode layers. For example, the first electrode 118 may have a three-layer structure in which a first electrode layer 118a, a second electrode layer 118b, and a third electrode layer 118c are sequentially stacked.

The first electrode layer 118a can increase the adhesion of the second electrode layer 118b. For example, the first electrode layer 118a may be formed of a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO) The second electrode layer 118b may be a reflective layer made of a metal material having high reflection efficiency. For example, the metal material with high reflection efficiency may include aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr)

The third electrode layer 118c has a large work function, so that the first electrode 118 can serve as an anode electrode. For example, the third electrode layer 118c may be formed of a transparent conductive material such as ITO or IZO.

However, the present invention is not limited thereto.

A bank 115e is formed on the substrate 110 on which the first electrode 118 is formed. At this time, the bank 115e surrounds the edge of the first electrode 118 and defines a first opening, and may be made of an organic insulating material or an inorganic insulating material. The bank 115e may also be made of a photosensitizer containing a black pigment, in which case the bank 115e serves as a light shielding member.

The bank 115e is formed to surround the side surface of the first electrode 118, so that corrosion of the side surface of the first electrode 118 can be prevented.

At this time, in the first embodiment of the present invention, the bank 115e further includes a second opening exposing a part of the auxiliary electrode 125, which will be described later.

An organic compound layer 130 is formed between the first electrode 118 and the second electrode 128. The organic compound layer 130 emits light by the combination of the holes supplied from the first electrode 118 and the electrons supplied from the second electrode 128.

4A shows a case where the organic compound layer 130 is formed on the entire surface of the substrate 110, but the present invention is not limited thereto. The organic compound layer 130 may be formed only on the first electrode 118.

In FIG. 4A, the organic compound layer 130 is shown as a single layer, but the present invention is not limited thereto. The organic compound layer 130 may have a multi-layer structure including an auxiliary layer for improving the luminous efficiency of the light emitting layer in addition to the light emitting layer.

The second electrode 128 is formed on the organic compound layer 130 to provide electrons to the organic compound layer 130.

The second electrode 128 serves as a cathode. Accordingly, the second electrode 128 may be made of a transparent conductive material. For example, the transparent conductive material may include ITO or IZO. The second electrode 128 may further include a thin metal film (not shown) made of a metal material having a low work function on the side contacting the organic compound layer 130. For example, metals with a slow work function may include magnesium (Mg), silver (Ag), and compounds thereof.

In the case of the top emission type, the second electrode 128 is formed to have a thin thickness because the work function is low and the semi-transmissive property must be satisfied. Accordingly, the resistance of the second electrode 128 is increased, and a voltage drop (IR drop) occurs due to the high resistance.

Accordingly, in the first embodiment of the present invention, the auxiliary electrode line VSSLa is formed on the same layer as the first electrode 118 in order to reduce the resistance of the second electrode 128 to lower the voltage drop . The auxiliary electrode line VSSLa may include the auxiliary electrode 125 and the barrier rib 135 described above.

The auxiliary electrode 125 is formed on the same layer as the first electrode 118. For example, the auxiliary electrode 125 may extend in one direction and may be connected to an external VSS pad (not shown).

The auxiliary electrode 125 may have a three-layer structure including first, second, and third auxiliary electrode layers 125a, 125b, and 125c substantially the same as the first electrode 118. At this time, the auxiliary electrode 125 may be directly contacted to the third auxiliary electrode layer 125c when the second electrode 128 is deposited. That is, the second electrode 128 is deposited to the lower portion of the barrier rib 135, and contacts with the auxiliary electrode 125. However, the present invention is not limited thereto.

A barrier rib 135 is formed on the auxiliary electrode 125.

At this time, the barrier ribs 135 may have a reverse taper shape in which the cross-sectional area decreases from the upper portion to the lower portion. For example, the angle formed by the side surface of the barrier rib 135 and the auxiliary electrode 125 may be 20 to 80 degrees, and a shading effect to be described later may be obtained due to the reverse taper shape have.

The barrier rib 135 forms an electrode contact hole for exposing the auxiliary electrode 125 to the organic compound layer 130. The organic compound layer 130 is formed on the barrier ribs 135 by the shading effect and is not formed under the barrier ribs 135. That is, the organic compound layer 130 is deposited on the substrate 110 by the evaporation with the linearity, and is not formed under the upper part of the barrier 140 by the barrier 140 having the reverse taper shape. Thus, an electrode contact hole is formed in the organic compound layer 130.

On the barrier ribs 135, an organic compound layer 130 and a second electrode 128 are sequentially stacked.

In this case, the edge region of the TFT substrate 110 constituting the display region is a pad region, and the pad region includes a gate pad region and a data pad region.

Referring to FIG. 4B, a gate pad electrode 126p and a data pad electrode 127p electrically connected to the gate line and the data line are formed in the gate pad region and the data pad region, respectively, and an external driving circuit unit (not shown) To the gate line and the data line, respectively.

That is, the gate line and the data line extend to the driving circuit portion and are connected to the corresponding gate pad line 116p and the data pad line 117p, respectively. The gate pad line 116p and the data pad line 117p are electrically connected to the gate pad electrode 126p and the data pad electrode 127p through the gate pad line pattern 116p 'and the data pad line pattern 117p' Respectively. Accordingly, the gate line and the data line are supplied with the scan signal and the data signal from the driving circuit unit through the gate pad electrode 126p and the data pad electrode 127p, respectively.

At this time, the gate pad line 116p may be formed integrally with the gate line.

The gate pad line 116p and the data pad line 117p of the pad region may be formed in the same process as the gate electrode 121 and the gate line of the display region.

The data pad line pattern 117p 'may be formed integrally with the data line.

The gate pad line pattern 116p 'and the data pad line pattern 117p' of the pad region are connected to the data line, the driving voltage line and the source / drain electrodes 122 and 123 and the upper sustain electrode 119 of the display region, Can be formed in the same process.

At this time, although the gate pad line 116p and the data pad line 117p are formed as a single layer in the drawing, they may also be formed of at least two or more layers.

The interlayer insulating layer 115b of the pad region may include a contact hole exposing the gate pad line 116p and the data pad line 117p. In addition, the passivation layer 115c of the pad region may include a contact hole exposing the gate pad line pattern 116p 'and the data pad line pattern 117p'.

The contact holes of the pad regions may be formed together in the same process as the drain contact holes exposing the drain electrodes 123. [ However, the method of forming the contact hole according to the present invention is not limited to this.

In this case, the gate pad electrode 126p and the data pad electrode 127p according to the first embodiment of the present invention have a three-layer structure substantially the same as the first electrode 118 and the auxiliary electrode 125 in the display region . For example, a three-layer structure of ITO / Ag alloy / ITO.

That is, the gate pad electrode 126p according to the first embodiment of the present invention may be composed of the first, second, and third gate pad electrode layers 126pa, 126pb, and 126pc, and the data pad electrode 127p Layer structure of the first, second, and third data pad electrode layers 127pa, 127pb, and 127pb.

In the organic light emitting display according to the first embodiment of the present invention, if the second electrode layer 118b of the first electrode 118 is formed of Ag or an Ag alloy to improve the reflectivity, The electrode 126p and the data pad electrode 127p are also made of ITO / Ag or Ag alloy / ITO. In this case, the first pad electrode layer 126pa, 127pa made of ITO is disposed on the second pad electrode layer 126pb, 127pb, and thus the Ag or Ag alloy caused by the external moisture and the oxygen Corrosion can be prevented to some extent.

However, since the side surfaces of the second pad electrode layers 126pb and 127pb are exposed to the outside, corrosion and migration of the Ag or Ag alloy due to the catalyst can not be avoided when the first electrode 118 is patterned, Thereby, there is a possibility that a short circuit with the adjacent wiring may occur. If the corrosion of the pad electrodes 126p and 127p occurs, the signal transmission to the driver driving circuit may not be smooth and a failure may occur.

Accordingly, in the second embodiment of the present invention, a pad electrode is formed on the data wiring layer, and the side surface of the second pad electrode layer is sealed by using a protective film. In addition, by applying a three-layer structure of MoTi / Cu / MoTi having etch selectivity to an etchant for etching Ag or Ag alloy on the pad electrode in the pad region, damage of the pad electrode due to the etchant during patterning of the first electrode can be prevented This will be described in detail with reference to the drawings.

In this case, the etching selectivity means that when the thin films of different kinds are etched by the same etchant, the thin film to be etched and the thin film which can not be etched are present, and thus the selectivity at the time of etching between the two thin films can be said. That is, it can be said that the thin film to be etched has no etching selectivity, and the thin film which can not be etched has etch selectivity. Therefore, the etch selectivity is determined by the presence or absence of etching.

Therefore, MoTi which is not etched with respect to the etchant for etching Ag or Ag alloy, and Cu which is etched have etch selectivity. That is, by applying the three-layer structure of MoTi / Cu / MoTi having the etching selectivity to the pad electrode of the pad region, it is possible to prevent damage of the pad electrode due to the etchant when the first electrode is patterned.

5A and 5B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a second embodiment of the present invention.

5A illustrates one sub-pixel including a TFT portion and a capacitor forming portion of the organic light emitting display device, and FIG. 5B illustrates a portion of a gate pad region and a data pad region in order.

In particular, FIG. 5A shows one sub-pixel of the organic light emitting display device of the top emission type using a TFT having a coplanar structure. The present invention is not limited to the coplanar TFT.

5A, the organic light emitting display device of the top emission type according to the second embodiment of the present invention includes a substrate 210, a driving thin film transistor DT, an organic light emitting diode, and an auxiliary electrode line VSSLa . However, the present invention is not limited thereto and may not include the auxiliary electrode line VSSLa.

The driving thin film transistor DT includes a semiconductor layer 224, a gate electrode 221, a source electrode 222 and a drain electrode 223 in the same manner as in the first embodiment described above.

The semiconductor layer 224 is formed on a substrate 210 made of silicon (Si), glass, or an insulating material such as a transparent plastic or a polymer film. The substrate 210 of the present invention is not limited to the above-described insulating material, and a plurality of layers formed on the substrate 210 and a material capable of supporting the element are sufficient.

The semiconductor layer 224 may be composed of an amorphous silicon film or a polysilicon film crystallized from amorphous silicon.

At this time, a buffer layer (not shown) may be further formed between the substrate 210 and the semiconductor layer 224. The buffer layer may be formed to protect the thin film transistor from impurities such as alkali ions flowing out from the substrate 210 during the crystallization of the semiconductor layer 224.

A gate insulating film 215a made of a silicon nitride film (SiNx) or a silicon oxide film (SiO2) is formed on the semiconductor layer 224. A gate line (not shown) including a gate electrode 221, (Not shown).

The gate insulating film 215a may be formed in the display region and the pad region. That is, the gate insulating layer 215a may be formed on the entire surface of the substrate 210 on which the semiconductor layer 224 is formed. The present invention is not limited thereto.

The gate electrode 221 may be formed to overlap the semiconductor layer 224 in the display region.

The gate electrode 221 and the gate line may be integrally formed.

The gate electrode 221 and the gate line and the lower sustain electrode 209 may be formed of a first metal material having low resistance characteristics such as aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr) (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or an alloy thereof.

The gate electrode 221, the gate line, and the lower sustain electrode 209 are formed as a single layer in the drawing, but may be formed of at least two or more layers.

An interlayer insulating film 215b made of a silicon nitride film or a silicon oxide film is formed on the gate electrode 221 and the gate line and the lower sustain electrode 209. A data line (not shown), a driving voltage line (not shown) And source / drain electrodes 222 and 223 and an upper sustain electrode 219 are formed. At this time, the interlayer insulating film 215b may include a plurality of contact holes.

The source electrode 222 and the drain electrode 223 are spaced apart from each other by a predetermined distance and are electrically connected to the semiconductor layer 224. More specifically, a semiconductor layer contact hole exposing the semiconductor layer 224 is formed in the gate insulating film 215a and the interlayer insulating film 215b, and the source / drain electrodes 222 and 223 are formed through the semiconductor layer contact holes. And is electrically connected to the semiconductor layer 224.

The source electrode 222 and the data line may be integrally formed.

At this time, the upper sustain electrode 219 overlaps a part of the lower sustain electrode 209 under the interlayer insulating film 215b to form a storage capacitor.

In this case, the data lines, that is, the data lines, the driving voltage lines, the source / drain electrodes 222 and 223, and the upper sustain electrodes 219 according to the second embodiment of the present invention may be formed in multiple layers. For example, the data line according to the second embodiment of the present invention may have three layers.

That is, the source electrode 222 may have a three-layer structure including first, second, and third source electrode layers 222a, 222b, and 222c, and the drain electrode 223 may include a first, a second, Layer structure of the electrode layers 223a, 223b, and 223c.

The upper sustain electrode 219 may have a three-layer structure including first, second, and third upper sustain electrode layers 219a, 219b, and 219c.

The first source electrode layer 222a, the first drain electrode layer 223a, and the first upper sustain electrode layer 219a may be formed of the same material. The first source electrode layer 222a, the first drain electrode layer 223a and the first upper sustain electrode layer 219a are electrically connected to the second source electrode layer 222b, the second drain electrode layer 223b, The adhesion of the sustain electrode layer 219b can be improved.

For example, the first source electrode layer 222a, the first drain electrode layer 223a, and the first upper sustain electrode layer 219a may be formed of any one of molybdenum titanium (MoTi), titanium (Ti) .

The second source electrode layer 222b, the second drain electrode layer 223b, and the second upper sustain electrode layer 219b may be formed of the same material. The second source electrode layer 222b, the second drain electrode layer 223b, and the second upper sustain electrode layer 219b may be formed of a material having a low resistance. For example, the second source electrode layer 222b, the second drain electrode layer 223b, and the second upper sustain electrode layer 219b may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), silver ), Molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), or combinations thereof. Preferably, the second source electrode layer 222b, the second drain electrode layer 223b, and the second upper sustain electrode layer 219b may include copper (Cu).

The third source electrode layer 222c, the third drain electrode layer 223c, and the third upper sustain electrode layer 219c may be formed of the same material. The third source electrode layer 222c, the third drain electrode layer 223c, and the third upper sustain electrode layer 219c may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. For example, the third source electrode layer 222c, the third drain electrode layer 223c, and the third upper sustain electrode layer 219c may be formed of any one of molybdenum titanium (MoTi), titanium (Ti) .

Therefore, the data line according to the second embodiment of the present invention can have a three-layer structure of MoTi / Cu / MoTi.

A protective film 215c and a planarization film 215d are formed on a substrate 210 on which a data line, a driving voltage line, source / drain electrodes 222 and 223 and an upper sustain electrode 219 are formed. The protective film 215c may be formed on the entire surface of the substrate 210, and may be formed on the display region and the pad region. The planarizing film 215d may not be formed in the pad region. That is, the planarization film 215d may be formed only in the display region where the thin film transistor is formed.

Next, the organic light emitting diode includes a first electrode 218, an organic compound layer 230, and a second electrode 228.

The organic light emitting diode is electrically connected to the driving thin film transistor DT. At this time, a drain contact hole exposing the drain electrode 223 of the driving thin film transistor DT is formed in the protective film 215c and the planarization film 215d formed on the driving thin film transistor DT. The organic light emitting diode is electrically connected to the drain electrode 223 of the driving thin film transistor DT through the drain contact hole.

That is, the first electrode 218 is formed on the planarization film 215d and is electrically connected to the drain electrode 223 of the driving thin film transistor DT through the drain contact hole.

The first electrode 218 supplies a current (or voltage) to the organic compound layer 230, and defines a light emitting region having a predetermined area.

In addition, the first electrode 218 serves as an anode. Accordingly, the first electrode 218 may include a transparent conductive material having a relatively large work function. The first electrode 218 may be composed of a plurality of electrode layers. For example, the first electrode 218 may have a three-layer structure in which a first electrode layer 218a, a second electrode layer 218b, and a third electrode layer 218c are sequentially stacked.

The first electrode layer 218a can increase the adhesion of the second electrode layer 218b. For example, the first electrode layer 218a may be formed of a transparent conductive material such as ITO or IZO. The second electrode layer 218b may be a reflective layer made of a metal material having high reflection efficiency. For example, the second electrode layer 218b may include aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr), or an alloy containing them.

The third electrode layer 218c has a large work function, so that the first electrode 218 can serve as an anode electrode. For example, the third electrode layer 218c may be formed of a transparent conductive material such as ITO or IZO. However, the present invention is not limited thereto.

A bank 215e is formed on the substrate 210 on which the first electrode 218 is formed. At this time, the bank 215e surrounds the periphery of the first electrode 218 and defines an opening, and is made of an organic insulating material or an inorganic insulating material. The bank 215e may also be made of a photoresist containing a black pigment, in which case the bank 215e serves as a light shielding member.

The bank 215e is formed to surround the side surface of the first electrode 218, so that corrosion of the side surface of the first electrode 218 can be prevented.

In the second embodiment of the present invention, the bank 215e further includes a second opening for exposing a part of the auxiliary electrode 225 to be described later.

The organic compound layer 230 is formed between the first electrode 218 and the second electrode 228. The organic compound layer 230 emits light by the combination of the holes supplied from the first electrode 218 and the electrons supplied from the second electrode 228.

5A illustrates a case where the organic compound layer 230 is formed on the entire surface of the substrate 210. However, the present invention is not limited thereto, and the organic compound layer 230 may be formed only on the first electrode 218 have.

In FIG. 5A, the organic compound layer 230 is shown as a single layer, but the present invention is not limited thereto. The organic compound layer 230 may have a multi-layer structure including a sub-layer for improving the luminous efficiency of the light-emitting layer in addition to the light-emitting layer.

The second electrode 228 is formed on the organic compound layer 230 to provide electrons to the organic compound layer 230.

And the second electrode 228 serves as a cathode. Accordingly, the second electrode 228 is made of a transparent conductive material. For example, the second electrode 228 may comprise ITO or IZO. The second electrode 228 may further include a thin metal film (not shown) made of a metal material having a low work function on the side contacting the organic compound layer 230. For example, a thin metal film (not shown) may include magnesium (Mg), silver (Ag), and compounds thereof.

In order to reduce the resistance of the second electrode 228, the auxiliary electrode line VSSLa is formed on the same layer as the first electrode 218, as in the first embodiment of the present invention described above. At this time, the auxiliary electrode line VSSLa includes the auxiliary electrode 225 and the barrier rib 235 described above.

The auxiliary electrode 225 is formed on the same layer as the first electrode 218. For example, the auxiliary electrode 225 may extend continuously in one direction and may be connected to an external VSS pad (not shown).

The auxiliary electrode 225 has a three-layer structure of first, second, and third auxiliary electrode layers 225a, 225b, and 225c substantially the same as the first electrode 218. When the second electrode 228 is deposited, And may be directly contacted to the third auxiliary electrode layer 225c. That is, the second electrode 228 is deposited to the lower portion of the barrier rib 235, and the auxiliary electrode 225 is contacted. The present invention is not limited thereto.

A barrier rib 235 is formed on the auxiliary electrode 225.

At this time, the barrier ribs 235 may have a reverse taper shape in which the cross-sectional area decreases from the upper portion to the lower portion. For example, the angle formed by the side surface of the barrier rib 235 and the auxiliary electrode 225 may be 20 to 80 degrees, and a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

The barrier rib 235 forms an electrode contact hole for exposing the auxiliary electrode 225 to the organic compound layer 230. The organic compound layer 230 is formed on the barrier ribs 235 by the shading effect, and is not formed under the barrier ribs 235. Therefore, an electrode contact hole is formed in the organic compound layer 230.

An organic compound layer 230 and a second electrode 228 are sequentially stacked on the barrier rib 235.

At this time, the edge region of the TFT substrate 210 constituting the display region is a pad region, and the pad region includes a gate pad region and a data pad region.

Referring to FIG. 5B, a gate pad electrode 226p and a data pad electrode 227p electrically connected to a gate line and a data line, respectively, are formed. The scan signal and data (data) supplied from an external driving circuit Signal to the gate line and the data line, respectively.

That is, the gate line and the data line extend to the driving circuit portion and are connected to the corresponding gate pad line 216p and the data pad line 217p, respectively. The gate pad line 216p and the data pad line 217p are electrically connected to the gate pad electrode 226p and the data pad electrode 227p, respectively. Accordingly, the gate lines and the data lines are supplied with the scan signals and the data signals from the driver circuit portions through the gate pad electrodes 226p and the data pad electrodes 227p, respectively.

At this time, the gate pad line 216p may be formed integrally with the gate line.

The gate pad line 216p and the data pad line 217p of the pad region may be formed in the same process as the gate electrode 221 and the gate line of the display region.

The data pad electrode 227p may be formed integrally with the data line.

The gate pad electrode 226p and the data pad electrode 227p in the pad region are formed in the same process as the data line, the driving voltage line and the source / drain electrodes 222 and 223 and the upper sustain electrode 219 in the display region .

At this time, although the gate pad line 216p and the data pad line 217p are formed as a single layer in the figure, they may be formed in at least two or more layers.

The interlayer insulating layer 215b of the pad region may include a contact hole exposing the gate pad line 216p and the data pad line 217p. In addition, the passivation layer 215c of the pad region may include a contact hole exposing the gate pad electrode 226p and the data pad electrode 227p.

The contact holes of the pad regions may be formed together in the same process as the drain contact holes exposing the drain electrodes 223. The method of forming the contact hole according to the present invention is not limited thereto.

At this time, the gate pad electrode 226p and the data pad electrode 227p according to the second embodiment of the present invention are formed in the same layer as the data line in the display region, and have a three-layer structure substantially the same as the data line. For example, a three-layer structure of MoTi / Cu / MoTi.

That is, in the second embodiment of the present invention, three layers of MoTi / Cu / MoTi having etch selectivity for an etchant for etching Ag or Ag alloy on the gate pad electrode 226p and the data pad electrode 227p of the pad region And an open hole H is formed at the time of patterning the passivation layer 215c to expose a part of the gate pad electrode 226p and the data pad electrode 227p to the outside.

At this time, the upper MoTi may act as an etch stopper for etching the Ag or Ag alloy.

As described above, the gate pad electrode 226p according to the second embodiment of the present invention can be composed of the first, second and third gate pad electrode layers 226pa, 226pb, 226pc, and the data pad electrode 227p Layer structure of the first, second, and third data pad electrode layers 227pa, 227pb, and 227pc.

The first gate pad electrode layer 226pa and the first data pad electrode layer 227pa which are the lowermost layers are formed as adhesion promoting layers for increasing the adhesion between the second gate pad electrode layer 226pb and the second data pad electrode layer 227pb, . That is, the first gate pad electrode layer 226pa may be made of a material configured to increase the adhesive force between the second gate pad electrode layer 226pb and the fourth pad electrode layer beneath the second gate pad electrode layer 226pb, have. The first data pad electrode layer 227pa may be made of a material configured to increase the adhesion between the second data pad electrode layer 227pb and the fourth pad electrode layer beneath the second data pad electrode layer 227pb, have.

The second gate pad electrode layer 226pb and the second data pad electrode layer 227pb are electrically connected to the first gate pad electrode layer 226pa, the first data pad electrode layer 227pa, the third gate pad electrode layer 226pc, And may have a lower resistivity than the third data pad electrode layer 227pc.

The pad electrodes 226p and 227p must be exposed to the outside in order to be connected to the driving circuit. The pad electrodes 226p and 227p made of copper or the like are advantageous for signal transmission due to their small resistance. When the pad electrodes 226p and 227p formed of copper or the like are exposed to the outside, they are in contact with oxygen and moisture Corrosion can occur. When the first electrode 218 is patterned in the process of forming the organic light emitting diode after the pad electrodes 226p and 227p formed of copper or the like, Ag or Ag alloy used for patterning the first electrode 218 There is a problem that the etchant is etched together with the etchant.

Accordingly, the third pad electrode layers 226pc and 227pc disposed on the uppermost layers of the pad electrodes 226p and 227p may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. In particular, the third pad electrode layers 226pc and 227pc may be formed of a material that is not etched with the etchant used for patterning the first electrode 218. [ That is, the third pad electrode layers 226pc and 227pc disposed on the uppermost layer may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

In addition, as described above, the passivation layer 215c of the pad region may be formed to expose the upper surfaces of the third pad electrode layers 226pc and 227pc of the pad electrodes 226p and 227p. At this time, the protective layer 215c is formed to surround the side surfaces of the pad electrodes 226p and 227p, thereby preventing corrosion of the side surfaces of the third pad electrode layers 226pc and 227pc. For example, the passivation layer 215c of the pad region may be formed on the side surfaces of the first pad electrode layers 226pa and 227pa, the second pad electrodes 226pb and 227pb and the third pad electrode layers 226pc and 227pc, And may cover at least a part of the upper surface of the electrode layers 226pc and 227pc.

Hereinafter, a method of manufacturing an organic light emitting display according to a second embodiment of the present invention will be described in detail with reference to the drawings.

FIGS. 6A to 6J are sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 5A, sequentially illustrating a method of manufacturing a display region of a TFT substrate.

7A to 7G are sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 5B, and sequentially illustrate a method of manufacturing a pad region of a TFT substrate .

As shown in FIGS. 6A and 7A, a substrate 210 made of a transparent glass material or an insulating material such as a transparent plastic or a polymer film excellent in flexibility is prepared.

Although not shown in detail, a TFT and a storage capacitor are formed in red, green, and blue sub-pixels of the substrate 210, respectively.

First, a buffer layer (not shown) is formed on the substrate 210.

In this case, the buffer layer may be formed to protect the thin film transistor from impurities such as alkali ions flowing out from the substrate 210 when the semiconductor layer is crystallized, and may be formed of a silicon oxide film.

Next, a semiconductor thin film is formed on the substrate 210 on which the buffer layer is formed.

The semiconductor thin film may be formed of amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

In this case, the polycrystalline silicon can be formed by depositing amorphous silicon on the substrate 210 using various crystallization methods. When an oxide semiconductor is used as the semiconductor thin film, a predetermined heat treatment process can be performed after depositing the oxide semiconductor. have.

Thereafter, the semiconductor thin film is selectively removed through a photolithography process to form a semiconductor layer 224 made of a semiconductor thin film on the substrate 210 in the display area.

Next, as shown in FIGS. 6B and 7B, a gate insulating layer 215a and a first conductive layer are formed on the substrate 210 on which the semiconductor layer 224 is formed.

The gate insulating layer 215a may be formed on the entire surface of the substrate 210 on which the semiconductor layer 224 is formed.

The first conductive film may be formed of one of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium A low resistance opaque conductive material such as an alloy thereof can be used. However, they may have a multi-layer structure including two conductive films having different physical properties. One of the conductive films may be a metal having a low resistivity so as to reduce signal delay or voltage drop. For example, aluminum-based metals, silver-based metals, copper-based metals, and the like.

A gate line (not shown) and a lower sustain electrode 209 including a gate electrode 221 made of a first conductive film are formed on the substrate 210 in the display region by selectively removing the first conductive film through a photolithography process. And a gate pad line 216p and a data pad line 217p formed of a first conductive film are formed on the substrate 210 of the pad region.

The gate electrode 221 may be formed in a region overlapping with the semiconductor layer 224. [

The gate pad line 216p may be formed integrally with the gate line.

Although the gate electrode 221, the gate line, the lower sustain electrode 209, the gate pad line 216p, and the data pad line 217p are formed as a single layer in the drawing, they may be formed as multiple layers of at least two layers.

However, the present invention is not limited thereto. The gate line including the semiconductor layer 224 and the gate electrode 221, the lower sustain electrode 209, the gate pad line 216p, and the data pad line 217p may be formed May be formed through a photolithography process.

The gate insulating layer 215a under the gate line 221 including the gate electrode 221, the lower sustain electrode 209, the gate pad line 216p, and the data pad line 217p may be patterned together .

6C and 7C, a substrate 210 having a gate line including a gate electrode 221, a lower sustain electrode 209, a gate pad line 216p, and a data pad line 217p is formed. An interlayer insulating film 215b made of a silicon nitride film, a silicon oxide film or the like is formed on the entire surface.

The interlayer insulating film 215b may be formed on the entire surface of the substrate 210. [

The interlayer insulating film 215b and the gate insulating film 215a are selectively patterned through a photolithography process to form a first contact hole 250a exposing a source / drain region of the semiconductor layer 224, A second contact hole 250b and a third contact hole 250c exposing a part of the line 216p and the data pad line 217p are formed.

Next, as shown in FIGS. 6D and 7D, a second conductive film, a third conductive film, and a fourth conductive film are formed on the entire surface of the substrate 210 on which the interlayer insulating film 215b is formed, and then a photolithography process is performed The second conductive film, the third conductive film, and the fourth conductive film are selectively removed to form a data line (that is, a source / drain region) of the second conductive film, a third conductive film, Electrodes 222 and 223, a driving voltage line (not shown), a data line (not shown) and an upper sustain electrode 219). That is, the data lines can be formed in multiple layers. At this time, the data line may be formed in three layers, but is not limited thereto.

The source electrode 222 may include a first source electrode layer 222a, a second source electrode layer 222b, and a third source electrode layer 222c. The drain electrode 223 may include a first drain electrode layer 223a, a second drain electrode layer 223b, and a third drain electrode layer 223c. The upper sustain electrode 219 may include a first upper sustain electrode layer 219a, a second upper sustain electrode layer 219b, and a third upper sustain electrode layer 219c.

At the same time, a pad electrode (that is, a gate pad electrode 226p and a data pad electrode 227p) including a second conductive film, a third conductive film, and a fourth conductive film is formed on the substrate 210 of the pad region.

The gate pad electrode 226p may include a first gate pad electrode layer 226pa, a second gate pad electrode layer 226pb, and a third gate pad electrode layer 226pc.

The data pad electrode 227p may include a first data pad electrode layer 227pa, a second data pad electrode layer 227pb, and a third data pad electrode layer 227pc.

At this time, the third conductive film may be formed of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel ), Neodymium (Nd), or an alloy thereof. However, they may have a multi-layer structure including two conductive films having different physical properties. Particularly, in the second embodiment of the present invention, Cu used as etchant for etching Ag or Ag alloy as the third conductive film can be used.

Further, the second conductive film may use MoTi to form the lower layer data line and the pad electrode. However, the present invention is not limited to this, and it is also possible to use another material for the second conductive film only by improving the adhesion of the intermediate layer. The second conductive film may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

At this time, the fourth conductive film may use any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof to form the upper data line and the pad electrode. However, the present invention is not limited to this. The fourth conductive film is not corroded by oxygen and moisture even if it is exposed to the outside, and if it is used as an etch stopper of an etchant for etching Ag or Ag alloy, It is also possible. For example, the fourth conductive film may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

The source electrode 222 and the first, second, and third drain electrodes 222, 222b, and 222c having the three-layer structure of the first, second, and third source electrode layers 222a, 222b, and 222c are formed on the substrate 210, It is possible to form the drain electrode 223 having the three-layer structure of the layers 223a, 223b, and 223c.

In addition, the upper sustain electrode 219 having the three-layer structure of the first, second and third upper sustain electrode layers 219a, 219b and 219c can be formed on the lower sustain electrode 209.

At the same time, the gate pad electrode 226p having a three-layer structure of the first, second and third gate pad electrode layers 226pa, 226pb, and 226pc and the first, second, and third The data pad electrode 227p having a three-layer structure of the data pad electrode layers 227pa, 227pb, and 227pc can be formed.

At this time, the data line and the pad electrode according to the second embodiment of the present invention may have a three-layer structure of MoTi / Cu / MoTi, but the present invention is not limited thereto.

The source and drain electrodes 222 and 223 are electrically connected to the source and drain regions of the semiconductor layer 224 through the first contact hole and the upper sustain electrode 219 is electrically connected to the source / And overlaps with a part of the lower sustain electrode 209 at a lower portion thereof to form a storage capacitor.

The gate pad electrode 226p and the data pad electrode 227p are electrically connected to the gate pad line 216p and the data pad line 217p under the second contact hole and the third contact hole, respectively .

6E and 7E, the source / drain electrodes 222 and 223, the driving voltage line, the data line, the upper sustain electrode 219, the gate pad electrode 226p, and the data pad electrode 227p, A protective film 215c made of a silicon nitride film, a silicon oxide film, or the like is formed on the substrate 210 in the display region where the substrate 210 is formed.

The protective film 215c may be formed on the entire surface of the substrate 210. [

At this time, a planarization layer made of an organic insulating material may be formed on the passivation layer 215c, but the present invention is not limited thereto, and the passivation layer 215c may serve as a planarization layer.

At this time, for example, a planarization film may be formed using a half-tone mask or a diffraction mask. In this case, an insulating layer including a first planarization pattern 215d 'having a high level difference and a second leveling pattern 215d " having a low level difference is formed on the entire surface of the substrate 210. [ That is, the first planarization pattern 215d 'is formed to have a height larger than the second planarization pattern 215d ". However, the present invention is not limited thereto.

The first leveling pattern 215d 'having a high level difference can be formed in the display region. In addition, the second planarization pattern 215d " having a low level difference can be formed in the pad region.

As shown in FIGS. 6F and 7F, the protective film 215c is selectively patterned using the planarization patterns 215d 'and 215d "as masks through a photolithography process to expose the drain electrodes 223, Hole 250d and an open hole H for exposing a part of the gate pad electrode 226p and the data pad electrode 227p to the outside. However, the present invention is not limited thereto.

Thereafter, as shown in Figs. 6F and 7G, the second flattening pattern 215d " having a low step is removed. At the same time, the planarization film 215d can be formed of the first planarization pattern 215d 'having a high step height. That is, if the planarization patterns 215d 'and 215d "are ashed, the first planarization pattern 215d' having a higher level difference may remain even if the second planarization pattern 215d" having a lower level difference is removed.

The first planarization pattern 215d 'remaining after the ashing process may be the planarization film 215d. Therefore, the planarization film 215d may be formed in the display region and not in the pad region. In addition, the protective film 215c can be exposed in the pad region.

Next, as shown in FIG. 6G, a fifth conductive film, a sixth conductive film, and a seventh conductive film are formed on the entire surface of the substrate 210 on which the planarization film 215d is formed.

However, the present invention is not limited thereto. For example, only a single layer of the fifth conductive layer may be formed on the entire surface of the substrate 210 on which the planarization layer 215d is formed.

The fifth conductive film and the seventh conductive film may be made of a transparent conductive material such as ITO or IZO.

The sixth conductive film may be made of, for example, aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr)

Then, the fifth conductive film, the sixth conductive film, and the seventh conductive film are selectively removed through a photolithography process to form a first electrode 218 composed of a fifth conductive film, a sixth conductive film, and a seventh conductive film, (225).

The first electrode 218 may include a first electrode layer 218a, a second electrode layer 218b, and a third electrode layer 218c, each of which is composed of a fifth conductive layer, a sixth conductive layer, and a seventh conductive layer, .

The auxiliary electrode 225 includes a first auxiliary electrode layer 225a, a second auxiliary electrode layer 225b, and a third auxiliary electrode layer 225c, each of which comprises a fifth conductive film, a sixth conductive film, and a seventh conductive film, ).

The first electrode layer 218a can increase the adhesion of the second electrode layer 218b. The first electrode layer 218a may be formed of a transparent conductive material. For example, the first electrode layer 218a may be formed of ITO.

The second electrode layer 218b may be a reflective layer, and may be formed of a metal or a metal alloy.

The third electrode layer 218c has a large work function, so that the first electrode 218 can serve as an anode electrode. The third electrode layer 218c may be formed of a transparent conductive material. For example, the third electrode layer 218c may be formed of ITO.

In the process of forming the first electrode 218, when the gate pad electrode 226p and the data pad electrode 227p are exposed to the outside, the etchant of the first electrode 218 may be affected. However, the etchant for etching the Ag or Ag alloy used for patterning the first electrode 218 may be a third gate pad electrode layer 226pc made of any one of molybdenum titanium (MoTi), titanium (Ti) 3 data pad electrode layer 227pc can not be etched.

The patterning of the first electrode 218 may be performed using a phosphoric acid etchant, a nitric acid etchant, a phosphoric acid + nitric acid etchant, a phosphoric acid + acetic acid etchant, a nitric acid + acetic acid etchant or a phosphoric acid + nitric acid + You can use the system etchant. In addition, an etchant not containing potassium fluoride and hydrogen peroxide may be used for patterning the first electrode 218.

For reference, Ag can be precipitated by etching with phosphoric acid or nitrate anions (depending on the chemical reaction below).

2Ag + NO ₃ ^- + 3H ^- -> 2Ag ⁺ + HNO ₂ + H ₂ O

_{2Ag + N 3 PO 4 + 2H} + -> 2Ag + + H 3 PO 4 + 2H 2 O

MoTi can not be etched with an etchant that etches Ag or Ag alloy. MoTi requires H ₂ O ₂ and F components in the etchant to perform the etching process.

The oxidation process by H ₂ O ₂ system is as follows.

_{Mo + 3H 2 O 2 ->} MoO 3 + 3H 2 O

_{Ti + 2H 2 O 2 ->} TiO 2 + 2H 2 O

Then, MoO ₃ and TiO ₂ are dissolved and etched by F ^- ions as follows.

MoO ₃ + 3KHF ₂ -> MoF ₆ + 3KOH

TiO ₂ + 2KHF ₂ -> TiF ₄ + 2KOH

Alternatively, instead of forming the open hole H in the passivation film 215c of the pad region using the planarization pattern as a mask, an open hole H is formed in the passivation film 215c by using a photoresist pattern forming a bank to be described later. The damage of the pad electrodes 226p and 227p due to the patterning of the first electrode 218 can be prevented.

The first electrode 218, which is an anode, is electrically connected to the drain electrode 223 of the driving thin film transistor through the fourth contact hole.

In addition, the first electrode 218 is formed corresponding to each of red, green, and blue sub-pixels on the substrate 210.

Next, as shown in FIG. 6H, a predetermined bank 215e is formed on the substrate 210 in the display area where the first electrode 218 and the auxiliary electrode 225 are formed.

At this time, the bank 215e surrounds the periphery of the first electrode 218 and defines an opening, and is made of an organic insulating material or an inorganic insulating material. The bank 215e may also be made of a photoresist containing a black pigment, in which case the bank 215e serves as a light shielding member.

In addition, the bank 215e further includes a second opening exposing a part of the auxiliary electrode 225. [

At this time, after the open hole H for exposing the pad electrodes 226p and 227p is formed using the photoresist pattern as a mask, a bank 215e for exposing a part of the first electrode 218 may be formed. At this time, the bank 215e can be formed by re-patterning the photoresist pattern using a separate mask process. Alternatively, the bank 215e can be formed by partially removing the photoresist pattern without a separate mask process.

Then, as shown in FIG. 6I, a barrier rib 235 is formed on the substrate 210 on which the banks 215e are formed.

A barrier rib 235 is formed on the auxiliary electrode 225.

At this time, the barrier ribs 235 may have a reverse taper shape in which the cross-sectional area decreases from the upper portion to the lower portion. For example, the angle formed between the side surface of the barrier rib 235 and the auxiliary electrode 225 may be 20 to 80 degrees, and thus a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

Next, as shown in FIG. 6J, the organic compound layer 230 is formed on the substrate 210 on which the barrier ribs 235 are formed by evaporation.

In this case, the barrier rib 235 forms an electrode contact hole for exposing the auxiliary electrode 225 to the organic compound layer 230. The organic compound layer 230 is formed on the barrier ribs 235 by the shading effect, and is not formed under the barrier ribs 235. Thus, an electrode contact hole is formed in the organic compound layer 230.

Although not shown, a hole injecting layer and a hole transporting layer are sequentially formed on the substrate 210 for this purpose.

At this time, the hole injecting layer and the hole transporting layer are formed in common to the red, green and blue sub-pixels to smoothly inject and transport holes. At this time, any one of the hole injecting layer and the hole transporting layer may be omitted.

Next, a light emitting layer is formed on the substrate 210 on which the hole transporting layer is formed.

At this time, the light emitting layer may include a red light emitting layer, a green light emitting layer, and a blue light emitting layer corresponding to red, green, and blue sub-pixels.

Next, an electron transporting layer is formed on the substrate 210 on which the light emitting layer is formed.

At this time, the electron transporting layer is formed in common to the red, green and blue sub-pixels on the upper side of the light emitting layer, and plays a role of facilitating transport of electrons.

At this time, an electron injection layer may be further formed on the electron transport layer to smoothly inject electrons.

Then, a second electrode 228 made of an eighth conductive film is formed on the substrate 210 on which the electron transporting layer is formed by sputtering.

At this time, the eighth conductive film is deposited to the lower portion of the barrier rib 235, so that a contact is established between the auxiliary electrode 225 and the second electrode 228

The organic light emitting diode is sealed with a predetermined thin film sealing layer on the thus fabricated organic light emitting diode.

A polarization film may be provided on the top surface of the thin film sealing layer to reduce reflection of external light of the organic light emitting display device to improve contrast.

8A and 8B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a third embodiment of the present invention.

In this case, the organic light emitting display device according to the third embodiment of the present invention is the same as the second embodiment of the present invention except that the gate wiring layer and the data pad electrode are formed as the gate wiring and the data wiring, respectively. And has substantially the same structure as the organic light emitting display according to the example.

As described above, FIG. 8A illustrates one sub-pixel including a TFT portion and a capacitor forming portion of an organic light emitting display device, and FIG. 8B illustrates a portion of a gate pad region and a data pad region in order .

In particular, FIG. 8A shows one sub-pixel of the organic light emitting display device of the top emission type using a TFT having a coplanar structure. However, the present invention is not limited to a TFT having a coplanar structure.

8A, the organic light emitting display device of the top emission type according to the third embodiment of the present invention includes a substrate 310, a driving thin film transistor DT, an organic light emitting diode, and an auxiliary electrode line VSSLa . However, the present invention is not limited thereto and may not include the auxiliary electrode line VSSLa.

The driving thin film transistor DT includes a semiconductor layer 324, a gate electrode 321, a source electrode 322 and a drain electrode 323 in the same manner as in the first and second embodiments described above.

The semiconductor layer 324 is formed on a substrate 310 made of silicon (Si), glass, or an insulating material such as a transparent plastic or a polymer film.

The semiconductor layer 324 may be composed of an amorphous silicon film or a polysilicon film crystallized from amorphous silicon.

At this time, a buffer layer (not shown) may be further formed between the substrate 310 and the semiconductor layer 324.

A gate insulating film 315a made of a silicon nitride film (SiNx) or a silicon oxide film (SiO2) is formed on the semiconductor layer 324. A gate line (not shown) including a gate electrode 321, (309) are formed.

The gate insulating film 315a may be formed in the display region and the pad region. That is, the gate insulating layer 315a may be formed on the entire surface of the substrate 310 on which the semiconductor layer 324 is formed. However, the present invention is not limited thereto.

The gate electrode 321 may be formed to overlap with the semiconductor layer 324 in the display region.

The gate electrode 321 and the gate line may be formed integrally.

The gate electrode 321 and the gate line and the lower sustain electrode 309 may be formed of at least two or more layers. For example, the gate electrode 321, the gate line, and the lower sustain electrode 309 may be formed in three layers.

That is, the gate electrode 321 may include a first gate electrode layer 321a, a second gate electrode layer 321b, and a third gate electrode layer 321c. The lower sustain electrode 309 may include a first lower sustain electrode layer 309a, a second lower sustain electrode layer 309b, and a third lower sustain electrode layer 309c.

The first gate electrode layer 321a and the first lower sustain electrode layer 309a may be formed of the same material. The first gate electrode layer 321a and the first lower sustain electrode layer 309a can improve adhesion of the second gate electrode layer 321b and the second lower sustain electrode layer 309b.

For example, the first gate electrode layer 321a and the first lower sustain electrode layer 309a may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

The second gate electrode layer 321b and the second lower sustain electrode layer 309b may be formed of the same material. The second gate electrode layer 321b and the second lower sustain electrode layer 309b may be formed of a material having a low resistance. For example, the second gate electrode layer 321b and the second lower sustain electrode layer 309b may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), silver (Ag), molybdenum (Mo) Cr), tantalum (Ta), titanium (Ti), or a combination thereof. Preferably, the second gate electrode layer 321b and the second lower sustain electrode layer 309b may include copper (Cu).

The third gate electrode layer 321c and the third lower sustain electrode layer 309c may be formed of the same material. The third gate electrode layer 321c and the third lower sustain electrode layer 309c may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. For example, the third gate electrode layer 321c and the third lower sustain electrode layer 309c may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

Accordingly, the gate wiring according to the third embodiment of the present invention can have a three-layer structure of MoTi / Cu / MoTi

An interlayer insulating film 315b made of a silicon nitride film, a silicon oxide film or the like is formed on the gate electrode 321 and the gate line and the lower sustain electrode 309. A data line (not shown), a driving voltage line (not shown) And source / drain electrodes 322 and 323 and an upper sustain electrode 319 are formed. At this time, the interlayer insulating film 315b may include a plurality of contact holes.

The source electrode 322 and the drain electrode 323 are spaced apart from each other by a predetermined distance and electrically connected to the semiconductor layer 324. More specifically, a semiconductor layer contact hole exposing the semiconductor layer 324 is formed in the gate insulating film 315a and the interlayer insulating film 315b, and the source / drain electrodes 322 and 323 are formed through the semiconductor layer contact holes. And is electrically connected to the semiconductor layer 324.

The source electrode 322 and the data line may be integrally formed.

At this time, the upper sustain electrode 319 overlaps a part of the lower sustain electrode 309 under the interlayer insulating film 315b to form a storage capacitor.

In this case, the data lines, that is, the data lines, the driving voltage lines, the source / drain electrodes 322 and 323, and the upper sustain electrodes 319 according to the third embodiment of the present invention may be formed in multiple layers. For example, the data line according to the third embodiment of the present invention may have three layers.

That is, the source electrode 322 may have a three-layer structure including first, second and third source electrode layers 322a, 322b and 322c, and the drain electrode 323 may have a first, Layer structure of the electrode layers 323a, 323b, and 323c.

The upper sustain electrode 319 may have a three-layer structure including first, second, and third upper sustain electrode layers 319a, 319b, and 319c.

The first source electrode layer 322a, the first drain electrode layer 323a, and the first upper sustain electrode layer 319a may be formed of the same material. The first source electrode layer 322a, the first drain electrode layer 323a and the first upper sustain electrode layer 319a are electrically connected to the second source electrode layer 322b, the second drain electrode layer 323b, The adhesion of the sustain electrode layer 319b can be improved.

For example, the first source electrode layer 322a, the first drain electrode layer 323a, and the first upper sustain electrode layer 319a may be formed of any one of molybdenum titanium (MoTi), titanium (Ti) .

The second source electrode layer 322b, the second drain electrode layer 323b, and the second upper sustain electrode layer 319b may be formed of the same material. The second source electrode layer 322b, the second drain electrode layer 323b, and the second upper sustain electrode layer 319b may be formed of a material having a low resistance. For example, the second source electrode layer 322b, the second drain electrode layer 323b and the second upper sustain electrode layer 319b may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), silver ), Molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), or combinations thereof. Preferably, the second source electrode layer 322b, the second drain electrode layer 323b, and the second upper sustain electrode layer 319b may include copper (Cu).

The third source electrode layer 322c, the third drain electrode layer 323c, and the third upper sustain electrode layer 319c may be formed of the same material. The third source electrode layer 322c, the third drain electrode layer 323c, and the third upper sustain electrode layer 319c may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. For example, the third source electrode layer 322c, the third drain electrode layer 323c, and the third upper sustain electrode layer 319c may be formed of any one of molybdenum titanium (MoTi), titanium (Ti) .

Therefore, the data line according to the third embodiment of the present invention can have a three-layer structure of MoTi / Cu / MoTi.

A protective film 315c and a planarization film 315d are formed on a substrate 310 on which a data line, a driving voltage line, source / drain electrodes 322 and 323 and an upper sustain electrode 319 are formed. A protective film 315c may be formed on the entire surface of the substrate 310, and may be formed on the display region and the pad region. The planarizing film 315d may not be formed in the pad region. That is, the planarization film 315d may be formed only in the display region where the thin film transistor is formed.

Next, the organic light emitting diode includes a first electrode 318, an organic compound layer 330, and a second electrode 328.

The organic light emitting diode is electrically connected to the driving thin film transistor DT. At this time, a drain contact hole exposing the drain electrode 323 of the driving thin film transistor DT is formed in the protective film 315c and the planarization film 315d formed on the driving thin film transistor DT. The organic light emitting diode is electrically connected to the drain electrode 323 of the driving thin film transistor DT through the drain contact hole.

That is, the first electrode 318 is formed on the planarization film 315d and is electrically connected to the drain electrode 323 of the driving thin film transistor DT through the drain contact hole.

The first electrode 318 supplies current (or voltage) to the organic compound layer 330, and defines a light emitting region having a predetermined area.

Also, the first electrode 318 serves as an anode. Accordingly, the first electrode 318 may include a transparent conductive material having a relatively large work function. The first electrode 318 may be composed of a plurality of electrode layers. For example, the first electrode 318 may have a three-layer structure in which a first electrode layer 318a, a second electrode layer 318b, and a third electrode layer 318c are sequentially stacked.

The first electrode layer 318a can increase the adhesion of the second electrode layer 318b. For example, the first electrode layer 318a may be formed of a transparent conductive material such as ITO or IZO. The second electrode layer 318b may be a reflective layer made of a metal material having high reflection efficiency. For example, the second electrode layer 318b may comprise aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr)

The third electrode layer 318c has a large work function so that the first electrode 318 can serve as an anode electrode. For example, the third electrode layer 318c may be formed of a transparent conductive material such as ITO or IZO. However, the present invention is not limited thereto.

A bank 315e is formed on the substrate 310 on which the first electrode 318 is formed.

The bank 315e is formed so as to surround the side surface of the first electrode 318, so that corrosion of the side surface of the first electrode 318 can be prevented.

In the third embodiment of the present invention, the bank 315e further includes a second opening for exposing a part of the auxiliary electrode 325 to be described later.

The organic compound layer 330 is formed between the first electrode 318 and the second electrode 328.

8A shows a case where the organic compound layer 330 is formed on the entire surface of the substrate 310. However, the present invention is not limited thereto, and the organic compound layer 330 may be formed only on the first electrode 318 have.

In FIG. 8A, the organic compound layer 330 is shown as a single layer, but the present invention is not limited thereto. The organic compound layer 330 may have a multi-layer structure including a sub-layer for improving the light-emitting efficiency of the light-emitting layer in addition to the light-emitting layer.

The second electrode 328 is formed on the organic compound layer 330 to provide electrons to the organic compound layer 330.

And the second electrode 328 serves as a cathode. Accordingly, the second electrode 328 is made of a transparent conductive material. For example, the second electrode 328 may comprise ITO or IZO. The second electrode 328 may further include a thin metal film (not shown) made of a metal material having a low work function on the side contacting the organic compound layer 330. For example, a thin metal film (not shown) may include magnesium (Mg), silver (Ag), and compounds thereof.

In order to reduce the resistance of the second electrode 328, the auxiliary electrode line VSSLa is formed on the same layer as the first electrode 318 in the same manner as in the first and second embodiments of the present invention. At this time, the auxiliary electrode line VSSLa includes the auxiliary electrode 325 and the partition 335 described above.

The auxiliary electrode 325 is formed on the same layer as the first electrode 318. For example, the auxiliary electrode 325 may extend continuously in one direction and may be connected to an external VSS pad (not shown).

The auxiliary electrode 325 has a three-layer structure including first, second, and third auxiliary electrode layers 325a, 325b, and 325c substantially the same as the first electrode 318. When the second electrode 328 is deposited, And may be directly contacted to the third auxiliary electrode layer 325c. That is, the second electrode 328 is deposited to the lower portion of the barrier rib 335, and contacts the auxiliary electrode 325. However, the present invention is not limited thereto.

A barrier rib 335 is formed on the auxiliary electrode 325.

At this time, the barrier ribs 335 may have a reverse taper shape in which the cross-sectional area decreases from the upper portion to the lower portion. For example, the angle formed between the side surface of the barrier rib 335 and the auxiliary electrode 325 may be in a range of 20 to 80 degrees, and a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

The barrier ribs 335 form electrode contact holes that expose the auxiliary electrodes 325 in the organic compound layer 330. The organic compound layer 330 is formed on the barrier ribs 335 by the shading effect, and is not formed under the barrier ribs 335. Thus, an electrode contact hole is formed in the organic compound layer 330.

On the barrier ribs 335, an organic compound layer 330 and a second electrode 328 are sequentially stacked.

At this time, the edge region of the TFT substrate 310 in which the display region is formed is a pad region, and the pad region includes a gate pad region and a data pad region.

Referring to FIG. 8B, a gate pad electrode 326p and a data pad electrode 327p electrically connected to a gate line and a data line, respectively, are formed, and a scan signal and data (not shown) Signal to the gate line and the data line, respectively.

That is, the gate line and the data line extend to the driving circuit portion and are electrically connected to the corresponding gate pad electrode 326p and the data pad electrode 327p, respectively. Accordingly, the gate lines and the data lines are supplied with the scan signals and the data signals from the driver circuit portions through the gate pad electrodes 326p and the data pad electrodes 327p, respectively.

At this time, the gate pad electrode 326p may be formed integrally with the gate line.

The gate pad electrode 326p of the pad region may be formed in the same process as the gate electrode 321 and the gate line and the lower sustain electrode 209 in the display region.

The data pad electrode 327p may be formed integrally with the data line.

The data pad electrode 227p of the pad region may be formed in the same process as the data line, the driving voltage line, the source / drain electrodes 322 and 323, and the upper sustain electrode 319 in the display region.

The interlayer insulating layer 315b and the passivation layer 315c in the pad region may include an open hole H exposing the gate pad electrode 326p and the data pad electrode 327p.

The open hole H of the pad region can be formed together in the same process as the drain contact hole exposing the drain electrode 323. However, the method of forming the contact hole according to the present invention is not limited to this.

In this case, the gate pad electrode 326p and the data pad electrode 327p according to the third embodiment of the present invention are formed in the same layer as the gate wiring of the display region, Structure, for example, a triple layer structure of MoTi / Cu / MoTi.

That is, in the third embodiment of the present invention, three layers of MoTi / Cu / MoTi having etch selectivity with respect to an etchant for etching Ag or Ag alloy on the gate pad electrode 326p and the data pad electrode 327p of the pad region And an open hole H is formed in the patterning of the passivation layer 315c to expose a part of the gate pad electrode 326p and the data pad electrode 327p to the outside.

At this time, the upper MoTi may act as an etch stopper for etching the Ag or Ag alloy.

As described above, the patterning of the first electrode 318 may be performed using a phosphoric acid etchant, a nitric acid etchant, a phosphoric acid + nitric acid etchant, a phosphoric acid + acetic acid etchant, a nitric acid + acetic acid etchant or a phosphoric acid + Nitric acid + acetic acid etchant can be used. In addition, an etchant not containing potassium fluoride and hydrogen peroxide may be used for patterning the first electrode 318.

The gate pad electrode 326p according to the third embodiment of the present invention may be composed of first, second and third gate pad electrode layers 326pa, 326pb, and 326pc, and the data pad electrode 327p may include first, Layer structure of the second and third data pad electrode layers 327pa, 327pb, and 327pc.

The first gate pad electrode layer 326pa and the first data pad electrode layer 327pa which are the lowermost layer are formed on the adhesion promoting layer 327pb for enhancing the adhesion between the second gate pad electrode layer 326pb and the second data pad electrode layer 327pb, .

The second gate pad electrode layer 326pb and the second data pad electrode layer 327pb are electrically connected to the first gate pad electrode layer 326pa and the first data pad electrode layer 327pa and the third gate pad electrode layer 326pc, And may have a lower resistivity than the third data pad electrode layer 327pc.

As described above, the third pad electrode layers 326pc and 327pc disposed on the uppermost layers of the pad electrodes 326p and 327p may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. In particular, the third pad electrode layers 326pc and 327pc may be formed of a material which is not etched with the etchant used when the first electrode 318 is patterned. That is, the third pad electrode layers 326pc and 327pc disposed on the uppermost layer may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

In addition, as described above, the passivation layer 315c of the pad region may be formed to expose the upper surfaces of the third pad electrode layers 326pc and 327pc of the pad electrodes 326p and 327p. At this time, the protective film 315c is formed to cover all surfaces except for the exposed upper surface of the third pad electrode layers 326pc and 327pc, thereby preventing corrosion of the side surfaces of the third pad electrode layers 326pc and 327pc have.

For example, the interlayer insulating layer 315b of the pad region may include the side surfaces of the first pad electrode layers 326pa and 327pa, the second pad electrodes 326pb and 327pb and the third pad electrode layers 326pc and 327pc, And may cover at least a part of the upper surface of the pad electrode layers 326pc and 327pc.

9A and 9B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a fourth embodiment of the present invention.

In this case, the organic light emitting display device according to the fourth embodiment of the present invention is the same as the second and third embodiments of the present invention described above except that the gate wiring layer is formed with the gate pad electrode and the data pad electrode as the gate wiring. The organic electroluminescent display device according to the present invention has substantially the same configuration as the organic electroluminescent display device according to the first embodiment.

As described above, FIG. 9A illustrates one sub-pixel including a TFT portion and a capacitor forming portion of the organic light emitting display device, and FIG. 9B illustrates a portion of the gate pad region and the data pad region in order .

In particular, FIG. 9A shows one sub-pixel of the organic light emitting display device of the top emission type using the TFT of the coplanar structure. However, the present invention is not limited to a TFT having a coplanar structure.

9A, the organic light emitting display device of the top emission type according to the fourth exemplary embodiment of the present invention includes a substrate 410, a driving thin film transistor DT, an organic light emitting diode, and an auxiliary electrode line VSSLa . However, the present invention is not limited thereto and may not include the auxiliary electrode line VSSLa.

The driving thin film transistor DT includes a semiconductor layer 424, a gate electrode 421, a source electrode 422, and a drain electrode 423 in the same manner as in the first, second, and third embodiments described above.

The semiconductor layer 424 is formed on a substrate 410 made of silicon (Si), glass, or an insulating material such as a transparent plastic or a polymer film.

The semiconductor layer 424 may be composed of an amorphous silicon film or a polysilicon film crystallized from amorphous silicon.

At this time, a buffer layer (not shown) may be further formed between the substrate 410 and the semiconductor layer 424.

A gate insulating film 415a made of a silicon nitride film (SiNx) or a silicon oxide film (SiO2) is formed on the semiconductor layer 424. A gate line (not shown) including a gate electrode 421, (409) are formed.

The gate insulating film 415a may be formed in the display region and the pad region. That is, the gate insulating film 415a may be formed on the entire surface of the substrate 410 on which the semiconductor layer 424 is formed. However, the present invention is not limited thereto.

The gate electrode 421 may be formed to overlap the semiconductor layer 424 in the display region.

The gate electrode 421 and the gate line can be formed integrally.

The gate electrode 421 and the gate line and the lower sustain electrode 409 may be formed of at least two or more layers. For example, the gate electrode 421, the gate line, and the lower sustain electrode 409 may be formed in three layers.

That is, the gate electrode 421 may include a first gate electrode layer 421a, a second gate electrode layer 421b, and a third gate electrode layer 421c. The lower sustain electrode 409 may include a first lower sustain electrode layer 409a, a second lower sustain electrode layer 409b, and a third lower sustain electrode layer 409c.

The first gate electrode layer 421a and the first lower sustain electrode layer 409a may be formed of the same material. The first gate electrode layer 421a and the first lower sustain electrode layer 409a can improve adhesion between the second gate electrode layer 421b and the second lower sustain electrode layer 409b.

For example, the first gate electrode layer 421a and the first lower sustain electrode layer 409a may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

The second gate electrode layer 421b and the second lower sustain electrode layer 409b may be formed of the same material. The second gate electrode layer 421b and the second lower sustain electrode layer 409b may be formed of a material having a low resistance. For example, the second gate electrode layer 421b and the second lower sustain electrode layer 409b may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), silver (Ag), molybdenum (Mo) Cr), tantalum (Ta), titanium (Ti), or a combination thereof. Preferably, the second gate electrode layer 421b and the second lower sustain electrode layer 409b may include copper (Cu).

The third gate electrode layer 421c and the third lower sustain electrode layer 409c may be formed of the same material. The third gate electrode layer 421c and the third lower sustain electrode layer 409c may be formed of a material which is not corroded by oxygen and moisture even when exposed to the outside. For example, the third gate electrode layer 421c and the third lower sustain electrode layer 409c may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

Therefore, the gate wiring according to the fourth embodiment of the present invention can have a three-layer structure of MoTi / Cu / MoTi.

An interlayer insulating film 415b made of a silicon nitride film or a silicon oxide film is formed on the gate electrode 421 and the gate line and the lower sustain electrode 409. A data line (not shown), a driving voltage line (not shown) And source / drain electrodes 422 and 423 and an upper sustain electrode 419 are formed. At this time, the interlayer insulating film 415b may include a plurality of contact holes.

The source electrode 422 and the drain electrode 423 are spaced apart from each other by a predetermined distance and are electrically connected to the semiconductor layer 424. More specifically, a semiconductor layer contact hole exposing the semiconductor layer 424 is formed in the gate insulating film 415a and the interlayer insulating film 415b, and the source / drain electrodes 422 and 423 are formed through the semiconductor layer contact holes And is electrically connected to the semiconductor layer 424.

The source electrode 422 and the data line may be integrally formed.

At this time, the upper sustain electrode 419 overlaps a part of the lower sustain electrode 409 under the interlayer insulating film 415b to form a storage capacitor.

The data lines, that is, the data lines, the driving voltage lines, the source / drain electrodes 422 and 423, and the upper sustain electrode 419 according to the fourth embodiment of the present invention, . For example, a single layer made of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) Layer or a multi-layered structure.

A protective film 415c and a planarization film 415d are formed on a substrate 410 on which a data line, a driving voltage line, source / drain electrodes 422 and 423 and an upper sustain electrode 419 are formed. A protective film 415c may be formed on the display area and the data pad area. The planarization film 415d may not be formed in the pad region. That is, the planarization film 415d may be formed only in the display region where the thin film transistor is formed.

Next, the organic light emitting diode includes a first electrode 418, an organic compound layer 430, and a second electrode 428.

The organic light emitting diode is electrically connected to the driving thin film transistor DT. At this time, a drain contact hole exposing the drain electrode 423 of the driving thin film transistor DT is formed in the protective film 415c and the planarization film 415d formed on the driving thin film transistor DT. The organic light emitting diode is electrically connected to the drain electrode 423 of the driving thin film transistor DT through the drain contact hole.

That is, the first electrode 418 is formed on the planarization film 415d and is electrically connected to the drain electrode 423 of the driving thin film transistor DT through the drain contact hole.

The first electrode 418 supplies a current (or voltage) to the organic compound layer 430, and defines a light emitting region having a predetermined area.

Also, the first electrode 418 serves as an anode. Accordingly, the first electrode 418 may include a transparent conductive material having a relatively large work function. The first electrode 418 may be composed of a plurality of electrode layers. For example, the first electrode 418 may have a three-layer structure in which a first electrode layer 418a, a second electrode layer 418b, and a third electrode layer 418c are sequentially stacked.

The first electrode layer 418a can increase the adhesion of the second electrode layer 418b. For example, the first electrode layer 418a may be formed of a transparent conductive material of ITO or IZO. The second electrode layer 418b may be a reflective layer made of a metal material having high reflection efficiency. For example, the second electrode layer 418b may comprise aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr), or an alloy containing them.

The third electrode layer 418c has a large work function, so that the first electrode 418 can serve as an anode electrode. The third electrode layer 418c may be formed of a transparent conductive material such as ITO or IZO. However, the present invention is not limited thereto.

A bank 415e is formed on the substrate 410 on which the first electrode 418 is formed.

The bank 415e is formed to surround the side surface of the first electrode 418, so that corrosion of the side surface of the first electrode 418 can be prevented.

In the fourth embodiment of the present invention, the bank 415e further includes a second opening for exposing a part of the auxiliary electrode 425 to be described later.

An organic compound layer 430 is formed between the first electrode 418 and the second electrode 428.

9A illustrates a case where the organic compound layer 430 is formed on the entire surface of the substrate 410. However, the present invention is not limited thereto, and the organic compound layer 430 may be formed only on the first electrode 418 have.

In FIG. 9A, the organic compound layer 430 is shown as a single layer, but the present invention is not limited thereto. The organic compound layer 430 may have a multi-layer structure including a sub-layer for improving the light-emitting efficiency of the light-emitting layer in addition to the light-emitting layer.

The second electrode 428 is formed on the organic compound layer 430 to provide electrons to the organic compound layer 430.

The second electrode 428 serves as a cathode. Accordingly, the second electrode 428 is made of a transparent conductive material. For example, the second electrode 428 may comprise ITO or IZO. The second electrode 428 may further include a thin metal film (not shown) made of a metal material having a low work function on the side contacting the organic compound layer 430. For example, a thin metal film (not shown) may include magnesium (Mg), silver (Ag), and compounds thereof.

In order to reduce the resistance of the second electrode 428, the auxiliary electrode line VSSLa is formed on the same layer as the first electrode 418 in the same manner as the first, second, and third embodiments of the present invention described above . At this time, the auxiliary electrode line VSSLa includes the auxiliary electrode 425 and the partition wall 435 described above.

The auxiliary electrode 425 is formed on the same layer as the first electrode 418. For example, the auxiliary electrode 425 may extend continuously in one direction and may be connected to an external VSS pad (not shown).

The auxiliary electrode 425 has a three-layer structure including first, second, and third auxiliary electrode layers 425a, 425b, and 425c substantially the same as the first electrode 418. When the second electrode 428 is deposited, And may be directly contacted to the third auxiliary electrode layer 425c. That is, the second electrode 428 is deposited to the lower portion of the barrier rib 435, and contacts the auxiliary electrode 425. However, the present invention is not limited thereto.

A barrier rib 435 is formed on the auxiliary electrode 425.

At this time, the barrier ribs 435 may have a reverse taper shape in which the cross-sectional area decreases from the upper portion to the lower portion. For example, the angle formed by the side surface of the barrier rib 435 and the auxiliary electrode 425 may be 20 to 80 degrees, and a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

The barrier ribs 435 form an electrode contact hole for exposing the auxiliary electrode 425 to the organic compound layer 430. The organic compound layer 430 is formed on the barrier ribs 435 by the shading effect and is not formed under the upper portion of the barrier ribs 435. Therefore, an electrode contact hole is formed in the organic compound layer 430.

On the barrier ribs 435, an organic compound layer 430 and a second electrode 428 are sequentially stacked.

At this time, the edge region of the TFT substrate 410 constituting the display region is a pad region, and the pad region includes a gate pad region and a data pad region.

Referring to FIG. 9B, a gate pad electrode 426p and a data pad electrode 427p electrically connected to the gate line and the data line, respectively, are formed. The scan signal and data (data) Signal to the gate line and the data line, respectively.

That is, the gate line and the data line extend to the driving circuit portion and are electrically connected to the corresponding gate pad electrode 426p and the data pad electrode 427p, respectively. Therefore, the gate lines and the data lines are supplied with the scan signals and the data signals from the driver circuit portions through the gate pad electrodes 426p and the data pad electrodes 427p, respectively.

At this time, the gate pad electrode 426p may be formed integrally with the gate line.

On the other hand, since the data pad electrode 427p is formed on the same layer as the gate wiring layer, the data line electrode 427p can be electrically connected to the data line through the connection wiring 460.

The gate pad electrode 426p and the data pad electrode 427p in the pad region may be formed in the same process as the gate electrode 421 and the gate line and the lower sustain electrode 409 in the display region. The connection electrode 460 of the pad region may be formed in the same process as the data line, the driving voltage line, the source / drain electrodes 422 and 423, and the upper sustain electrode 419 in the display region.

The interlayer insulating film 415b and the protective film 415c in the pad region may include an open hole H exposing the gate pad electrode 426p and the data pad electrode 427p. A portion of the data pad electrode 427p may be exposed to the outside through the open hole H and the remaining portion of the top surface of the data pad electrode 427p through the contact hole may be connected to the connection wiring 460 . The connection wiring 460 may be an extended wiring of the data line.

The interlayer insulating film 415b in the pad region is formed to surround the side surfaces of the gate pad electrode 426p and the data pad electrode 427p to prevent corrosion of the side surfaces of the gate pad electrode 426p and the data pad electrode 427p .

The open hole H of the pad region can be formed together in the same process as the drain contact hole exposing the drain electrode 423. However, the method of forming the contact hole according to the present invention is not limited to this.

At this time, the gate pad electrode 426p and the data pad electrode 427p according to the fourth embodiment of the present invention are formed in the same layer as the gate wiring in the display region, and have a three-layer structure substantially the same as the gate wiring. For example, a three-layer structure of MoTi / Cu / MoTi.

That is, in the fourth embodiment of the present invention, three layers of MoTi / Cu / MoTi having etch selectivity for the etchant for etching the Ag or Ag alloy on the gate pad electrode 426p and the data pad electrode 427p in the pad region And an open hole H is formed at the time of patterning the passivation layer 415c to expose a part of the gate pad electrode 426p and the data pad electrode 427p to the outside.

At this time, the upper MoTi may act as an etch stopper for etching the Ag or Ag alloy.

As described above, the patterning of the first electrode 418 may be performed using a phosphoric acid etchant, a nitric acid etchant, a phosphoric acid + nitric acid etchant, a phosphoric acid + acetic acid etchant, a nitric acid + acetic acid etchant or a phosphoric acid + Nitric acid + acetic acid etchant can be used. In addition, an etchant not containing potassium fluoride and hydrogen peroxide may be used for patterning the first electrode 418.

The gate pad electrode 426p according to the fourth embodiment of the present invention may be composed of first, second and third gate pad electrode layers 426pa, 426pb, and 426pc, and the data pad electrode 427p may include first, Layer structure of the second and third data pad electrode layers 427pa, 427pb, and 427pc.

The first gate pad electrode layer 426pa and the first data pad electrode layer 427pa which are the lowermost layer are formed as adhesion promoting layers for increasing the adhesion between the second gate pad electrode layer 426pb and the second data pad electrode layer 427pb, .

The second gate pad electrode layer 426pb and the second data pad electrode layer 427pb are electrically connected to the first gate pad electrode layer 426pa, the first data pad electrode layer 427pa, the third gate pad electrode layer 426pc, And may have a lower resistivity than the third data pad electrode layer 427pc.

As described above, the third pad electrode layers 426pc and 427pc disposed on the uppermost layers of the pad electrodes 426p and 427p may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. In particular, the third pad electrode layers 426pc and 427pc may be formed of a material which is not etched with the etchant used when the first electrode 418 is patterned. That is, the third pad electrode layers 426pc and 427pc disposed on the uppermost layer may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

The interlayer insulating layer 415b and the protective layer 415c in the pad region may be formed to expose the upper surfaces of the third pad electrode layers 426pc and 427pc of the pad electrodes 426p and 427p as described above. In this case, the interlayer insulating layer 415b is formed to cover all surfaces except for the exposed upper surface of the third gate pad electrode layer 426pc, and the protective layer 415c is formed in the gate pad region and the third data pad electrode layer 427pc ), So that corrosion of the side surfaces of the third pad electrode layers 426pc and 427pc can be prevented.

For example, the interlayer insulating layer 415b of the pad region may include the side surfaces of the first pad electrode layers 426pa and 427pa, the second pad electrodes 426pb and 427pb and the third pad electrode layers 426pc and 427pc, And may cover at least a part of the upper surface of the pad electrode layers 426pc and 427pc.

On the other hand, when the etchant for etching Ag or Ag alloy penetrates between the cracks generated by the foreign object or the patterning of the protective film, the Cu of the gate pad electrode and the data pad electrode may be damaged. In order to prevent this, in the fifth embodiment of the present invention, the third gate pad electrode layer and the third data pad electrode layer are formed so as to cover the first and second gate pad electrode layers and the first and second data pad electrode layers, and a clad structure is applied. In addition, such a clad structure can of course be applied to the pad electrodes of the above-described first to fourth embodiments.

In the clad structure, the third gate pad electrode layer and the third data pad electrode layer as the uppermost layer are formed on the first gate pad electrode layer and the second gate pad electrode layer as well as the second gate pad electrode layer and the second data pad electrode layer, And both side surfaces of the first and second data pad electrodes are sealed to cover the first and second gate pad electrode layers and the first and second data pad electrode layers.

Therefore, the reliability is improved, the defect is reduced, and the productivity is improved.

10A and 10B are cross-sectional views schematically showing a part of a structure of an organic light emitting display according to a fifth embodiment of the present invention.

10A illustrates one sub-pixel including a TFT portion and a capacitor forming portion of an organic light emitting display device, and FIG. 10B illustrates a portion of a gate pad region and a data pad region in order.

In particular, FIG. 10A shows one sub-pixel of the organic light emitting display device of the top emission type using the TFT of the coplanar structure as an example. The present invention is not limited to the coplanar TFT.

10A, the organic light emitting display device of the top emission type according to the second embodiment of the present invention includes a substrate 510, a driving thin film transistor DT, an organic light emitting diode, and an auxiliary electrode line VSSLa . However, the present invention is not limited thereto and may not include the auxiliary electrode line VSSLa.

The driving thin film transistor DT includes the semiconductor layer 524, the gate electrode 521, the source electrode 522, and the drain electrode 523 in the same manner as in the first, second, third, do.

The semiconductor layer 524 is formed on a substrate 201 made of silicon (Si), glass, or an insulating material such as a transparent plastic or a polymer film.

The semiconductor layer 524 may be formed of an amorphous silicon film or a polycrystalline silicon film crystallized from amorphous silicon.

At this time, a buffer layer (not shown) may be further formed between the substrate 510 and the semiconductor layer 524.

A gate insulating film 515a made of a silicon nitride film (SiNx) or a silicon oxide film (SiO2) is formed on the semiconductor layer 524. A gate line (not shown) including a gate electrode 521, (Not shown).

The gate insulating film 515a may be formed in the display region and the pad region. That is, the gate insulating layer 515a may be formed on the entire surface of the substrate 510 on which the semiconductor layer 524 is formed. The present invention is not limited thereto.

The gate electrode 521 may be formed to overlap the semiconductor layer 524 in the display region.

The gate electrode 521 and the gate line may be formed integrally.

The gate electrode 521 and the gate line and the lower sustain electrode 509 are formed of a first metal material having low resistance characteristics such as aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr) (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or an alloy thereof.

The gate electrode 521, the gate line, and the lower sustain electrode 509 are formed as a single layer in the drawing, but may be formed of at least two or more layers.

An interlayer insulating film 515b made of a silicon nitride film, a silicon oxide film or the like is formed on the gate electrode 521 and the gate line and the lower sustain electrode 509. A data line (not shown), a driving voltage line (not shown) And source / drain electrodes 522 and 523 and an upper sustain electrode 519 are formed. At this time, the interlayer insulating film 515b may include a plurality of contact holes.

The source electrode 522 and the drain electrode 523 are spaced apart from each other by a predetermined distance and are electrically connected to the semiconductor layer 524. More specifically, a semiconductor layer contact hole exposing the semiconductor layer 524 is formed in the gate insulating film 515a and the interlayer insulating film 515b, and the source / drain electrodes 522 and 523 are formed through the semiconductor layer contact holes. And is electrically connected to the semiconductor layer 524.

The source electrode 522 and the data line may be integrally formed

At this time, the upper sustain electrode 519 overlaps a part of the lower sustain electrode 509 under the interlayer insulating film 515b to form a storage capacitor.

In this case, the data lines, that is, the data lines, the driving voltage lines, the source / drain electrodes 522 and 523, and the upper sustain electrodes 519 according to the fifth embodiment of the present invention may be formed in multiple layers.

For example, the data line according to the fifth embodiment of the present invention may have three layers.

That is, the source electrode 522 may have a three-layer structure including first, second and third source electrode layers 522a, 522b and 522c, and the drain electrode 523 may include a first, a second, Layer structure of the electrode layers 523a, 523b, and 523c.

The upper sustain electrode 519 may have a three-layer structure including first, second and third second sustain electrode layers 519a, 519b and 519c.

The first source electrode layer 522a, the first drain electrode layer 523a, and the lower sustain electrode layer 519a may be formed of the same material. The first source electrode layer 522a, the first drain electrode layer 523a and the first sustain electrode layer 519a are electrically connected to the second source electrode layer 522b, the second drain electrode layer 523b, The adhesion of the layer 519b can be improved.

For example, the first source electrode layer 522a, the first drain electrode layer 523a, and the first sustain electrode layer 519a may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof .

The second source electrode layer 522b, the second drain electrode layer 523b, and the second sustain electrode layer 519b may be formed of the same material. The second source electrode layer 522b, the second drain electrode layer 523b, and the second sustain electrode layer 519b may be formed of a material having a low resistance. For example, the second source electrode layer 522b, the second drain electrode layer 523b, and the second sustain electrode layer 519b may be formed of aluminum (Al), tungsten (W), copper (Cu), silver (Ag) , Molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), or combinations thereof. Preferably, the second source electrode layer 522b, the second drain electrode layer 523b, and the second sustain electrode layer 519b may include copper (Cu).

The third source electrode layer 522c, the third drain electrode layer 523c, and the third sustain electrode layer 519c may be formed of the same material. The third source electrode layer 522c, the third drain electrode layer 523c, and the third sustain electrode layer 519c may be formed of a material that is not corroded by oxygen and moisture even when exposed to the outside. For example, the third source electrode layer 522c, the third drain electrode layer 523c, and the third sustain electrode layer 519c may be formed of any one of molybdenum titanium (MoTi), titanium (Ti) .

Therefore, the data line according to the fifth embodiment of the present invention can have a three-layer structure of MoTi / Cu / MoTi.

A protective film 515c and a planarization film 515d are formed on a substrate 510 on which a data line, a driving voltage line, source / drain electrodes 522 and 523 and an upper sustain electrode 519 are formed. A protective film 515c is formed on the display region and the pad region and may be formed on the entire surface of the substrate 510. [ The planarizing film 515d may not be formed in the pad region. That is, the planarization film 515d may be formed only in the display region where the thin film transistor is formed.

Next, the organic light emitting diode includes a first electrode 518, an organic compound layer 530, and a second electrode 528.

The organic light emitting diode is electrically connected to the driving thin film transistor DT. At this time, a drain contact hole exposing the drain electrode 523 of the driving thin film transistor DT is formed in the protective film 515c and the planarization film 515d formed on the driving thin film transistor DT. The organic light emitting diode is electrically connected to the drain electrode 523 of the driving thin film transistor DT through the drain contact hole.

That is, the first electrode 518 is formed on the planarization film 515d and is electrically connected to the drain electrode 523 of the driving thin film transistor DT through the drain contact hole.

The first electrode 518 supplies a current (or voltage) to the organic compound layer 530, and defines a light emitting region having a predetermined area.

Also, the first electrode 518 serves as an anode. Accordingly, the first electrode 518 may include a transparent conductive material having a relatively large work function. The first electrode 518 may be composed of a plurality of electrode layers. For example, the first electrode 518 may have a three-layer structure in which a first electrode layer 518a, a second electrode layer 518b, and a third electrode layer 518c are sequentially stacked.

The first electrode layer 518a can increase the adhesion of the second electrode layer 518b. For example, the first electrode layer 518a may be formed of a transparent conductive material such as ITO or IZO. The second electrode layer 518b may be a reflective layer made of a metal material having high reflection efficiency. For example, the second electrode layer 518b may comprise aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr)

The third electrode layer 518c has a large work function, so that the first electrode 518 can serve as an anode electrode. For example, the third electrode layer 518c may be formed of a transparent conductive material such as ITO or IZO.

However, the present invention is not limited thereto.

A bank 515e is formed on the substrate 510 on which the first electrode 518 is formed.

The bank 515e is formed to surround the side surface of the first electrode 518, so that corrosion of the side surface of the first electrode 518 can be prevented.

In the fifth embodiment of the present invention, the bank 515e further includes a second opening exposing a part of the auxiliary electrode 525 to be described later.

An organic compound layer 530 is formed between the first electrode 518 and the second electrode 528. The organic compound layer 530 emits light by the combination of the holes supplied from the first electrode 518 and the electrons supplied from the second electrode 528.

10A shows a case where the organic compound layer 530 is formed on the entire surface of the substrate 510. However, the present invention is not limited thereto, and the organic compound layer 230 may be formed only on the first electrode 518 have.

In FIG. 10A, the organic compound layer 530 is shown as a single layer, but the present invention is not limited thereto. The organic compound layer 530 may have a multi-layer structure including a sub-layer for improving the light-emitting efficiency of the light-emitting layer in addition to the light-emitting layer.

The second electrode 528 is formed on the organic compound layer 530 to provide electrons to the organic compound layer 530.

The second electrode 528 serves as a cathode. Accordingly, the second electrode 528 is made of a transparent conductive material. For example, the second electrode 528 may comprise ITO or IZO. The second electrode 528 may further include a thin metal film (not shown) made of a metal material having a low work function on the side in contact with the organic compound layer 530. For example, a thin metal film (not shown) may include magnesium (Mg), silver (Ag), and compounds thereof.

Also, in order to reduce the resistance of the second electrode 528, the auxiliary electrode line VSSLa is the same as the first electrode 518 in the same manner as the first, second, third, and fourth embodiments of the present invention Layer. At this time, the auxiliary electrode line VSSLa includes the auxiliary electrode 525 and the partition 535 described above.

The auxiliary electrode 525 is formed on the same layer as the first electrode 518. For example, the auxiliary electrode 525 may extend continuously in one direction and may be connected to an external VSS pad (not shown).

The auxiliary electrode 525 has a three-layer structure including first, second, and third auxiliary electrode layers 525a, 525b, and 525c substantially the same as the first electrode 518. When the second electrode 528 is deposited, And may be directly contacted to the third auxiliary electrode layer 525c. That is, the second electrode 528 is deposited to the lower portion of the barrier 535, and contacts the auxiliary electrode 525. The present invention is not limited thereto.

A barrier rib 535 is formed on the auxiliary electrode 525.

At this time, the partition 535 may have a reverse taper shape in which the sectional area decreases from the upper portion to the lower portion. For example, the angle formed by the side surface of the barrier rib 535 and the auxiliary electrode 525 may be 20 to 80 degrees, and a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

The barrier rib 535 forms an electrode contact hole for exposing the auxiliary electrode 525 to the organic compound layer 530. The organic compound layer 530 is formed on the partition 535 by the shading effect and is not formed under the upper portion of the partition 535. Therefore, an electrode contact hole is formed in the organic compound layer 530.

On the barrier 535, an organic compound layer 530 and a second electrode 528 are sequentially stacked.

In this case, the edge region of the TFT substrate 510 constituting the display region is a pad region, and the pad region includes a gate pad region and a data pad region.

Referring to FIG. 10B, a gate pad electrode 526p and a data pad electrode 527p electrically connected to a gate line and a data line, respectively, are formed. The scan signal and data (data) supplied from an external driving circuit Signal to the gate line and the data line, respectively.

That is, the gate lines and the data lines extend to the driver circuit portion and are connected to the corresponding gate pad lines 516p and data pad lines 517p, respectively. The gate pad line 516p and the data pad line 517p are electrically connected to the gate pad electrode 526p and the data pad electrode 527p, respectively. Accordingly, the gate lines and the data lines are supplied with the scan signals and the data signals from the driver circuit portions through the gate pad electrodes 526p and the data pad electrodes 527p, respectively.

At this time, the gate pad line 516p may be formed integrally with the gate line.

The gate pad line 516p and the data pad line 517p of the pad region may be formed in the same process as the gate electrode 521 and the gate line of the display region.

The data pad electrode 527p may be formed integrally with the data line.

The gate pad electrode 526p and the data pad electrode 527p of the pad region are formed in the same process as the data line, the driving voltage line and the source / drain electrodes 522 and 523 and the upper sustain electrode 519 in the display region .

At this time, although the gate pad line 516p and the data pad line 517p are formed as a single layer in the figure, they may be formed in at least two or more layers.

The interlayer insulating film 515b in the pad region may include a contact hole exposing the gate pad line 516p and the data pad line 517p. The passivation layer 515c of the pad region may include an open hole H exposing the gate pad electrode 526p and the data pad electrode 527p.

The open hole H of the pad region can be formed together in the same process as the drain contact hole exposing the drain electrode 523. The method of forming the contact hole according to the present invention is not limited thereto. At this time, the gate pad electrode 526p and the data pad electrode 527p according to the fifth embodiment of the present invention are formed in the same layer as the data line in the display area, and have a three-layer structure substantially the same as the data line. For example, a three-layer structure of MoTi / Cu / MoTi.

That is, in the fifth embodiment of the present invention, three layers of MoTi / Cu / MoTi having etch selectivity for the etchant for etching Ag or Ag alloy on the gate pad electrode 526p and the data pad electrode 527p of the pad region The open hole H is formed in the patterning of the passivation layer 515c to expose a part of the gate pad electrode 526p and the data pad electrode 527p to the outside.

At this time, the upper MoTi may act as an etch stopper for etching the Ag or Ag alloy.

As described above, the patterning of the first electrode 518 may be performed by using a mixture of phosphoric acid etchant, nitric acid etchant, phosphoric acid + nitric acid etchant, phosphoric acid + acetic acid etchant, nitric acid + acetic acid etchant or phosphoric acid + Nitric acid + acetic acid etchant can be used. In addition, an etchant not containing potassium fluoride and hydrogen peroxide may be used for patterning the first electrode 518.

In this case, the gate pad electrode 526p according to the fifth embodiment of the present invention may be composed of first, second, and third gate pad electrode layers 526pa, 526pb, and 526pc, and the data pad electrode 227p, Layer structure of the first, second and third data pad electrode layers 527pa, 527pb and 527pc.

The first gate pad electrode layer 526pa and the first data pad electrode layer 527pa which are the lowermost layer are formed as adhesion promoting layers for increasing the adhesion between the second gate pad electrode layer 526pb and the second data pad electrode layer 527pb, . That is, the first gate pad electrode layer 526pa may be made of a material configured to increase the adhesive force between the second gate pad electrode layer 526pb and the fourth pad electrode layer thereunder, that is, the gate pad line 516p. have. In addition, the first data pad electrode layer 527pa may be made of a material configured to increase the adhesion between the second data pad electrode layer 527pb and the fourth pad electrode layer thereunder, that is, the data pad line 517p. have.

The second gate pad electrode layer 526pb and the second data pad electrode layer 527pb are electrically connected to the first gate pad electrode layer 526pa, the first data pad electrode layer 527pa, the third gate pad electrode layer 526pc, And may have a lower resistivity than the third data pad electrode layer 527pc.

The pad electrodes 526p and 527p must be exposed to the outside in order to be connected to the driving circuit portion. The pad electrodes 526p and 527p made of copper or the like are advantageous for signal transmission due to their small resistance. When the pad electrodes 526p and 527p formed of copper or the like are exposed to the outside, they are in contact with oxygen and moisture Corrosion can occur. In the process of forming the organic light emitting diode after the pad electrodes 526p and 527p formed of copper or the like, Ag or Ag alloy used for patterning the first electrode 518 when patterning the first electrode 518, There is a problem that the etchant is etched together with the etchant.

Accordingly, the third pad electrode layers 526pc and 527pc disposed on the uppermost layers of the pad electrodes 526p and 527p may be formed of a material that is not corroded by oxygen and water even when exposed to the outside. In particular, the third pad electrode layers 526pc and 527pc may be formed of a material which is not etched with the etchant used for patterning the first electrode 518. [ That is, the third pad electrode layers 526pc and 527pc disposed on the uppermost layer may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

In addition, as described above, the passivation layer 515c of the pad region may be formed to expose the upper surfaces of the third pad electrode layers 526pc and 527pc of the pad electrodes 526p and 527p. At this time, the protective layer 515c is formed to surround the side surfaces of the pad electrodes 526p and 527p, thereby preventing corrosion of the side surfaces of the third pad electrode layers 526pc and 527pc. For example, the passivation layer 515c of the pad region may be configured to cover at least a portion of the side surfaces of the third pad electrode layers 526pc and 527pc and the upper surfaces of the third pad electrode layers 526pc and 527pc.

At this time, when the etchant for etching the Ag or the Ag alloy penetrates between the cracks generated by foreign matter or the cracks generated when the protective film 515c is patterned, damage to the Cu of the gate pad electrode 526p and the data pad electrode 527p May occur. In order to prevent this, in the fifth embodiment of the present invention, the third gate pad electrode layer 526pc and the third data pad electrode layer 527pc are formed on the first and second gate pad electrode layers 526pa and 526pb, And the second data pad electrode layers 527pa and 527pb are covered with a clad structure.

Therefore, the reliability is improved, the defect is reduced, and the productivity is improved.

After the first and second gate pad electrode layers 526pa and 526pb and the first and second data pad electrode layers 527pa and 527pb are patterned to form the clad structure, Layer 526pc and the third data pad electrode layer 527pc are patterned. At this time, the third gate pad electrode layer 526pc and the third data pad electrode layer 526pb are formed closer to the first and second gate pad electrode layers 526pa and 526pb than the first and second data pad electrode layers 527pa and 527pb. 527pc).

That is, the third gate pad electrode layer 526pc and the third data pad electrode layer 527pc are configured to contact both sides of the first gate pad electrode layer 526pa and the first data pad electrode layer 527pa, The second gate pad electrode layer 526pb and the second data pad electrode layer 527pb may be sealed.

In the case of patterning the gate pad electrode 526p and the data pad electrode 527p according to the fifth embodiment of the present invention in a three-layered structure of MoTi / Cu / MoTi as in the second embodiment, Cu etched faster than MoTi due to the difference in etch rate between Cu and MoTi during batch etching of MoTi / Cu / MoTi three-layer structure. Thus, Cu may be etched more than MoTi to form an overhang structure like a eave with the MoTi layer protruding. Due to the overhang structure, a crack may occur when forming the gate pad electrode 226p and the data pad electrode 227p. Therefore, when the etchant for etching Ag or Ag alloy between the cracks penetrates, the Cu of the gate pad electrode 226p and the data pad electrode 227p may be damaged.

Therefore, in the fifth embodiment of the present invention, it is possible to prevent the overhang structure from being formed by using a clad structure that covers the upper MoTi after first patterning Cu / MoTi.

Hereinafter, a method of manufacturing an organic light emitting display according to a fifth embodiment of the present invention will be described in detail with reference to the drawings.

11A to 11J are cross-sectional views sequentially showing a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 10A, sequentially showing a method of manufacturing a TFT substrate in a display area.

12A to 12F are cross-sectional views sequentially illustrating a method of manufacturing an organic light emitting display according to a second embodiment of the present invention shown in FIG. 10B, and sequentially illustrate a method of manufacturing a TFT substrate of a pad region .

As shown in FIGS. 11A and 12A, a substrate 210 made of a transparent glass material or an insulating material such as a transparent plastic or a polymer film excellent in flexibility is prepared.

Although not shown in detail, a TFT and a storage capacitor are formed in red, green, and blue sub-pixels of the substrate 510, respectively.

First, a buffer layer (not shown) is formed on the substrate 510.

Next, a semiconductor thin film is formed on the substrate 510 on which the buffer layer is formed.

In this case, the buffer layer may be formed to protect the thin film transistor from impurities such as alkali ions flowing out from the substrate 510 when the semiconductor layer is crystallized, and may be formed of a silicon oxide film.

The semiconductor thin film may be formed of amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

In this case, the polycrystalline silicon can be formed by depositing amorphous silicon on the substrate 510 and then using various crystallization methods. When an oxide semiconductor is used as a semiconductor thin film, a predetermined heat treatment process can be performed after depositing an oxide semiconductor. have.

Thereafter, the semiconductor thin film is selectively removed through a photolithography process to form a semiconductor layer 524 made of a semiconductor thin film on the substrate 510 in the display area.

Next, as shown in FIGS. 11B and 12B, a gate insulating film 515a and a first conductive film are formed on the substrate 510 on which the semiconductor layer 524 is formed.

The gate insulating layer 515a may be formed on the entire surface of the substrate 510 on which the semiconductor layer 524 is formed.

The first conductive film may be formed of one of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium A low resistance opaque conductive material such as an alloy thereof can be used. However, they may have a multi-layer structure including two conductive films having different physical properties. One of the conductive films may be a metal having a low resistivity so as to reduce signal delay or voltage drop. For example, aluminum-based metals, silver-based metals, copper-based metals, and the like.

A gate line (not shown) and a lower sustain electrode 509 including a gate electrode 521 made of a first conductive film are formed on the substrate 510 of the display area by selectively removing the first conductive film through a photolithography process, And a gate pad line 516p and a data pad line 517p made of a first conductive film are formed on the substrate 510 of the pad region.

The gate electrode 521 may be formed in a region overlapping with the semiconductor layer 524.

The gate pad line 516p may be formed integrally with the gate line.

Although the gate electrode 521, the gate line, the lower sustain electrode 509, the gate pad line 516p, and the data pad line 517p are formed as a single layer in the drawing, they may be formed of at least two or more layers.

However, the present invention is not limited thereto. The gate line including the semiconductor layer 524 and the gate electrode 521, the lower sustain electrode 509, the gate pad line 516p, and the data pad line 517p may be formed May be formed through a photolithography process.

The gate insulating layer 515a under the gate line including the gate electrode 521, the lower sustain electrode 509, the gate pad line 516p, and the data pad line 517p may be patterned together .

11C and 12C, a substrate 510 having a gate line including a gate electrode 521, a lower sustain electrode 509, a gate pad line 516p and a data pad line 517p is formed. An interlayer insulating film 515b made of a silicon nitride film, a silicon oxide film or the like is formed on the entire surface.

The interlayer insulating film 515b may be formed on the entire surface of the substrate 510. [

The interlayer insulating film 515b and the gate insulating film 515a are selectively patterned through a photolithography process to form a first contact hole 550a exposing a source / drain region of the semiconductor layer 524, A second contact hole 550b and a third contact hole 550c exposing a part of the line 516p and the data pad line 517p are formed.

Next, as shown in FIGS. 11D and 12D, a second conductive film and a third conductive film are formed on the entire surface of the substrate 510 on which the interlayer insulating film 515b is formed, and then the second conductive film and the third conductive film are formed through a photolithography process. The first and second source / drain electrode layers 522a, 522b, and 523a (that is, the first and second source / drain electrode layers 522a, 522b, 523a, and 523a) made of the second conductive film and the third conductive film are formed on the substrate 510 of the display region by selectively removing the third conductive film. First and second data line layers (not shown), and first and second upper sustain electrode layers 519a and 519b) are formed on the first and second insulating layers 513a and 513b.

At the same time, a first pad electrode (i.e., first and second gate pad electrode layers 526pa and 526pb) and a first and a second data pad Electrode layers 527pa and 527pb) are formed.

At this time, the third conductive film may be formed of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel ), Neodymium (Nd), or an alloy thereof. However, they may have a multi-layer structure including two conductive films having different physical properties. Particularly, in the fifth embodiment of the present invention, Cu to be etched in an etchant for etching Ag or Ag alloy as the third conductive film can be used.

Further, the second conductive film may use MoTi to form the lower layer data line and the pad electrode. However, the present invention is not limited thereto, and it is also possible to use another material as long as the adhesive strength of the intermediate layer is enhanced. The second conductive film may be formed of any one of molybdenum titanium (MoTi), titanium (Ti), and alloys thereof.

Next, as shown in FIGS. 11E and 12E, a fourth conductive film is formed on the entire surface of the substrate 510 on which the primary data line is formed, and then the fourth conductive film is selectively removed through a photolithography process, The third source / drain electrode layers 522c and 523c, the third driving voltage line layer (not shown), the third data line layer (not shown), and the third data line layer And the third second sustain electrode layer 519c) are formed.

At the same time, a second pad electrode (that is, a third gate pad electrode layer 526pc and a third data pad electrode layer 527pc) made of a fourth conductive film is formed on the substrate 510 of the pad region.

At this time, the fourth conductive film can use MoTi to form upper data lines and pad electrodes. However, the present invention is not limited thereto, and it is possible to use another material as long as the fourth conductive film is used as an etch stopper for etching Ag or Ag alloy.

The source electrode 522 of the triple layer structure of the first, second and third source electrode layers 522a, 522b and 522c and the first and second source electrode layers 522a, 522b and 522c are formed on the substrate 510 of the display area through the two- And the third drain electrode layers 523a, 523b, and 523c can be formed.

In addition, the upper sustain electrode 519 having a three-layer structure including first, second and third sustain electrode layers 519a, 519b and 519c can be formed on the lower sustain electrode 509.

At the same time, a gate pad electrode 526p having a three-layer structure of first, second and third gate pad electrode layers 526pa, 526pb and 526pc and a first, second and third The data pad electrode 527p having the three-layer structure of the data pad electrode layers 527pa, 527pb, and 527pc can be formed.

At this time, as described above, for example, the data line and the pad electrode according to the fifth embodiment of the present invention may have a three-layer structure of MoTi / Cu / MoTi.

In the fifth embodiment of the present invention, the second pad electrode, that is, the third gate pad electrode layer 526pc and the third data pad electrode layer 527pc are connected to the first pad electrode, that is, The clad structure is applied so as to cover the first and second data pad electrode layers 526pa and 526pb and the first and second data pad electrode layers 527pa and 527pb. Therefore, it is possible to prevent the etchant for etching Ag or Ag alloy from penetrating into the cracks caused by foreign matter or patterning of the protective film and damaging the Cu of the gate pad electrode 526p and the data pad electrode 527p .

At this time, the third gate pad electrode layer 526pc and the third data pad electrode layer 527pc are configured to contact both sides of the first gate pad electrode layer 526pa and the first data pad electrode layer 527pa The second gate pad electrode layer 526pb, and the second data pad electrode layer 527pb.

The source and drain electrodes 522 and 523 are electrically connected to the source and drain regions of the semiconductor layer 524 through the first contact hole and the upper sustain electrode 519 is electrically connected to the source / And overlaps a part of the lower sustain electrode 509 at the lower part thereof to form a storage capacitor.

The gate pad electrode 526p and the data pad electrode 527p are electrically connected to the gate pad line 516p and the data pad line 517p under the second contact hole and the third contact hole, respectively .

Then, the source / drain electrodes 522 and 523, the driving voltage line, the data line, the upper sustain electrode 519, the gate pad electrode 526p, and the data pad electrode 527p, as shown in FIGS. 11F and 12F, A protective film 515c made of a silicon nitride film, a silicon oxide film, or the like is formed on the substrate 510 in the display region where the display region is formed.

In this case, the planarization layer 515d made of an organic insulating material may be formed on the passivation layer 515c, but the present invention is not limited thereto, and the passivation layer 515c may serve as a planarization layer.

A fourth contact hole 550d for exposing the drain electrode 523 is selectively formed by selectively patterning the passivation layer 515c and the planarization layer 515d through the photolithography process while the gate pad electrode 526p and data An open hole H for exposing a part of the pad electrode 527p to the outside is formed.

Next, as shown in FIG. 11G, a fifth conductive film, a sixth conductive film, and a seventh conductive film are formed on the entire surface of the substrate 510 on which the planarization film 515d is formed.

However, the present invention is not limited thereto. For example, only a single layer of the fifth conductive layer may be formed on the entire surface of the substrate 510 on which the planarization layer 515d is formed.

The fifth conductive film and the seventh conductive film may be made of a transparent conductive material such as ITO or IZO.

The sixth conductive film may be made of aluminum (Al), silver (Ag), gold (Au), platinum (Pt), chromium (Cr), or an alloy containing them.

Then, the fifth conductive layer, the sixth conductive layer, and the seventh conductive layer are selectively removed through a photolithography process to form a first electrode 518 composed of a fifth conductive layer, a sixth conductive layer, and a seventh conductive layer, (525).

In this case, the first electrode 518 includes a first electrode layer 518a, a second electrode layer 518b, and a third electrode layer 518c each made of a fifth conductive film, a sixth conductive film, and a seventh conductive film, .

The auxiliary electrode 525 includes a first auxiliary electrode layer 525a, a second auxiliary electrode layer 525b, and a third auxiliary electrode layer 525c formed of a fifth conductive film, a sixth conductive film, and a seventh conductive film, ).

The first electrode 518, which is an anode, is electrically connected to the drain electrode 523 of the driving thin film transistor through the fourth contact hole.

In addition, the first electrode 518 is formed corresponding to each of red, green, and blue sub-pixels on the substrate 510.

11H, a predetermined bank 515e is formed on the substrate 510 of the display area where the first electrode 518 and the auxiliary electrode 525 are formed.

At this time, the bank 515e surrounds the periphery of the first electrode 518 and defines an opening, and is made of an organic insulating material or an inorganic insulating material. Further, the bank 515e further includes a second opening for exposing a part of the auxiliary electrode 525. [

Then, as shown in Fig. 11I, a partition 535 is formed on the substrate 510 on which the bank 515e is formed.

A barrier rib 535 is formed on the auxiliary electrode 525.

At this time, the partition 535 may have a reverse taper shape in which the sectional area decreases from the upper portion to the lower portion. For example, the angle formed between the side surface of the barrier rib 535 and the auxiliary electrode 525 may be 20 ° to 80 °, and a shading effect to be described later can be obtained due to the reverse tapered shape having an angle to the side surface.

Next, as shown in FIG. 11J, an organic compound layer 530 is formed on the substrate 510 on which the barrier ribs 535 are formed by evaporation.

In this case, the barrier rib 535 forms an electrode contact hole for exposing the auxiliary electrode 525 to the organic compound layer 530. The organic compound layer 530 is formed on the partition 535 by the shading effect and is not formed under the upper portion of the partition 535. Thus, an electrode contact hole is formed in the organic compound layer 530.

Although not shown, first, a hole injection layer and a hole transport layer are sequentially formed on a substrate 510.

At this time, the hole injecting layer and the hole transporting layer are formed in common to the red, green and blue sub-pixels to smoothly inject and transport holes. At this time, any one of the hole injecting layer and the hole transporting layer may be omitted.

Next, a light emitting layer is formed on the substrate 510 on which the hole transporting layer is formed.

At this time, the light emitting layer may include a red light emitting layer, a green light emitting layer, and a blue light emitting layer corresponding to red, green, and blue sub-pixels.

Next, an electron transporting layer is formed on the substrate 510 on which the light emitting layer is formed.

At this time, the electron transporting layer is formed in common to the red, green and blue sub-pixels on the upper side of the light emitting layer, and plays a role of facilitating transport of electrons.

At this time, an electron injection layer may be further formed on the electron transport layer to smoothly inject electrons.

Then, a second electrode 528 made of an eighth conductive film is formed on the substrate 510 having the electron transporting layer formed thereon by sputtering.

At this time, the eighth conductive film is deposited to the lower portion of the barrier rib 535, and a contact is made between the auxiliary electrode 525 and the second electrode 528

The organic light emitting diode is sealed with a predetermined thin film sealing layer on the thus fabricated organic light emitting diode.

A polarization film may be provided on the top surface of the thin film sealing layer to reduce reflection of external light of the organic light emitting display device to improve contrast.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

110, 210, 310, 410,
118, 218, 318, 418, 518:
125, 225, 325, 425, 525:
128, 228, 328, 428, 528:
130, 230, 330, 430,
135,235, 335, 435, 535:
126p, 226p, 326p, 426p, 526p: gate pad electrode
127p, 227p, 327p, 427p, and 527p: Data pad electrode

Claims (20)

A thin film transistor in a display region of a substrate;
An organic light emitting diode connected to the thin film transistor; And
And a plurality of pad electrodes formed on the pad region of the substrate and configured to provide a signal to the display region, the pad electrodes including at least a first pad electrode layer, a second pad electrode layer, and a third pad electrode layer,
Wherein the first pad electrode layer is an adhesion promoting layer disposed on a back surface of the second pad electrode layer,
Wherein the second pad electrode layer is made of a metal having a lower resistivity than the first pad electrode layer and the third pad electrode layer,
Wherein the third pad electrode layer is an etch stopper of the second pad electrode layer disposed on the upper surface of the second pad electrode layer. The method according to claim 1,
Wherein the second pad electrode layer comprises Cu, and the first pad electrode layer comprises molybdenum titanium (MoTi), titanium (Ti), and an alloy thereof. 3. The method of claim 2,
Wherein the material of the first pad electrode layer is the same as the material of the third pad electrode layer. 3. The method of claim 2,
Further comprising a protection layer covering the first pad electrode layer, the second pad electrode layer, the side surfaces of the third pad electrode layer and at least a part of the upper surface of the third pad electrode layer. Display device. 3. The method of claim 2,
Wherein the third pad electrode layer is configured to contact both sides of the first pad electrode layer and to seal the second pad electrode layer. The method according to claim 1,
The organic light emitting diode includes a first electrode, an organic compound layer, and a second electrode,
Wherein the second pad electrode layer is made of a material etched into an etchant used for patterning the first electrode,
Wherein the third pad electrode layer is made of a material which is not etched with the etchant used when the first electrode is patterned. The method according to claim 6,
Wherein the first electrode comprises one of Ag, Al, and an alloy containing Ag or Al. 8. The method of claim 7,
Wherein the plurality of pad electrodes do not include the same material as the first electrode. The method according to claim 6,
Wherein the etchant used in patterning the first electrode includes at least one of phosphoric acid, nitric acid, and acetic acid, and does not include potassium fluoroate and hydrogen peroxide. The method according to claim 1,
Wherein at least a portion of the plurality of pad electrodes further comprises a fourth pad electrode layer disposed on a back surface of the first pad electrode layer and contacting the first pad electrode layer. 11. The method of claim 10,
Wherein the adhesion promoting layer, which is the first pad electrode layer, is made of a material configured to increase the adhesive force between the second pad electrode layer and the fourth pad electrode layer. 12. The method of claim 11,
And a gate insulating layer disposed between the fourth pad electrode layer and the first pad electrode layer and configured to cover a part of the upper surface of the fourth pad electrode layer. A substrate including a display region and a pad region;
A pad line and a pad electrode in the pad region; And
And an anode patterned by etching in the display region,
Wherein the pad electrode has a three-layer structure, the uppermost layer and the lowermost layer of the three-layer structure are made of the same material,
Wherein the uppermost layer is made of a material that does not react with the etchant used for patterning the anode and that prevents corrosion of the intermediate layer of the three-layer structure. 14. The method of claim 13,
Wherein the uppermost layer is configured to be in contact with both sides of the lowermost layer to seal the intermediate layer. 15. The method of claim 14,
Wherein the intermediate layer includes Cu, and the uppermost layer includes molybdenum titanium (MoTi), titanium (Ti), or an alloy thereof. 14. The method of claim 13,
Wherein the display region further includes a data line,
Wherein the intermediate layer and the uppermost layer are on the same layer as the data line. 14. The method of claim 13,
Wherein the anode comprises one of Ag, Al, and Ag or an Al alloy. Forming a thin film transistor on a display region of a substrate;
Forming a pad electrode having a three-layer structure on a pad region of the substrate;
Forming a protective film on the thin film transistor and the pad electrode having the three-layer structure;
Forming an open hole for exposing the uppermost layer of the three-layered pad electrode to the outside by selectively removing the protective layer of the pad region; And
And patterning the anode on the protective film over the thin film transistor by etching,
Wherein the uppermost layer exposed through the open hole during the patterning step is not affected by etching. 19. The method of claim 18,
The intermediate layer of the pad electrode having the three-layer structure includes Cu,
The lowermost layer and the uppermost layer of the pad electrode of the three-layer structure include molybdenum titanium (MoTi), titanium (Ti) or an alloy thereof,
Wherein the etchant used in patterning the anode comprises at least one of phosphoric acid, nitric acid, and acetic acid, and does not include potassium fluoroate and hydrogen peroxide. 19. The method of claim 18,
Wherein the uppermost layer is formed to be in contact with both sides of the lowermost layer of the three-layered pad electrode, and is configured to seal the intermediate layer of the three-layered pad electrode.

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