KR20150127162A - 비아-인에이블 패키지-온-패키지 - Google Patents
비아-인에이블 패키지-온-패키지 Download PDFInfo
- Publication number
- KR20150127162A KR20150127162A KR1020157027585A KR20157027585A KR20150127162A KR 20150127162 A KR20150127162 A KR 20150127162A KR 1020157027585 A KR1020157027585 A KR 1020157027585A KR 20157027585 A KR20157027585 A KR 20157027585A KR 20150127162 A KR20150127162 A KR 20150127162A
- Authority
- KR
- South Korea
- Prior art keywords
- package
- die
- substrate
- integrated circuit
- interposer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H10W70/611—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
- H01L25/073—Apertured devices mounted on one or more rods passed through the apertures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H10W70/635—
-
- H10W90/00—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/1701—Structure
- H01L2224/1703—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H10W70/60—
-
- H10W72/07232—
-
- H10W72/07252—
-
- H10W72/07254—
-
- H10W72/227—
-
- H10W72/244—
-
- H10W72/247—
-
- H10W72/248—
-
- H10W72/252—
-
- H10W72/29—
-
- H10W72/884—
-
- H10W72/9226—
-
- H10W72/923—
-
- H10W72/944—
-
- H10W74/15—
-
- H10W90/297—
-
- H10W90/722—
-
- H10W90/724—
-
- H10W90/732—
-
- H10W90/734—
-
- H10W90/754—
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Manufacturing & Machinery (AREA)
- Micromachines (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/791,223 US20140252561A1 (en) | 2013-03-08 | 2013-03-08 | Via-enabled package-on-package |
| US13/791,223 | 2013-03-08 | ||
| PCT/US2014/020868 WO2014138285A1 (en) | 2013-03-08 | 2014-03-05 | Via-enabled package-on-package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20150127162A true KR20150127162A (ko) | 2015-11-16 |
Family
ID=50382674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020157027585A Withdrawn KR20150127162A (ko) | 2013-03-08 | 2014-03-05 | 비아-인에이블 패키지-온-패키지 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20140252561A1 (enExample) |
| EP (1) | EP2965357A1 (enExample) |
| JP (1) | JP2016513872A (enExample) |
| KR (1) | KR20150127162A (enExample) |
| CN (1) | CN105027282A (enExample) |
| WO (1) | WO2014138285A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9070644B2 (en) | 2013-03-15 | 2015-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging mechanisms for dies with different sizes of connectors |
| US9646894B2 (en) * | 2013-03-15 | 2017-05-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging mechanisms for dies with different sizes of connectors |
| KR102245770B1 (ko) * | 2013-10-29 | 2021-04-28 | 삼성전자주식회사 | 반도체 패키지 장치 |
| KR102198858B1 (ko) * | 2014-07-24 | 2021-01-05 | 삼성전자 주식회사 | 인터포저 기판을 갖는 반도체 패키지 적층 구조체 |
| US9859202B2 (en) * | 2015-06-24 | 2018-01-02 | Dyi-chung Hu | Spacer connector |
| CN106672888B (zh) * | 2015-11-11 | 2022-03-11 | 恩智浦美国有限公司 | 封装集成电路管芯的方法和器件 |
| KR102372300B1 (ko) * | 2015-11-26 | 2022-03-08 | 삼성전자주식회사 | 스택 패키지 및 그 제조 방법 |
| US10181456B2 (en) * | 2017-03-16 | 2019-01-15 | Intel Corporation | Multi-package integrated circuit assembly with package on package interconnects |
| US10438930B2 (en) * | 2017-06-30 | 2019-10-08 | Intel Corporation | Package on package thermal transfer systems and methods |
| CN107564900B (zh) * | 2017-08-29 | 2019-09-03 | 中国电子科技集团公司第五十八研究所 | 基于射频信号传输的扇出型封装结构及制造方法 |
| US10636774B2 (en) | 2017-09-06 | 2020-04-28 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming a 3D integrated system-in-package module |
| KR102519571B1 (ko) | 2018-06-11 | 2023-04-10 | 삼성전자주식회사 | 반도체 패키지 |
| KR102899838B1 (ko) * | 2020-09-10 | 2025-12-11 | 삼성전기주식회사 | 전자부품 장치 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100817073B1 (ko) * | 2006-11-03 | 2008-03-26 | 삼성전자주식회사 | 휨방지용 보강부재가 기판에 연결된 반도체 칩 스택 패키지 |
| US8063846B2 (en) * | 2006-12-28 | 2011-11-22 | Sanyo Electric Co., Ltd. | Semiconductor module and mobile apparatus |
| US8421244B2 (en) * | 2007-05-08 | 2013-04-16 | Samsung Electronics Co., Ltd. | Semiconductor package and method of forming the same |
| JP2009141169A (ja) * | 2007-12-07 | 2009-06-25 | Shinko Electric Ind Co Ltd | 半導体装置 |
| US8106520B2 (en) * | 2008-09-11 | 2012-01-31 | Micron Technology, Inc. | Signal delivery in stacked device |
| US9230898B2 (en) * | 2009-08-17 | 2016-01-05 | Stats Chippac Ltd. | Integrated circuit packaging system with package-on-package and method of manufacture thereof |
| US8518752B2 (en) * | 2009-12-02 | 2013-08-27 | Stats Chippac Ltd. | Integrated circuit packaging system with stackable package and method of manufacture thereof |
| US8519537B2 (en) * | 2010-02-26 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D semiconductor package interposer with die cavity |
| KR101695846B1 (ko) * | 2010-03-02 | 2017-01-16 | 삼성전자 주식회사 | 적층형 반도체 패키지 |
| US8541872B2 (en) * | 2010-06-02 | 2013-09-24 | Stats Chippac Ltd. | Integrated circuit package system with package stacking and method of manufacture thereof |
| US8217502B2 (en) * | 2010-06-08 | 2012-07-10 | Stats Chippac Ltd. | Integrated circuit packaging system with multipart conductive pillars and method of manufacture thereof |
| US20120193785A1 (en) * | 2011-02-01 | 2012-08-02 | Megica Corporation | Multichip Packages |
| KR20120091691A (ko) * | 2011-02-09 | 2012-08-20 | 삼성전자주식회사 | 휨 방지용 접합패턴을 갖는 반도체 소자 및 그 제조방법 |
| US8716065B2 (en) * | 2011-09-23 | 2014-05-06 | Stats Chippac Ltd. | Integrated circuit packaging system with encapsulation and method of manufacture thereof |
| JP2013077711A (ja) * | 2011-09-30 | 2013-04-25 | Sony Corp | 半導体装置および半導体装置の製造方法 |
| TWI476888B (zh) * | 2011-10-31 | 2015-03-11 | 欣興電子股份有限公司 | 嵌埋穿孔中介層之封裝基板及其製法 |
| KR101818507B1 (ko) * | 2012-01-11 | 2018-01-15 | 삼성전자 주식회사 | 반도체 패키지 |
| US8809995B2 (en) * | 2012-02-29 | 2014-08-19 | International Business Machines Corporation | Through silicon via noise suppression using buried interface contacts |
| US9478474B2 (en) * | 2012-12-28 | 2016-10-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for forming package-on-packages |
-
2013
- 2013-03-08 US US13/791,223 patent/US20140252561A1/en not_active Abandoned
-
2014
- 2014-03-05 CN CN201480012349.5A patent/CN105027282A/zh active Pending
- 2014-03-05 JP JP2015561619A patent/JP2016513872A/ja active Pending
- 2014-03-05 WO PCT/US2014/020868 patent/WO2014138285A1/en not_active Ceased
- 2014-03-05 KR KR1020157027585A patent/KR20150127162A/ko not_active Withdrawn
- 2014-03-05 EP EP14712934.0A patent/EP2965357A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JP2016513872A (ja) | 2016-05-16 |
| EP2965357A1 (en) | 2016-01-13 |
| WO2014138285A1 (en) | 2014-09-12 |
| US20140252561A1 (en) | 2014-09-11 |
| CN105027282A (zh) | 2015-11-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR20150127162A (ko) | 비아-인에이블 패키지-온-패키지 | |
| US9484327B2 (en) | Package-on-package structure with reduced height | |
| TWI868490B (zh) | 半導體封裝 | |
| US9318467B2 (en) | Multi-die wirebond packages with elongated windows | |
| CN111952274B (zh) | 电子封装件及其制法 | |
| US12469790B2 (en) | Semiconductor package and method of manufacturing the same | |
| US9099475B2 (en) | Techniques for reducing inductance in through-die vias of an electronic assembly | |
| KR20130083478A (ko) | 복수의 수직으로 내장된 다이를 갖는 기판을 가진 멀티 칩 패키지 및 그 형성 프로세스 | |
| TWI882254B (zh) | 電子裝置 | |
| US20120098114A1 (en) | Device with mold cap and method thereof | |
| CN101477979B (zh) | 多芯片封装体 | |
| US20130313727A1 (en) | Multi-stacked bbul package | |
| US20230207471A1 (en) | Composite ic die package including an electro-thermo-mechanical die (etmd) with through substrate vias | |
| Lau | 3D IC integration and 3D IC packaging | |
| US11145627B2 (en) | Semiconductor package and manufacturing method thereof | |
| US9508690B2 (en) | Semiconductor TSV device package for circuit board connection | |
| TWI703700B (zh) | 半導體封裝及其製造方法 | |
| US20260047457A1 (en) | Semiconductor package and method of manufacturing the same | |
| TWM537310U (zh) | 3d多晶片模組封裝結構(一) | |
| Cognetti | The impact of semiconductor packaging technologies on system integration an overview |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| PC1203 | Withdrawal of no request for examination |
St.27 status event code: N-1-6-B10-B12-nap-PC1203 |
|
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid | ||
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |