KR20150073466A - Display having a touch sensor - Google Patents

Abstract

The present invention relates to a display device having a touch sensor, which comprises: a display panel generated by alternating a display period and a touch scan period; a gate driving unit including a shift register which has stages to supply a gate signal in order to display or update a data signal supplied to the display panel; and a touch sensor circuit unit for supplying and scanning a pulse for sensing touch sensors of the display panel, wherein N^th stage of the stages includes a compensation circuit unit for bootstrapping voltage of a Q node of the N^th stage during the touch scan period so as to compensate the voltage dropping caused by the leakage current of the Q node of the N^th stage generated during the touch scan period.

Description

[0001] The present invention relates to a display having a touch sensor,

The present invention relates to a display device having a touch sensor.

In accordance with the trend of lightening and thinning of home appliances and portable information devices, the user input means is being replaced by a touch sensor in a button type switch. Accordingly, recently-introduced display devices have a large number of touch sensors (or touch screens).

In a display device having a touch sensor, there is a method of charging the charge in each touch sensor in the touch sensor circuit section and measuring the charge increase / decrease depending on the presence / absence of touch to determine whether or not the touch is present.

In recent years, a display device having a touch sensor that implements a touch sensor inside a display panel, rather than outside the display panel, has been proposed due to the development of technology. In this way, a method of implementing a touch sensor inside a display panel is defined as an in-cell method.

A display device having an in-cell type touch sensor shares a part of electrodes formed inside the display panel. And a part of the display period for displaying or updating the data signal is allocated to the touch scan period for sensing the presence or absence of the touch. The display interval and the touch scan interval for scanning the touch sensors are repeated for each frame.

Meanwhile, in the conventional gate driver of a display device having a touch sensor, an output to a gate signal is generated in synchronization with a clock signal continuously input. The gate driver of the display device having the touch sensor proposed in the related art detects the output of the gate signal by the Q node voltage drop of the Nth stage which outputs the gate signal first during the display period performed after the touch scan interval Lt; / RTI > Because of this phenomenon, the display panel shows a horizontal line screen failure phenomenon, and improvement of the horizontal line screen is required.

SUMMARY OF THE INVENTION The present invention is directed to a display device having a touch sensor capable of improving and preventing a problem such as a bad screen line on a display panel and improving display quality.

According to an aspect of the present invention, there is provided a display device comprising: a display panel in which a display section and a touch scan section are alternately generated; A gate driver including a shift register composed of stages for supplying a gate signal for displaying or updating a data signal supplied to the display panel; And a touch sensor circuit unit for supplying and scanning a sensing pulse for sensing the touch sensors of the display panel, wherein an Nth stage of the stages supplies a sensing pulse to a Q node of the Nth stage generated during the touch scan interval And a compensation circuit for bootstrapping a voltage of a Q node of an Nth stage during the touch scan interval to compensate for a voltage drop due to a leakage current.

The compensation circuit may stabilize the Q-node of the N-th stage corresponding to the output signal of the (N-1) -th stage, or may compensate by bootstrapping the Q-node of the N-th stage to a compensation voltage.

Th stage, the compensation circuit unit maintains the potential of the Q-th node of the N-th stage when there is an output signal of the (N-1) And a Q-node voltage drop of the N-th stage for outputting a gate signal for a display period that is performed after the touch scan period, Two circuit portions.

The first circuit unit includes a first compensation capacitor having one end connected to the first compensation signal line and the other end connected to the gate electrode of the discharge transistor for discharging the Q node of the Nth stage, A compensating transistor having a gate connected to a terminal of the first compensating capacitor, a first electrode connected to a gate electrode of the discharging transistor, and a second electrode connected to a low potential voltage line.

The first compensation signal line may carry a first compensation voltage corresponding to a level between a gate high voltage and a gate low voltage.

The second circuit may include a second compensation capacitor having one end connected to the second compensation signal line and the other end connected to the Q node of the Nth stage.

Wherein the second compensation signal line carries a second compensation voltage corresponding to a level between a gate low voltage and a variable voltage, the variable voltage is higher than the gate low voltage, and the Nth compensation signal line corresponding to the size and resolution of the display panel Lt; th > stage Q-node.

A first transistor having a gate electrode and a first electrode connected to an output terminal of an (N-2) -th stage and a second electrode connected to a Q node of the N-th stage; A second transistor having a gate electrode connected to an output terminal of the stage and having a first electrode connected to a Q node of the Nth stage and a second electrode connected to a low potential voltage line; A third transistor connected to the Q node of the Nth stage and having a first electrode connected to the low potential voltage line, a gate electrode connected to the (N-1) th clock signal line, A fourth transistor having a first electrode connected to the Q node of the Nth stage and a second electrode connected to the output terminal of the (N-1) th stage, and a gate electrode connected to the Q node of the Nth stage A fifth transistor having a first electrode connected to an Nth clock signal line and a second electrode connected to an output terminal of the Nth stage, a gate electrode connected to the (N-2) th clock signal line, And a sixth transistor having a first electrode connected to the output terminal of the stage and a second electrode connected to the low potential voltage line.

The third transistor may operate such that the Q node of the Nth stage is discharged or the Q node of the Nth stage is bootstrapped by the compensation voltage in response to the operation state of the compensation transistor.

The first and second compensation voltages are generated in the form of pulses, and may be temporarily supplied with reference to the front and back of the touch scan period.

The present invention compensates voltage drop due to the leakage current of the Q node by bootstrapping the voltage of the Q node of the stage during the touch scan period to improve and prevent problems such as horizontal line screen failure and improve the display quality There is provided an advantageous effect of providing a display device having a touch sensor.

1 is a schematic block diagram of a display device having a touch sensor according to an embodiment of the present invention;
2 is a waveform diagram showing a time division driving method of a display interval and a touch scan interval.
3 is a view showing a gate driver formed on a display panel;
4 is a circuit diagram showing a part of a gate driver of a display device having a touch sensor proposed in the related art.
5 is an input / output waveform diagram of the gate driver shown in FIG.
6 is a block diagram of a gate driver of a display device having a touch sensor according to an exemplary embodiment of the present invention.
7 is a circuit configuration diagram of the N-th stage shown in FIG. 6;
8 is an input / output waveform diagram of the gate driver shown in FIG.
FIG. 9 is an input / output waveform diagram of a gate driver showing a variable range for a rising edge of first and second compensation voltages according to a modified embodiment of the present invention; FIG.
10 is an input / output waveform diagram of a gate driver showing a variable range for a polling edge of first and second compensation voltages according to a modified embodiment of the present invention;
11 is a waveform diagram detailing the variable range for the rising edge of the first and second compensation voltages;
Figure 12 is a waveform diagram detailing the variable range for the polling edges of the first and second compensation voltages.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic block diagram of a display device having a touch sensor according to an embodiment of the present invention. FIG. 2 is a waveform diagram illustrating a time division driving method of a display interval and a touch scan interval. FIG. 2 is a view showing a gate driving unit formed in FIG.

1 to 3, a display device having a touch sensor according to an exemplary embodiment of the present invention includes a host system 100, a timing controller 120, a gate driver 130, a data driver 140, A touch sensor circuit unit 160 and a display panel 110 are included.

The host system 100 outputs a timing signal such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE and a main clock MCLK in addition to a data signal DATA supplied from the outside do. The host system 100 executes an application program or the like indicated by the coordinate value of the touch position output from the touch sensor circuit unit 160 in cooperation with the touch sensor circuit unit 160. [

The timing controller 120 generates a timing control signal for controlling the timing of the gate driver 100 using the timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DE, and the main clock MCLK supplied from the host system 100. [ And generates timing control signals for controlling operation timings of the data driver 130 and the data driver 140. Gate start pulse (GSP), gate shift clock (GSC), gate output enable (GOE), and the like are included in the timing control signal of the gate driver 130. The timing control signal of the data driver 140 includes a source sampling clock (SSC), a polarity control signal (POL), a source output enable (SOE) signal, and the like.

The timing controller 120 generates the internal data enable signal iDE based on the data enable signal DE supplied from the host system 100 as shown in FIG. The timing controller 120 then compares the display intervals DSP [n] and DSP [n + 1] and touch scan intervals TS [n] and TS [n + 1] based on the internal data enable signal iDE. And generates a touch synchronous signal Tsync that is time-division-based.

The timing controller 120 may time-divide one frame period into one display period DSP [n] and one touch scan period TS [n], or two display periods DSP [n] and DSP [n + And the touch scan period TS [n], TS [n + 1]. The display periods (DSP [n], DSP [n + 1]) are periods for displaying an image on the display panel 110 and the touch scan period TS [n] .

The gate driver 130 supplies a gate signal (or a scan pulse) through the gate lines G1 to Gn. The gate signal is generated by a pulse swinging between the voltage of the gate high signal (hereinafter referred to as a gate high voltage) and the voltage of the gate low signal (hereinafter referred to as a gate low voltage). The gate driver 130 outputs the gate high voltage during the display periods DSP [n] and DSP [n + 1] and outputs the gate low voltage during the touch scan periods TS [n] and TS [n + 1] do.

The gate driver 130 is implemented as a gate in panel (GIP) method in a non-display area NA of the display panel 110 as shown in FIG. The gate-in-panel method refers to forming the latch (LAT) and the output buffer (OBF) of the gate driver 130 by the same deposition process as the thin film transistor process.

The latch LAT and the output buffer OBF generate a gate signal to be outputted through the gate lines G1 to Gn by using a clock signal or voltage output from a level shifter or the like. When the gate signal is output, the data signal supplied to the display panel 110 is displayed or updated. Hereinafter, the latch (LAT) and the output buffer (OBF) sequentially shift the gate signal for each gate line, and are collectively referred to as a shift register.

3, the gate driver 130 is formed in the non-display area NA located on the left side of the display area AA of the display panel 110 as an example. However, the gate driver 130 may be formed in the right non-display area NA, the left non-display area NA, or the left and right non-display areas NA of the display area AA of the display panel 110 .

The data driver 140 supplies a data signal DATA (or a data voltage) through the data lines D1 to Dm. The data driver 140 latches the digital video data DATA input from the timing controller 120 and converts the digital video data DATA into an analog positive / negative gamma compensation voltage to output the display periods DSP [n] and DSP [n + 1] And outputs it as an analog video data signal (DATA).

The display panel 110 displays an image corresponding to the gate signal supplied through the gate lines G1 to Gn and the data signal DATA supplied through the data lines D1 to Dm. The display panel 110 is composed of a liquid crystal display element or an element having a similar structure or function. The liquid crystal display element includes a liquid crystal layer formed between the transistor substrate and the color filter substrate. The data lines D1 to Dm, the gate lines G1 to Gn, the sensor lines Tx1 to Txn, the pixel electrodes and the common electrodes are formed on the transistor substrate and the color filter substrate, .

The sensor lines Tx1 to Txn formed on the display panel 110 are configured to share touch sensors with other electrodes. That is, the display device according to an embodiment of the present invention is implemented by an in-cell touch method in which a self-capacitance touch sensor is formed in the display panel 110.

The touch sensor circuit unit 160 is electrically connected to the touch sensors formed on the display panel 110 through the sensor lines Tx to Txn. The touch sensor circuit unit 160 charges the touch sensors corresponding to the touch synchronous signal Tsync supplied from the timing control unit 120 and senses an increase or decrease of the voltage depending on the presence or absence of touch to generate touch data do.

The touch sensor circuit unit 160 supplies touch sensing pulses to the touch sensors formed on the display panel 110 during the touch scan periods TS [n] and TS [n + 1]. The touch sensor circuit unit 160 detects the touch sensors formed on the display panel 110 during the touch scan periods TS [n] and TS [n + 1] by N times (N is an integer of 1 or more) The touch scan drive is performed. The touch sensor circuit unit 160 transmits the touch data detected from the touch sensors to the host system 100.

Hereinafter, a conventional display device having a touch sensor and a display device having a touch sensor according to an embodiment of the present invention will be described. The display device having the touch sensor proposed in the related art and the display device having the touch sensor according to the embodiment of the present invention are realized by an incelel touch method.

BACKGROUND ART [0002]

FIG. 4 is a circuit diagram showing a part of a gate driving part of a display device having a touch sensor proposed in the related art, and FIG. 5 is an input / output waveform diagram of the gate driving part shown in FIG.

4 and 5, the gate driver of the conventional display device having a touch sensor includes a latch LAT including first through fourth transistors T1 through T4, And an output buffer (OBF) including the shift registers T5 and T6. The latch (LAT) and the output buffer (OBF) constituting the shift register with reference to the N-th stage will be described as follows.

The first transistor T1 charges the Q-node in response to the output signal of the (N-2) -th stage. The second transistor T2 discharges the Q-node in response to the output signal of the (N + 2) -th stage. The third transistor T3 discharges the Q-node in response to the start signal VST. The fourth transistor T4 holds the Q-node as the output signal of the (N-1) -th stage corresponding to the (N-1) -th clock signal CLK [n-1]. The fifth transistor T5 outputs the N-th clock signal CLK [n] as its gate signal through its output terminal OUT [n] in response to the potential of the Q-node. The sixth transistor T6 outputs a low potential voltage as a gate signal through its output terminal OUT [n] in response to the (N-2) th clock signal CLK [n-2].

As described above, the display device implemented with the in-cell touch method repeats a display section for displaying an image and a touch scan section for scanning touch sensors. A gate driver of a display device having a touch sensor proposed in the past has a structure in which an output is generated in synchronization with a clock signal continuously input.

However, in the conventional gate driver of a display device having a touch sensor, a voltage drop occurs due to a leakage current of a Q-node during a touch scan period TS [n]. The gate of the N-th stage that outputs the gate signal first during the display period DSP [n + 1] performed after the touch scan period TS [n] An output error also occurs in the signal (see GOUT voltage drop occurrence in FIG. 5). As a result of this phenomenon, a horizontal line defect is displayed on the display panel.

[The present invention]

6 is a block diagram of a gate driving unit of a display device having a touch sensor according to an embodiment of the present invention. FIG. 7 is a circuit diagram of the N-th stage shown in FIG. 6, Output waveform of the gate driver shown in Fig.

6, a gate driver of a display device having a touch sensor according to an embodiment of the present invention includes a shift register including a plurality of stages STG [n-2] to STG [n + 2] . The clock signals CLK [n-2], CLK [n-1], CLK [n], and CLK [n + 1] are input to the stages STG [n- The low potential voltage and the compensation signals ST1 and ST2 are supplied.

The N-th stage STG [n] is connected to the N-2 clock signal line CLK [n-2], the N-1th clock signal line CLK [n- 1] th stage STG [n] and the low potential voltage line VGL, and uses the output signal of the (N-1) th stage STG [n-1] as a start signal. The N-th stage STG [n] is connected to the output terminal OUT [n-2] of the (N-2) th stage STG [n- And the output terminal OUT [n + 2] of the (N + 2) -th stage STG [n + 2]. The Nth stage STG [n] outputs the Nth gate signal GOUT [n] through its output terminal OUT [n].

Th stage STG [n + 1] and the (N + 2) th stage STG [n-2] The stage STG [n + 2] has the same configuration as that of the Nth stage STG [n], and a description thereof will be omitted.

The number of stages (STG [n-2] to STG [n + 2]) is the same as the number of stages (eg n-1) So as to use the gate signal output from the output terminal of the flip-flop. For example, the gate signal GOUT [n] output from the output terminal OUT [n] of the Nth stage STG [n] is the start signal of the (N + 1) . For example, the gate signal GOUT [n + 2] output from the output terminal OUT [n + 2] of the (N + 2) As shown in Fig.

Hereinafter, the circuit configuration for the plurality of stages STG [n-2] to STG [n + 2] will be described in detail as an example for the N-th stage STG [n].

As shown in Figs. 7 and 8, the N-th stage STG [n] is implemented with a shift register composed of a latch LAT and an output buffer OBF. The latch LAT includes first to fourth transistors T1 to T4 and compensation circuit portions T7, Cc1, and Cc2. The output buffer OBF includes fifth and sixth transistors T5 and T6.

The latch (LAT) and the output buffer (OBF) constituting the shift register with reference to the N-th stage STG [n] will now be described. Hereinafter, for convenience of explanation, the source electrode and the drain electrode of the transistor will be described as a first electrode and a second electrode. However, the first electrode and the second electrode may be a source electrode and a drain electrode, and may be a drain electrode and a source electrode depending on the connection direction.

In the first transistor T1, a gate electrode and a first electrode are connected to an output terminal OUT [n-2] of the (N-2) th stage, and a second electrode is connected to a Q-node. The first transistor T1 charges the Q-node in response to the output signal of the (N-2) -th stage.

The second transistor T2 has a gate electrode connected to the output terminal OUT [n + 2] of the (N + 2) -th stage, a first electrode connected to the Q- The second electrode is connected. The second transistor T2 discharges the Q-node in response to the output signal of the (N + 2) -th stage.

The third transistor T3 has a gate electrode connected to the first electrode of the compensating transistor T7, a first electrode connected to the Q-node, and a second electrode connected to the low-potential voltage line VGL . The third transistor T3 maintains the potential of the Q-node corresponding to the output signal of the output terminal OUT [n-1] of the (N-1) .

The fourth transistor T4 has the gate electrode connected to the (N-1) th clock signal line CLK [n-1], the first electrode connected to the Q-node, And the second electrode is connected to the output terminal OUT [n-1]. The fourth transistor T4 holds the Q-node as the output signal of the (N-1) -th stage corresponding to the (N-1) -th clock signal CLK [n-1].

The fifth transistor T5 has a gate electrode connected to the Q-node, a first electrode connected to the N-th clock signal line CLK [n], and a fifth electrode connected to the output terminal OUT [n] And the second electrode is connected. The fifth transistor T5 is a pull-up transistor and corresponds to the potential of the Q-node to turn on the N-th clock signal CLK [n] through its output terminal OUT [n] Output.

The sixth transistor T6 has a gate electrode connected to the (N-2) th clock signal line CLK [n-2], a first electrode connected to its output terminal OUT [n] (VGL) is connected to the second electrode. The sixth transistor T6 outputs a low potential voltage as a gate signal through its output terminal OUT [n] in response to the (N-2) th clock signal CLK [n-2].

The compensating circuit portions T7, Cc1 and Cc2 include a compensating transistor T7, a first compensating capacitor Cc1 and a second compensating capacitor Cc2. The first circuit section (1) of the compensation circuit sections T7, Cc1 and Cc2 holds the Q-node of the N-th stage when there is the output signal of the (N-1) (Q-node) of the N-th stage when there is no output signal of the N-th stage. The second circuit part (2) of the compensation circuit part (T7, Cc1, Cc2) compensates the Q-node voltage drop of the N-th stage which outputs the gate signal first during the display period performed after the touch scan period do.

The first compensation capacitor Cc1 has one end connected to the first compensation signal line ST1 and the other end connected to the gate electrode of the third transistor T3 and the first electrode of the compensating transistor T7. The first compensation signal line ST1 is supplied with a first compensation voltage corresponding to a level between the gate high voltage and the gate low voltage. The first compensation voltage is generated in the form of a pulse, and is temporarily supplied with reference to the front and back of the touch scan period.

The compensation transistor T7 has a gate electrode connected to the output terminal OUT [n-1] of the (N-1) th stage and a gate electrode of the third transistor T3 and the first compensation capacitor Cc1 One electrode is connected and the second electrode is connected to the low potential voltage line (VGL).

The second compensation capacitor Cc2 is connected at one end to the second compensation signal line ST2 and at the other end to the Q-node. The second compensation signal line ST2 is supplied with a second compensation voltage corresponding to the level between the gate-low voltage and the variable voltage. The second compensation voltage is generated in the form of a pulse, and temporarily supplied with reference to the front and back of the touch scan period. Here, the variable voltage is a voltage higher than the gate low voltage, which means that it is variable in the range of the voltage level capable of compensating the voltage drop of the Q node corresponding to the size and resolution of the display panel.

The compensation transistor T7 maintains and compensates or stabilizes the potential of the Q-node in response to the output signal of the output terminal OUT [n-1] of the (N-1) -th stage. For example, when the gate high voltage is output from the output terminal OUT [n-1] of the (N-1) th stage (when there is an output signal of the (N-1) th stage), the compensation transistor T7 is turned on. When the compensation transistor T7 is turned on, the first compensation voltage supplied through the first compensation signal line ST1 is discharged through the low potential voltage line VGL, and the third transistor T3 is turned off. When the third transistor T3 is turned off, the second compensation voltage supplied through the second compensation signal line ST2 is bootstrapped by the second compensation capacitor Cc2. And the voltage of the Q-node is compensated by the bootstrap of the compensation capacitor Cc2.

Conversely, when the gate-low voltage is outputted from the output terminal OUT [n-1] of the (N-1) th stage (when there is no output signal of the (N-1) th stage), the compensation transistor T7 is turned off. In this case, the third transistor T3 is turned on by the first compensation voltage supplied through the first compensation signal line ST1. When the third transistor T3 is turned on, the second compensation voltage supplied through the second compensation signal line ST2 is discharged through the low potential voltage line VGL, so that the Q-node is stabilized.

Referring to the above description, the first compensation voltage supplied through the first compensation signal line ST1 is used to maintain and stabilize the Q-node at a low potential voltage. Since the second compensation voltage supplied through the second compensation signal line ST2 is a voltage drop due to the leakage current of the Q-node during the touch scan period, It is used to boost the Q-node to its normal charge voltage.

As can be seen from the above description, the gate driver of the display device having the touch sensor according to the embodiment of the present invention performs bootstrap during the touch scan period TS [n] The voltage drop due to the leakage current of the node Q [n] does not occur (see the portion where no Q node voltage drop occurs in Fig. 8). Therefore, the display period DSP [ (see the portion where the GOUT voltage drop does not occur in FIG. 8). As a result, when the display panel has a bad horizontal line screen Can be improved and prevented, so that the display quality can be improved.

Hereinafter, a modified embodiment of the present invention will be described.

FIG. 9 is an input / output waveform diagram of a gate driver showing a variable range for a rising edge of first and second compensation voltages according to a modified embodiment of the present invention, and FIG. And FIG. 11 is a waveform diagram showing in detail a variable range for the rising edge of the first and second compensation voltages, and FIG. 12 is a waveform diagram showing in detail the variable range for the falling edge of the first and second compensation voltages. 1 < / RTI > and the second compensation voltage; FIG.

9 and 10, according to a modified embodiment of the present invention, the first and second compensation voltages supplied through the first and second compensation signal lines ST1 and ST2 are a rising edge and a falling edge, respectively, May be varied.

(N-1) -th and (N-2) -th clock signals CLK [n], CLK [n-1], and CLK [n-2] Quot; H "). The Nth and (N-1) th and (N-2) th clock signals CLK [n], CLK [n-1] and CLK [n-2] have overlapping pulse widths of 2H.

9 and 11, the rising edge of the first compensation voltage is the rising edge of the N-th clock signal CLK [n] from the falling edge of the (N-2) -th clock signal CLK [n-2] The rising edge or the Nth touch scan interval TS [n] may be varied until 3H before the end. That is, the rising edge of the first compensation voltage may be started in synchronization with the polling edge of the (N-2) th clock signal CLK [n-2]. However, the rising edge of the N-th clock signal CLK [n] or the rising edge of the N-th touch scan interval TS [n] should be before 3H before the end of the N-th touch scan interval TS [n]. This is because the first compensation voltage is related to the potential holding and stabilization time of the Q node.

The rising edge of the second compensation voltage is a rising edge of the N-th clock signal CLK [n] from 1H before the start of the rising edge of the first compensation voltage or after 1H to the start of the Nth touch scan interval TS [n] The rising edge or the touch scan interval may be varied until 2H. That is, the second compensation voltage may start the rising edge after 1H after the rising edge of the first compensation voltage starts. However, the rising edge of the N-th clock signal CLK [n] or the rising edge of the N-th touch scan interval TS [n] should be before 2H. This is because the second compensation voltage relates to the bootstrap time for preventing the voltage drop of the Q node.

As shown in FIG. 12, the polling edges of the first and second compensation voltages are generated in the Q-node [n] of the Nth stage generated after the Nth touch scan interval TS [n] Charge voltage and the gate signal OUT [n] of the N-th stage.

10 and 12, the polling edge of the first and second compensation voltages is applied to the gate signal OUT [n] of the Nth stage generated after the Nth touch scan period TS [n] Which is a compensation voltage for preventing an output abnormality. Therefore, the first and second compensation voltages may be kept the same until the gate signal OUT [n] of the N-th stage is output and then terminated at 1/3 to 1/2 time point. The variable range of the first and second compensation voltages is 1H level.

As the polling edge of the first and second compensation voltages becomes longer, the charge state of the Q node is stabilized and the compensation degree of the voltage drop is improved. However, if the polling edge of the first and second compensation voltages overlaps with the (N + 1) -th clock signal CLK [n + 1], a problem may occur in maintaining the discharge time of the Q node. Therefore, it is preferable that the polling edges of the first and second compensation voltages are synchronized with or ahead of the rising edge of the (N + 1) -th clock signal CLK [n + 1]. On the other hand, the rising edges of the first and second compensation voltages may be varied within different ranges, but the falling edges are preferably varied within the same range.

The present invention compensates the voltage drop due to the leakage current of the Q node by bootstrapping the voltage of the Q node of the stage during the touch scan period to improve and prevent problems such as horizontal line screen failure and improve the display quality There is provided an advantageous effect of providing a display device having a touch sensor which can be used as a display device.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

100: host system 120: timing controller
130: Gate driver 140: Data driver
160: touch sensor circuit part 110: display panel
STG [n-2] to STG [n + 2]: a plurality of stages
LAT: Latch OBF: Output Buffer
T1 to T4: First to fourth transistors
T5, T6: fifth and sixth transistors
T7: Compensation transistor Cc1: First compensation capacitor
Cc2: second compensation capacitor

Claims (10)

A display panel in which a display section and a touch scan section are alternately generated;
A gate driver including a shift register composed of stages for supplying a gate signal for displaying or updating a data signal supplied to the display panel; And
And a touch sensor circuit unit for supplying and scanning a sensing pulse for sensing touch sensors of the display panel,
The Nth stage of the stages
And a compensation circuit for bootstrapping a voltage of a Q node of an Nth stage during the touch scan interval to compensate for a voltage drop due to a leakage current of a Q node of the Nth stage generated during the touch scan interval A display device having a touch sensor. The method according to claim 1,
The compensation circuit section
Stage stage, and stabilizes the Q-node of the N-th stage in response to the output signal of the (N-1) -th stage or compensates by bootstrapping the Q-node of the N-th stage into a compensation voltage. . The method according to claim 1,
The compensation circuit section
Th stage in the absence of the output signal of the (N-1) < th > stage, the potential of the Q-node of the (N-1) A first circuit part for stabilizing the first circuit part,
And a second circuit unit for bootstrapping and compensating the Q-node voltage drop of the N-th stage that outputs the gate signal first during a display period performed after the touch scan period to a compensation voltage, . The method of claim 3,
The first circuit part
A first compensation capacitor having one end connected to the first compensation signal line and the other end connected to the gate electrode of the discharge transistor for discharging the Q node of the Nth stage,
A compensating transistor having a gate electrode connected to the output terminal of the (N-1) th stage, a first electrode connected to the other end of the first compensating capacitor and a gate electrode of the discharging transistor, and a second electrode connected to the low potential voltage line Wherein the display device includes a touch sensor. 5. The method of claim 4,
The first compensation signal line
And a first compensation voltage corresponding to a level between the gate high voltage and the gate low voltage is transferred. 5. The method of claim 4,
The second circuit part
And a second compensation capacitor having one end connected to the second compensation signal line and the other end connected to the Q node of the Nth stage. The method according to claim 6,
The second compensation signal line carries a second compensation voltage corresponding to a level between a gate-low voltage and a variable voltage,
Wherein the variable voltage is higher than the gate low voltage and varies in a range of a voltage level compensating a voltage drop of the Q node of the Nth stage corresponding to a size and a resolution of the display panel. Device. 5. The method of claim 4,
The Nth stage of the stages
A first transistor having a gate electrode and a first electrode connected to an output terminal of the (N-2) -th stage, and a second electrode connected to a Q node of the N-th stage;
A second transistor having a gate electrode connected to the output terminal of the (N + 2) th stage, a first electrode connected to the Q node of the Nth stage and a second electrode connected to the low potential voltage line,
A third transistor having a gate electrode connected to a first electrode of the compensating transistor, a first electrode connected to a Q node of the Nth stage and a second electrode connected to the low potential voltage line,
A fourth transistor having a gate electrode connected to an (N-1) th clock signal line, a first electrode connected to a Q node of the Nth stage, and a second electrode connected to an output terminal of the (N-1)
A fifth transistor having a gate electrode connected to the Q node of the Nth stage, a first electrode connected to an Nth clock signal line, and a second electrode connected to an output terminal of the Nth stage;
And a sixth transistor having a gate electrode connected to the (N-2) -th clock signal line, a first transistor connected to the output terminal of the N-th stage, and a second transistor connected to the low potential voltage line Display device. 9. The method of claim 8,
The third transistor
And the compensating transistor is operated so that the Q node of the Nth stage is discharged or the Q node of the Nth stage is compensated by bootstrapping the compensating voltage to the compensating voltage in accordance with the operating state of the compensating transistor. . The method according to claim 6,
The first and second compensation voltages
Wherein the touch sensor is generated in a pulse shape and is temporarily supplied with reference to the front and back of the touch scan interval.

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