KR20150070497A - Organic light emitting display device and method for driving thereof - Google Patents

Abstract

The present invention relates to an organic light emitting display device capable of correcting the threshold voltage of a switching transistor included in a pixel, and a method for driving the same. An organic light emitting display device according to the present invention includes: a display panel which has multiple pixels which include an organic light emitting device, a driving transistor of controlling a current flowing along the driving light emitting device, a first switching transistor of supplying a data voltage to a first node as the gate electrode of the driving transistor, and a second switching transistor of supplying a voltage supplied to a reference line to a second node between the organic light emitting device and the driving transistor; and a panel driving part which operates the pixel with a sensing mode or a display mode. In the sensing mode, the panel driving part fixes the voltage level of a first gate high voltage supplied to the gate electrode of the second switching transistor, changes the voltage level of a second gate high voltage supplied to the gate electrode of the first switching transistor by frame unit, and senses the threshold voltage of the first switching transistor included in a corresponding pixel through the reference line of each pixel.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an organic light emitting display and a driving method thereof.

2. Description of the Related Art In recent years, the importance of flat panel display devices has been increasing with the development of multimedia. In response to this, flat panel display devices such as liquid crystal display devices, plasma display devices, and organic light emitting display devices have been commercialized. Among such flat panel display devices, organic light emitting display devices have attracted attention as a next generation flat panel display device because they have a high response speed, low power consumption, and self light emission, so that there is no problem in viewing angle.

1 is a circuit diagram for explaining a pixel structure of a general organic light emitting display device.

Referring to FIG. 1, a pixel P of a general organic light emitting display includes a switching transistor Tsw, a driving transistor Tdr, a capacitor Cst, and an organic light emitting diode (OLED).

The switching transistor Tsw is switched according to the scan pulse SP supplied to the scan line SL and supplies the data voltage Vdata supplied to the data line DL to the drive transistor Tdr. The driving transistor Tdr is switched in accordance with the data voltage Vdata supplied from the switching transistor Tsw and supplies the data current Ioled flowing from the driving power supply line EVdd supplied from the driving power supply line to the organic light emitting diode OLED . The capacitor Cst is connected between the gate terminal and the source terminal of the driving transistor Tdr to store a voltage corresponding to the data voltage Vdata supplied to the gate terminal of the driving transistor Tdr, (Tdr). The organic light emitting diode OLED is electrically connected between the source terminal of the driving transistor Tdr and the cathode line EVss and emits light by the data current Ioled supplied from the driving transistor Tdr. Each pixel P of the general organic light emitting display device controls the magnitude of the data current Ioled flowing through the organic light emitting diode OLED by using the switching of the driving transistor Tdr according to the data voltage Vdata, And a predetermined image is displayed by causing the element OLED to emit light.

In such a general organic light emitting display device, the threshold voltage Vth / mobility characteristic of the driving transistor Tdr varies depending on the position of the organic light emitting display panel depending on the non-uniformity of the manufacturing process of the thin film transistor . Accordingly, in a general organic light emitting display device, even if the same data voltage (Vdata) is applied to the driving transistor Tdr of each pixel P, a uniform image quality can not be realized due to a variation in current flowing through the organic light emitting diode OLED There is a problem.

In order to solve such a problem, an organic electroluminescent display device of Korean Patent Laid-Open Publication No. 10-2012-0076215 (hereinafter referred to as "prior art document") adds a sensor transistor to each pixel, Discloses an external compensation technique for compensating a threshold voltage of a driving transistor by sensing a threshold voltage of a driving transistor through a reference line connected to a sensor transistor using switching of the driving transistor.

However, in the organic light emitting display device of the prior art document, the threshold voltage of the driving transistor Tdr can be compensated by the external compensation technique. However, due to the voltage stress due to the driving at a high temperature for a long time, Vth) / mobility characteristics are changed, the luminance is lowered and the lifetime is reduced. That is, the switching transistor included in the pixel of the prior art document serves to supply the data voltage to the gate electrode of the driving transistor. When the threshold voltage of the switching transistor is changed, The gate-source voltage of the driving transistor is changed, so that the desired data voltage can not be supplied to the gate electrode of the driving transistor.

Therefore, it is necessary to measure and compensate the threshold voltage (Vth) / mobility characteristic of the switching transistor included in each pixel.

It is an object of the present invention to provide an organic light emitting diode (OLED) display device capable of compensating a threshold voltage of a switching transistor included in a pixel and a driving method thereof.

Another object of the present invention is to provide an organic light emitting display device and a method of driving the same that can simultaneously compensate a threshold voltage of a driving transistor and a switching transistor included in a pixel.

Other features and advantages of the invention will be set forth in the description which follows, or may be obvious to those skilled in the art from the description and the claims.

According to an aspect of the present invention, there is provided an organic light emitting diode display comprising: an organic light emitting diode; a driving transistor for controlling a current flowing through the driving light emitting diode; a first transistor for supplying a data voltage to a first node, A display panel having a first switching transistor and a second switching transistor for supplying a voltage supplied to a reference line to a second node between the organic light emitting element and the driving transistor; And a panel driving unit for driving the plurality of pixels in a sensing mode or a display mode, wherein in the sensing mode, the panel driving unit sets the voltage level of the first gate high voltage supplied to the gate electrode of the second switching transistor to a fixed A threshold voltage of the first switching transistor included in the corresponding pixel is sensed through the reference line of each pixel while varying a voltage level of a second gate high voltage supplied to the gate electrode of the first switching transistor in units of a frame, .

And the panel driving unit steps the voltage level of the second gate high voltage stepwise by the set voltage level for each frame unit.

The panel driver senses the voltage of the reference line for each frame unit to generate sensing data of each frame and calculates a threshold voltage of the first switching transistor included in each pixel based on sensing data of each frame .

In the sensing mode, the panel driver operates the driving transistor in the saturation driving mode through the switching of the first and second switching transistors, and drives the driving transistor in the sensing transistor through the reference line of each pixel. And stores the sensed threshold voltage in the memory unit.

According to an aspect of the present invention, there is provided a method of driving an organic light emitting diode display, the method including driving an organic light emitting diode, a driving transistor for controlling a current flowing through the driving light emitting diode, And a second switching transistor for supplying a voltage supplied to the reference line to a second node between the organic light emitting element and the driving transistor, A method comprising: (A) driving each of the plurality of pixels in a sensing mode; And (B) driving each of the plurality of pixels in a display mode, wherein the step (A) fixes a voltage level of a first gate high voltage supplied to the gate electrode of the second switching transistor, Sensing the threshold voltage of the first switching transistor included in the pixel through the reference line of each pixel while varying the voltage level of the second gate high voltage supplied to the gate electrode of the first switching transistor in frame units .

In the step (A), the voltage level of the second gate high voltage may be increased stepwise for each frame unit by a set voltage level.

The step (A) comprises: (A1) sensing voltage of the reference line per frame unit to generate sensing data of each frame; And a step (A2) of calculating a threshold voltage of the first switching transistor included in each pixel based on sensing data of each frame.

Wherein the driving transistor is operated in a saturation driving mode through the switching of the first and second switching transistors and the threshold voltage of the driving transistor included in the corresponding pixel through the reference line of each pixel, And storing the sensed data in the memory unit.

According to the solution of the above-mentioned problems, the present invention has the following effects.

First, by varying the gate high voltage of the scan pulse for switching the switching transistor, which serves to transfer the data voltage to the driving transistor, a change in the characteristics of the switching transistor can be sensed by using the voltage transfer rate change of the switching transistor.

Second, by optimizing the gate high voltage of the scan pulse based on the change in the characteristics of the switching transistor sensed by the sensing mode, the voltage transfer rate is prevented from being lowered according to the threshold voltage change of the switching transistor, It is possible to secure reliability and lifetime in accordance with driving.

Third, the characteristic changes of the driving transistor and the switching transistor included in each pixel are sensed, and the data correction and the gate high voltage of the scan pulse are optimized based on this, so that the characteristics of the driving transistor and the switching transistor can be simultaneously compensated.

1 is a circuit diagram for explaining a pixel structure of a general organic light emitting display device.
2 is a view for explaining an organic light emitting display according to an embodiment of the present invention.
3 is a view schematically showing the structure of each pixel shown in FIG.
FIG. 4 is a block diagram for explaining a column driver shown in FIG. 2. FIG.
5 is a view for explaining a pixel operation in the first sensing mode in the organic light emitting display according to the embodiment of the present invention.
6 is a driving waveform diagram of the first sensing mode in the OLED display according to the embodiment of the present invention.
7 is a diagram for explaining pixel operation in a second sensing mode in an organic light emitting display according to an embodiment of the present invention.
8 is a driving waveform diagram of the second sensing mode in the OLED display according to the embodiment of the present invention.
FIG. 9 is a simulation waveform diagram in which a sensing voltage according to a variation of the second gate high voltage is measured in the present invention. FIG.
10 is a driving waveform diagram in the display mode in the organic light emitting diode display according to the embodiment of the present invention.

The meaning of the terms described herein should be understood as follows.

The word " first, "" second," and the like, used to distinguish one element from another, are to be understood to include plural representations unless the context clearly dictates otherwise. The scope of the right should not be limited by these terms.

It should be understood that the terms "comprises" or "having" does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Hereinafter, preferred embodiments of the organic light emitting diode display and the driving method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a view for explaining an organic light emitting display according to an embodiment of the present invention, and FIG. 3 is a view schematically showing the structure of each pixel shown in FIG.

2 and 3, the organic light emitting diode display according to the embodiment of the present invention includes a display panel 100 and a panel driver 200.

The display panel 100 includes first to mth scan control lines SL1 to SLm, first to mth sensing control lines SSL1 to SSLm, first to nth scan control lines SL1 to SLm, (n is a natural number greater than m) data lines DL1 to DLn, first to nth reference lines RL1 to RLn, first to nth driving power lines PL1 to PLn, a cathode electrode And includes a plurality of pixels (P).

Each of the first to mth scan control lines SL1 to SLm is formed in parallel to the display panel 100 so as to be spaced apart from each other along the first direction, i.e., the horizontal direction.

Each of the first through m-th sensing control lines SSL1 through SSLm is formed at regular intervals so as to be parallel to each of the scan control lines SL1 through SLm.

The first to the n-th data lines DL1 to DLn are connected to the scan control lines SL1 to SLm and the sensing control lines SSL1 to SSLm in the second direction of the display panel 100, And are formed so as to be spaced apart from each other at regular intervals along the longitudinal direction.

Each of the first to nth reference lines RL1 to RLn is formed at regular intervals so as to be parallel to the data lines DL1 to DLn.

Each of the first to nth driving power supply lines PL1 to PLn is formed at regular intervals to be parallel to the data lines DL1 to DLn. Here, each of the first to nth driving power supply lines PL1 to PLn may be formed at regular intervals so as to be parallel to each of the scan control lines SL1 to SLm. Each of the first to nth driving power supply lines PL1 to PLn may be commonly connected to a driving power supply common line CPL formed on the upper side and / or the lower side of the display panel 100. [

The cathode electrode may be formed on the entire surface of the display panel 100 or may be formed at regular intervals to be parallel to the data lines DL1 to DLn or the scan control lines SL1 to SLm have.

Each of the plurality of pixels P is formed for each pixel region defined by each of the first to m-th scan control lines SL1 to SLm and the first to the n-th data lines DL1 to DLn, do. Here, each of the plurality of pixels P may be any one of a red pixel, a green pixel, a blue pixel, and a white pixel. One unit pixel for displaying one image may include an adjacent red pixel, a green pixel, a blue pixel, and a white pixel, or may include a red pixel, a green pixel, and a blue pixel.

Each of the plurality of pixels P may include a first switching transistor Tsw1, a second switching transistor Tsw2, a driving transistor Tdr, a capacitor Cst, and an organic light emitting diode OLED. Here, the transistors Tsw1, Tsw2, and Tdr may be an a-Si TFT, a poly-Si TFT, an oxide TFT, an organic TFT, or the like as the thin film transistor TFT.

The first switching transistor Tsw1 is switched by the first scan pulse SP1 and outputs a data voltage Vdata supplied to the data line DL. The first switching transistor Tsw1 includes a gate electrode connected to an adjacent scan control line SCL, a source electrode connected to an adjacent data line DL, and a first node lt; RTI ID = 0.0 > n1. < / RTI >

The second switching transistor Tsw2 is switched by the second scan pulse SP2 to apply a voltage Vref or Vpre supplied to the reference line RL to the second node n2 which is the source electrode of the driving transistor Tdr, . To this end, the second switching transistor Tsw2 includes a gate electrode connected to an adjacent sensing control line SSCL, a source electrode connected to an adjacent reference line RL, and a drain electrode connected to the second node n2.

The capacitor Cst includes first and second electrodes connected between the gate electrode and the source electrode of the driving transistor Tdr, that is, the first and second nodes n1 and n2. A first electrode of the capacitor Cst is connected to the first node n1 and a second electrode of the capacitor Cst is connected to the second node n2. The capacitor Cst charges the difference voltage of the voltage supplied to the first and second nodes n1 and n2 according to the switching of the first and second switching transistors Tsw1 and Tsw2, So that the driving transistor Tdr is switched according to the applied voltage.

The driving transistor Tdr controls the amount of current flowing from the driving power supply line PL to the organic light emitting diode OLED by being turned on by the voltage of the capacitor Cst. To this end, the driving transistor Tdr includes a gate electrode connected to the first node n1, a source electrode connected to the second node n2, and a drain electrode connected to the driving power supply line PL.

The organic light emitting diode OLED emits a monochromatic light having a luminance corresponding to the data current Ioled by emitting a data current Ioled supplied from the driving transistor Tdr. For this, the OLED includes a first electrode (for example, an anode electrode) connected to the second node n2, an organic layer (not shown) formed on the first electrode, and a second electrode Electrode (e. G., A cathode electrode). At this time, the organic layer may have a structure of a hole transporting layer / an organic light emitting layer / an electron transporting layer or a structure of a hole injecting layer / a hole transporting layer / an organic light emitting layer / an electron transporting layer / an electron injecting layer. Further, the organic layer may further include a functional layer for improving the luminous efficiency and / or lifetime of the organic light emitting layer. The second electrode may be individually connected to each of the plurality of pixels P, or may be commonly connected to the plurality of pixels P, and the low potential power source EVss is supplied to the second electrode.

The panel driver 200 drives the display panel 100 in a first sensing mode, a second sensing mode, or a display mode.

The first sensing mode may be defined as driving the display panel 100 to sense a threshold voltage of a driving transistor Tdr included in each pixel P and the second sensing mode may be defined as driving each pixel P The threshold voltage of the first switching transistor Tswl included in the display panel 100 may be defined as the driving of the display panel 100 for sensing the threshold voltage of the first switching transistor Tswl. Here, the first and second sensing modes may be performed for each pre-shipment inspection process of the OLED display, a set period, a power on / off point of the OLED display, or a user setting.

The display mode is a mode in which the threshold voltage of the driving transistor Tdr of each pixel P sensed by the sensing mode is compensated for and the pixel data DATA of the first switching transistor Tsw1 of each pixel P May be defined as driving the display panel 100 to display an image on each pixel P using a first scan pulse SP1 having a voltage level based on a threshold voltage.

In the first sensing mode, the panel driver 200 fixes the gate voltages of the first and second switching transistors Tsw1 and Tsw2 included in each pixel P, The first sensing data Sdata_Tdr is generated by sensing the source voltage of the driving transistor Tdr through the reference line RL while operating in a source follow mode and generating first sensing data Sdata_Tdr based on the first sensing data Sdata_Tdr, And calculates a threshold voltage for the driving transistor Tdr of each pixel P and stores it in a memory (not shown). In the first sensing mode, the panel driver 200 calculates a compensation value corresponding to the threshold voltage of the driving transistor Tdr of each pixel P stored in the memory, (Or previous) compensation value for the driving transistor Tdr of each pixel P stored in the storage unit 212 and then outputs the calculated compensation deviation value to the initial (or previous) compensation value And generates and stores compensation data of each pixel P in the memory unit 212. [

In the second sensing mode, the panel driver 200 fixes the gate voltage of the second switching transistor Tsw2 included in each pixel P, and controls the gate voltage of the first switching transistor Tsw1 The source voltage of the driving transistor Tdr is sensed through the reference line RL while the first switching transistor Tsw1 is operated in a source follow mode by varying the gate voltage stepwise, 2 based on the second sensing data Sdata_Tsw1 of each frame and the threshold voltage of the driving transistor Tdr of each pixel P stored in the memory unit 212 The threshold voltage of the first switching transistor Tsw1 of each pixel P is calculated and stored in a memory (not shown).

In the display mode, the panel driving unit 200 corrects the input data of each pixel P based on the compensation data of each pixel P stored in the memory unit 212, A first scan pulse SP1 having a voltage level set according to the threshold voltage of the first switching transistor Tsw1 stored in the memory unit 212 so as to supply the data voltage to the corresponding pixel P, And supplies it to the scan control line SL. The panel driver 200 may supply a second scan pulse SP2 having a reference voltage level to the sensing control line SSL simultaneously with the first scan pulse SP1.

The panel driver 200 includes a timing controller 210, a voltage supplier 220, a row driver 230, and a column driver 240.

The timing controller 210 may include a first and a second transistors for sensing the threshold voltage (or mobility) of the driving transistor Tdr and the first switching transistor Tsw1 included in each pixel P, And operates the row driving unit 230 and the column driving unit 240 according to any one of the sensing modes of the first sensing mode and the second sensing mode. The timing controller 210 operates the row driving unit 230 and the column driving unit 240 according to a display mode for displaying an image on the display panel 100.

In the first or second sensing mode, the timing controller 210 operates the corresponding transistors Tdr and Tswl in a source follow mode to sense the threshold voltages of the transistors Tdr and Tswl, (DCS, RCS1, RCS2) and scan pulse level data (L1 / L2 / L3). For example, in the first sensing mode, the timing controller 210 generates sensing pixel data (DATA) for sensing a threshold voltage of a driving transistor Tdr included in each pixel P of the display panel 100, And the first scan pulse level data L1 for setting the voltage level of the first scan pulse SP1 to a reference high voltage level. In the second sensing mode, the timing controller 210 generates sensing pixel data DATA for sensing a threshold voltage of the first switching transistor Tsw1 included in each pixel P of the display panel 100, And second scan pulse level data for gradually changing the voltage level of the first scan pulse SP1 within a range lower than the reference high voltage level in units of a frame, wherein the control signal DCS, RCS1, RCS2, (L2).

In the display mode, the timing controller 210 outputs image data (Idata) of each pixel P input from an external drive system (or a graphics card) to a corresponding pixel P And supplies the generated pixel data DATA to the column driver 240. The external drive system 240 supplies the pixel data DATA to the column drive unit 240, A data control signal DCS for controlling the row driving unit 230 and the column driving unit 240 based on a timing synchronization signal TSS inputted from the first and the second data driving unit 240, 2 low control signals RCS1 and RCS2.

The timing controller 210 may control the voltage level of the first scan pulse SP1 based on the threshold voltage of the first switching transistor Tsw1 included in each pixel P stored in the memory unit 212, The third scan pulse level data L3 for setting the scan pulse level L3. For example, the timing controller 210 analyzes a threshold voltage of all the first switching transistors Tsw1 stored in the memory unit 212 and calculates a maximum value, a minimum value, an average value, an average value of the upper values, The third scan pulse level data L3 may be generated based on the calculated compensation reference value and may be provided to the voltage supply unit 220 described above.

In the first and second sensing modes and the display mode, the voltage supply unit 220 generates a first gate high voltage VGH having a reference high voltage level and a reference low voltage level VGH using an input power Vin input from the outside, And provides the generated first gate high voltage VGH and the gate low voltage VGL to the row driving unit 230. [

In the first sensing mode, the voltage supplier 220 converts the first scan pulse level data L1 supplied from the timing controller 210 to a second gate high voltage having a reference high voltage level VGH ') to the row driver 230.

In the second sensing mode, the voltage supplier 220 converts the second scan pulse level data (L2) supplied from the timing controller 210 into a digital-to-analog converted voltage level that is lower than a reference high voltage level, Generates a second gate high voltage (VGH ') that varies step by step on a frame-by-frame basis, and provides the second gate high voltage (VGH') to the row driver 230. For example, the voltage supplier 220 may supply the second gate high voltage VGH ', which is stepped up by a set voltage of 0.5 V or 1 V, in accordance with the second scan pulse level data L2, And output it.

In the display mode, the voltage supplier 220 converts the third scan pulse level data L3 supplied from the timing controller 210 into digital-analog signals, And generates a second gate high voltage VGH 'having a voltage level based on the threshold voltage of the second transistor Tsw1 and provides the second gate high voltage VGH' to the row driver 230. The voltage supply unit 220 may include a programmable voltage generator (not shown), and may generate the second gate high voltage VGH 'through the programmable voltage generator.

The row driver 230 drives the first row control signal RCS1 supplied from the timing controller 210 and the gate low voltage VGL supplied from the voltage supplier 220 and the second gate high voltage VGL The first scan pulse SP1 is sequentially supplied to the first to m-th scan control lines SL1 to SLm by using the first scan pulse VGH '. The row driving unit 230 drives the second row control signal RCS2 supplied from the timing controller 210 and the gate low voltage VGL supplied from the voltage supplying unit 220 to the first gate high And generates a second scan pulse SP2 sequentially supplied to the first through m-th sensing control lines SSL1 through SSLm using the voltage VGH. For this, a row driver 230 according to an exemplary embodiment includes a scan line driver 232 and a sensing line driver 234.

The scan line driver 232 is connected to one side and / or the other side of each of the first to mth scan control lines SL1 to SLm. The scan line driver 232 generates a first scan signal that is sequentially shifted based on the first row control signal RCS1 and outputs the gate low voltage VGL and the second gate high voltage VGH ' ) To level shift the first scan signal to a first scan pulse SP1 and sequentially supply the first scan signal to the first to m-th scan control lines SL1 to SLm. For example, the scan line driver 232 may include a first shift register unit (not shown) for generating a first scan signal that is sequentially shifted based on the first row control signal RCS1, Level shifting the first scan signal sequentially supplied from the first shift register unit to the first scan pulse SP1 by using the second gate high voltage VGL and the second gate high voltage VGH ' And a first level shifting unit (not shown) for supplying the scan signals to the m scan control lines SL1 to SLm.

In the first sensing mode, the scan line driver 232 generates a first scan pulse SP1 of the second gate high voltage VGH 'having a reference high voltage level, (SL1 to SLm). In addition, in the second sensing mode, the scan line driver 232 generates a first scan pulse (VGH ') having a voltage level lower than the reference high voltage level and a second gate high voltage VGH' And sequentially supplies the scan control signals SL1 to SLm to the first to mth scan control lines SL1 to SLm. In the display mode, the scan line driver 232 outputs the first gate high voltage VGH 'generated based on the threshold voltage of the first switching transistor Tsw1 included in each pixel P And generates scan pulses SP1 to sequentially supply the scan pulses to the first to m-th scan control lines SL1 to SLm.

The sensing line driver 234 is connected to one and / or the other of the first through m-th sensing control lines SSL1 through SSLm, respectively. The sensing line driver 234 generates a second scan signal that is sequentially shifted based on the second row control signal RCS2 and outputs the gate line voltage VGL and the first gate high voltage VGH, Level shifting the second scan signal to the second scan pulse SP2 and sequentially supplying the second scan signal to the first through m-th sensing control lines SSL1 through SSLm. For example, the sensing line driver 234 includes a second shift register unit (not shown) for generating a second scan signal that is sequentially shifted based on the second row control signal RCS2, Level shifting the second scan signal sequentially supplied from the second shift register unit to the second scan pulse (SP2) by using the first gate high voltage (VGL) and the first gate high voltage (VGH) and a second level shifting unit (not shown) for supplying the sensing signal to the sensing control lines SSL1 to SSLm.

The column driver 240 is connected to the first to the n-th data lines DL1 to DLn and the first to the n-th reference lines RL1 to RLn and controls the column driver 240 according to the mode control of the timing controller 210, A sensing mode, a second sensing mode, or a display mode.

In the first or second sensing mode, the column driver 240 applies a data control signal DCS in response to the data control signal DCS of the first or second sensing mode supplied from the timing controller 210, The first or second sensing data Sdata_Tdr / Sdata_Tsw1 is sensed by sensing the source voltage of the driving transistor Tdr included in each pixel P through the first or second sensing data RL1 to RLn, (Sdata_Tdr / Sdata_Tsw1) to the timing control unit 210. In the display mode, the column driver 240 receives the data voltage Vdata in units of horizontal lines in response to the data control signal DCS of the display mode supplied from the timing controller 210 And supplies the reference voltages Vref to the corresponding reference lines RL1 to RLn while supplying the data lines DL1 to DLn. The column driver 240 includes a data driver 242, a switching unit 244, and a sensing unit 246, as shown in FIG.

The data driver 242 receives the pixel data DATA supplied from the timing controller 210 in response to the data control signal DCS supplied from the timing controller 210 according to the display mode or the sensing mode And supplies them to the first to the n-th data lines DL1 to DLn, respectively.

In response to the data control signal DCS supplied from the timing controller 210 according to the display mode, the switching unit 244 outputs the externally supplied reference voltage Vref to the first to nth reference lines RL1 To RLn, respectively. In response to the data control signal DCS supplied from the timing controller 210 according to the sensing mode, the switching unit 244 outputs the externally supplied precharging voltage Vpre to the first to nth reference Th reference lines RL1 to RLn are supplied to the lines RL1 to RLn to initialize each of the first to nth reference lines RL1 to RLn to a precharging voltage Vpre, (246). The switching unit 244 includes first to nth selectors 244a to 244n connected to the first to nth reference lines RL1 to RLn and the sensing unit 246, And the selectors 244a through 244n may be multiplexers.

The sensing unit 246 is connected to the first to the n-th reference lines RL1 to RLn through the switching unit 244 in the sensing mode and outputs a voltage of each of the first to nth reference lines RL1 to RLn And generates first or second sensing data (Sdata_Tdr / Sdata_Tsw1) corresponding to the sensed voltage and provides the first or second sensing data (Sdata_Tdr / Sdata_Tsw1) to the timing controller 210. To this end, the sensing unit 246 includes first through n-th analog-to-digital converters 246a through 246n connected to the first through nth reference lines RL1 through RLn through the switching unit 244, Lt; / RTI >

FIG. 5 is a view for explaining a pixel operation in a first sensing mode in an organic light emitting display according to an embodiment of the present invention, and FIG. 6 is a diagram illustrating an organic light emitting display according to an embodiment of the present invention, 7 is a drive waveform diagram of the sensing mode.

Referring to FIGS. 2, 5, and 6, in the first sensing mode, each pixel P operates in the first to third periods t1, t2, and t3.

In the first sensing mode, the timing controller 120 generates sensing data (DATA) for sensing a threshold voltage of the driving transistor Tdr of each pixel P and supplies the sensed data DATA to the column driver 240, And a data control signal DCS for controlling the row driving unit 230 and the column driving unit 240 to the first sensing mode based on the input timing synchronization signal TSS. And first and second row control signals RCS1 and RCS2. Also, in the first sensing mode, the timing controller 210 generates first scan pulse level data L1 for setting a reference high voltage level to a gate high voltage of the first scan pulse SP1, 220.

In the first sensing mode, the voltage supplier 220 generates a second gate high voltage VGH 'having a reference high voltage level corresponding to the first scan pulse level data L1 supplied from the timing controller 210, And generates a first gate high voltage VGH having a reference high voltage level and a gate low voltage VGL having a reference low voltage level and provides the same to the row driving unit 230.

In the first sensing mode, the row driving unit 230 receives the first row control signal RCS1 and the second gate high voltage VGH 'of the reference high voltage level supplied from the voltage supply unit 220, Generates a first scan pulse SP1 by using the gate low voltage VGL of the reference low voltage level and supplies the first scan pulse SP1 to the scan control line SL while simultaneously applying the second row control signal RCS2 and the first gate high voltage VGH And the gate low voltage VGL to supply the second scan pulse SP2 to the sensing control line SSL.

In the first sensing mode, the column driver 240 drives the data driver 243 based on the sensing pixel data DATA and the data control signal DCS to generate a sensing data voltage Vdata And supplies the data to the corresponding data lines DL in accordance with the driving of the switching unit 244 and the sensing unit 246 based on the data control signal DCS, The threshold voltage of the driving transistor Tdr included in the pixel P is sequentially sensed.

Hereinafter, a first sensing mode of the OLED display according to an embodiment of the present invention will be described with reference to FIGS. 5 and 6. FIG.

In the first period t1, the first switching transistor Tsw1 is turned on by the first scan pulse SP1 of the second gate high voltage VGH 'having the reference high voltage level to turn on the data line DL, The sensing data voltage Vdata supplied to the first node n1 is supplied to the gate electrode of the driving transistor Tdr and the second scanning pulse of the first gate high voltage VGH having the reference high voltage level The precharge voltage Vpre supplied to the reference line RL is turned on by the second switching transistor Tsw2 and supplied to the second node n2, that is, the source electrode of the driving transistor Tdr . At this time, the sensing data voltage Vdata has a level of the target voltage set for sensing the threshold voltage of the driving transistor Tdr. Accordingly, during the first period t1, the source voltage of the driving transistor Tdr and the reference line RL are initialized to the pre-charging voltage Vpre.

Then, in the second period t2, each of the first and second switching transistors Tsw1 and Tsw2 is driven in a linear driving mode by the first gate high voltage VGH having the reference high voltage level In operation, the reference line RL is switched to the floating state by the switching unit 244 of the column driver 240. Accordingly, the driving transistor Tdr operates in a saturation driving mode by the sensing data voltage Vdata, which is a bias voltage supplied to the gate electrode. As a result, the floating reference line RL receives data The difference voltage (Vdata-Vth) between the voltage (Vdata) and the threshold voltage (Vth) of the driving transistor (Tdr) is charged.

Then, in the third period t3, the second scan pulse SP2 of the gate low voltage VGL having the reference low voltage level in the state where the turn-on state of the first switching transistor Tsw1 is maintained The second switching transistor Tsw2 is turned off and at the same time the reference line RL is connected to the sensing unit 246 by the switching unit 244 of the column driving unit 240. Accordingly, the sensing unit 246 senses the voltage Vsense charged in the reference line RL and generates the first sensing data Sdata_Tdr by analog-digital conversion of the sensed voltage Vsense And provides it to the timing control unit 210.

Accordingly, the timing controller 210 calculates the threshold voltage Vth_Tdr of the driving transistor Tdr based on the data voltage Vdata and the first sensing data Sdata_Tdr provided from the sensing unit 246 , And stores the calculated threshold voltage (Vth_Tdr) of the driving transistor Tdr in the memory unit 212. At this time, the threshold voltage Vth_Tdr of the driving transistor Tdr may be a voltage (Vdata-Vsense) obtained by subtracting the sensing voltage Vsense of the sensing unit 246 from the data voltage Vdata.

FIG. 7 is a view for explaining a pixel operation in a second sensing mode in the organic light emitting display according to the embodiment of the present invention, and FIG. 8 is a diagram illustrating an organic light emitting display according to an embodiment of the present invention, 7 is a drive waveform diagram of the sensing mode.

Referring to FIGS. 2, 7 and 8, in the second sensing mode, each pixel P is divided into a first to an i-th frame (Frame [1] to Frame [i] 3 periods t1, t2, and t3.

In the second sensing mode, the timing controller 120 generates sensing data DATA for sensing a threshold voltage of the first switching transistor Tsw1 of each pixel P, and supplies the sensed data DATA to the column driver 240 for controlling the row driving unit 230 and the column driving unit 240 to the first sensing mode based on the input timing synchronization signal TSS, DCS and first and second row control signals RCS1 and RCS2. In addition, in the second sensing mode, the timing controller 210 generates second scan pulse level data L2 for varying the gate high voltage of the first scan pulse SP1 in frame units, and supplies the second scan pulse level data L2 to the voltage supply unit 220 ).

In the second sensing mode, the voltage supplier 220 supplies a second gate high voltage VGH 'having a voltage level corresponding to the second scan pulse level data L1 supplied from the timing controller 210 And generates a first gate high voltage VGH having a reference high voltage level and a gate low voltage VGL having a reference low voltage level and provides the first gate high voltage VGH and the row driving voltage VGL to the row driving unit 230.

In the second sensing mode, the row driver 230 receives the first row control signal RCS1 and the second gate high voltage VGH 'supplied from the voltage supplier 220 in frame units, Generates the first scan pulse SP1 by using the gate low voltage VGL of the reference low voltage level and supplies the first scan pulse SP1 to the scan control line SL while simultaneously applying the second row control signal RCS2 and the first gate high voltage VGH And the gate low voltage VGL to supply the second scan pulse SP2 to the sensing control line SSL.

In the second sensing mode, the column driver 240 generates a data voltage Vdata according to the driving of the data driver 243 based on the sensing pixel data DATA and the data control signal DCS. And supplies the data to the corresponding data line DL in accordance with the driving of the switching unit 244 and the sensing unit 246 based on the data control signal DCS. And sequentially senses the source voltage of the driving transistor Tdr included in the pixel P.

Hereinafter, the third sensing mode of the OLED display according to the exemplary embodiment of the present invention will be described with reference to FIGS. 7 and 8. FIG.

First, in the first period (t1) of the first frame (Frame [1]) of the second sensing mode, a second gate high voltage (VGH ') having a first voltage level lower than the reference high voltage level The sensing data voltage Vdata supplied to the data line DL by the first switching transistor Tsw1 is turned on by the first scan pulse SP1 to the first node n1, And the second switching transistor Tsw2 is turned on by the second scan pulse SP2 of the first gate high voltage VGH having the reference high voltage level and supplied to the reference line RL The precharging voltage Vpre is supplied to the second node n2, that is, the source electrode of the driving transistor Tdr. At this time, the sensing data voltage Vdata has a level of the target voltage set for sensing the threshold voltage of the driving transistor Tdr. Accordingly, during the first period t1, the source voltage of the driving transistor Tdr and the reference line RL are initialized to the pre-charging voltage Vpre.

Then, in the second period t2, the turn-on state of the second switching transistor Tsw2 is maintained and the gate voltage of the first switching transistor Tswl is maintained at the first voltage level of the first voltage level The driving transistor Tdr is turned on by the sensing data voltage Vdata as it is fixed to the two-gate high voltage VGH '. At the same time, the reference line RL is switched to the floating state by the switching unit 244 of the column driver 240. Accordingly, the first switching transistor Tsw1 is operated in the saturation driving mode by the second gate high voltage VGH 'of the first voltage level supplied to the gate electrode, thereby causing the reference line RL is charged with the differential voltage Vdata-Vth between the data voltage Vdata and the threshold voltage Vth of the driving transistor Tdr.

Then, in the third period T3, the second scan pulse SP2 of the gate low voltage VGL having the reference low voltage level in the state where the turn-on state of the first switching transistor Tsw1 is maintained The second switching transistor Tsw2 is turned off and at the same time the reference line RL is connected to the sensing unit 246 by the switching unit 244 of the column driving unit 240. Accordingly, the sensing unit 246 senses the voltage Vsense charged in the reference line RL and converts the sensed voltage Vsense to analog-to-digital conversion to output the first voltage Vsense of the first frame Frame [1] And provides the second sensing data (Sdata_Tsw2) to the timing controller 210. The timing control unit 210 stores the second sensing data Sdata_Tsw2 of the first frame Frame [1] provided from the sensing unit 246 in the memory unit 212 or the internal register.

(VGH ') having a second voltage level lower than the reference high voltage level but higher than the first voltage level in the second frame (Frame [2]) of the second sensing mode, The first to third sections t1 and t2 of the second frame (Frame [2]) of the second sensing mode described above except that one scanning pulse SP1 is supplied to the gate electrode of the first switching transistor Tsw1, t2, and t3), so that a duplicate description thereof will be omitted.

In the second frame (Frame [2]) of the second sensing mode, the second gate high voltage (VGH ') of the second voltage level supplied to the gate electrode of the first switching transistor (Tsw1) (Vdata-Vth) charged in the floating reference line RL is higher than the voltage (Vdata-Vth) charged in the reference line RL in the second frame (Frame [2]) do. That is, when the gate voltage of the first switching transistor Tsw1 is increased, the transfer rate of the sensing data voltage Vdata_sen transmitted to the gate electrode of the driving transistor Tdr is increased. As a result, the source of the driving transistor Tdr As the voltage increases, the voltage (Vdata-Vth) charged in the reference line RL also increases. In the second frame (Frame [2]) of the second sensing mode, the sensing unit 246 senses the voltage Vsense charged in the reference line RL and outputs the sensed voltage Vsense to the analog- And supplies the second sensing data Sdata_Tsw2 of the second frame Frame [1] to the timing control unit 210. The timing control unit 210 receives the second sensing data Sdata_Tsw2 from the sensing unit 246, And stores the second sensing data (Sdata_Tsw2) of the second frame (Frame [2]) in the memory unit 212 or the internal register.

The second gate high voltage (VGH ') of the first scan pulse (SP1) is changed so as to be gradually increased in each of the third to the i'th frames of the second sensing mode so that the first switching transistor (Tsw1) The second sensing data (Sdata_Tsw2) of each frame is generated by sensing the voltage (Vdata-Vth) charged in the reference line (RL) while operating in the saturated driving mode. The timing controller 210 stores the second sensing data Sdata_Tsw2 of each frame in the memory unit 212 or the internal register.

Meanwhile, the timing controller 210 controls the voltage level of the second gate high voltage (VGH ') to be varied for each frame of the second sensing mode, and controls the current frame received from the sensing unit 246 The second sensing data Sdata_Tsw2 of each pixel P and the second sensing data Sdata_Tsw2 of each pixel P with respect to the previous frame stored in the memory unit 212 or the internal register are compared and analyzed And detects the second gate high voltage VGH 'corresponding to the second sensing data Sdata_Tsw2 having the same value. The timing controller 210 then sets the threshold voltage Vth_Tdr of the driving transistor Tdr of the corresponding pixel P stored in the memory unit 212 at the detected second gate high voltage VGH ' (Vth_Tsw1-Vth_Tdr) is calculated as the threshold voltage (Vth_Tsw1) of the first switching transistor Tsw1, and is stored in the memory unit 212. [

In the second sensing mode, the first switching transistor Tsw1 is operated in the saturation driving mode, and the second gate high voltage VGH 'is changed stepwise to the reference line RL The process of sensing the charged voltage Vdata-Vth is repeated over the first to the i-th frames (Frame [1] to Frame [i]), The threshold voltage Vth_Tsw1 of the first switching transistor Tsw1 is detected based on the voltage level of the second gate high voltage VGH 'to be saturated. Here, FIG. 9 is a simulation waveform chart in which the sensing voltage Vsense is measured according to the variation of the second gate high voltage VGH '. As a result, according to the present invention, the first switching transistor Tsw1 is turned on based on the change of the sensing voltage Vsense due to the voltage transmission rate difference of the first switching transistor Tsw1 according to the variation of the second gate high voltage VGH ' The threshold voltage Vth_Tsw1 is detected.

10 is a driving waveform diagram in the display mode in the organic light emitting diode display according to the embodiment of the present invention.

Referring to FIGS. 2, 4 and 10, in the display mode, each pixel P operates in the addressing period DM_t1 and the light emitting period DM_t2.

In the display mode, the timing controller 120 outputs the image data Idata of the input pixel P to the compensation data of the driving transistor Tdr of each pixel P stored in the memory unit 212, And supplies the generated pixel data DATA to the column driving unit 240. The pixel driving unit 240 generates the pixel data DATA of each pixel P based on the input timing synchronization signal TSS, And generates a data control signal DCS and first and second row control signals RCS1 and RCS2 for controlling the row driving unit 230 and the column driving unit 240 in the display mode, do. In the display mode, the timing controller 210 generates a first scan pulse SP1 based on a threshold voltage of the first switching transistor Tsw1 of each pixel P stored in the memory unit 212, And supplies the generated third scan pulse level data L3 to the voltage supply unit 220. The third scan pulse level data L3 is supplied to the voltage supply unit 220. [

In the display mode, the voltage supplier 220 generates a second gate high voltage VGH 'having a voltage level corresponding to the third scan pulse level data L3 supplied from the timing controller 210 And simultaneously generates a first gate high voltage VGH having a reference high voltage level and a gate low voltage VGL having a reference low voltage level and provides the generated gate low voltage VGL to the row driving unit 230.

In the display mode, the row driving unit 230 drives the gate of the first row control signal RCS1, the second gate high voltage VGH 'supplied from the voltage supply unit 220, And generates a first scan pulse SP1 using the low voltage VGL and supplies the first scan pulse SP1 to the scan control line SL while simultaneously applying the second row control signal RCS2 and the first gate high voltage VGH, Generates a second scan pulse SP2 using the voltage VGL, and supplies the second scan pulse SP2 to the sensing control line SSL.

In the display mode, the column driver 240 converts a data voltage Vdata according to driving of the data driver 243 based on the pixel data DATA and the data control signal DCS, And supplies the reference voltage Vref to the reference line RL in accordance with the driving of the switching unit 244 based on the data control signal DCS.

Hereinafter, a display mode of the OLED display according to an embodiment of the present invention will be described with reference to FIGS. 3 and 10. FIG.

First, in the addressing period DM_t1, the first scan pulse SP1 (VGH ') of the second gate high voltage VGH' having the voltage level set based on the threshold voltage of the first switching transistor Tsw1 of the pixel P The data voltage Vdata supplied to the data line DL is supplied to the gate electrode of the first node n1 or the driving transistor Tdr by the first switching transistor Tsw1, The second switching transistor Tsw2 is turned on by the second scan pulse SP2 of the first gate high voltage VGH having the high voltage level so that the reference voltage Vref supplied to the reference line RL becomes the second And is supplied to the node n2, that is, the source electrode of the driving transistor Tdr. The capacitor Cst connected to the first node n1 and the second node n2 is charged with the difference voltage Vdata-Vref between the data voltage Vdata and the reference voltage Vref. Here, since the first switching transistor Tsw1 is turned on by the second gate high voltage VGH 'reflecting the variation of the threshold voltage of the first switching transistor Tsw1, the data voltage Vdata is applied to the first switching transistor Tsw1 And is transmitted to the gate electrode of the driving transistor Tdr without being affected by a change in the threshold voltage. The data voltage (Vdata) charged in the capacitor (Cst) includes a compensation voltage for compensating a threshold voltage of the corresponding driving transistor (Tdr).

Then, in the light emission period DM_t2, the first and second switching transistors Tsw1 and Tsw2 are turned on by the first and second scan pulses SP1 and SP2 of the gate low voltage VGL having the reference low voltage level, Respectively. Accordingly, the driving transistor Tdr is turned on by the voltage (Vdata-Vref) stored in the capacitor Cst. Accordingly, the data current Ioled, which is determined by the difference voltage (Vdata-Vref) between the data voltage (Vdata) and the reference voltage (Vref) by the turn-on driving transistor (Tdr) The organic light emitting diode OLED emits light in proportion to the data current Ioled flowing from the driving power supply line PL to the second electrode (or the cathode electrode). That is, in the light emission period DM_t2, when the first and second switching transistors Tsw1 and Tsw2 are turned off, a current flows through the driving transistor Tdr, and the organic light emitting diode OLED is turned on in proportion to the current The voltage of the second node n2 is increased while the voltage of the first node n1 is raised by the voltage of the second node n2 by the capacitor Cst, The gate-source voltage Vgs of the driving transistor Tdr is constantly maintained by the voltage so that the organic light emitting diode OLED continues to emit light until the addressing period DM_t1 of the next frame. Here, the current Ioled flowing through the organic light emitting diode OLED is not affected by the threshold voltage change of the corresponding driving transistor Tdr due to the data voltage Vdata including the compensation voltage.

As described above, according to the present invention, the gate high voltage of the first scan pulse SP1 is varied to sense the voltage transfer rate change of the first switching transistor Tsw1 included in each pixel P, The threshold voltage of the first switching transistor Tsw1 included in each pixel P can be sensed regardless of the change.

Further, the present invention optimizes the gate high voltage of the first scan pulse (SP1) based on the threshold voltage of the first switching transistor (Tsw1) sensed by the sensing mode so that the threshold voltage of the first switching transistor It is possible to secure the reliability and lifetime of the organic light emitting diode display according to the high temperature long time driving of the organic light emitting diode display.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of. Therefore, the scope of the present invention is defined by the appended claims, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be interpreted as being included in the scope of the present invention.

100: display panel 210: timing controller
220: power supply unit 230: row driving unit
232: scan line driver 234: sensing line driver
240: row driver 242: data driver
244: Switching unit 246:

Claims (14)

A first switching transistor for supplying a data voltage to a first node which is a gate electrode of the driving transistor, and a second switching transistor for supplying a voltage supplied to a reference line to the organic light emitting element, And a second switching transistor for supplying the second switching transistor to a second node between the driving transistor and the second transistor; And
And a panel driver for driving the plurality of pixels in a sensing mode or a display mode,
In the sensing mode, the panel driver fixes the voltage level of the first gate high voltage supplied to the gate electrode of the second switching transistor, and the voltage of the second gate high voltage supplied to the gate electrode of the first switching transistor And the threshold voltage of the first switching transistor included in the corresponding pixel is sensed through the reference line of each pixel. The method according to claim 1,
Wherein the panel driving unit step-wise increases the voltage level of the second gate high voltage by a set voltage level for each frame unit. 3. The method of claim 2,
The panel driver senses the voltage of the reference line for each frame unit to generate sensing data of each frame and calculates a threshold voltage of the first switching transistor included in each pixel based on sensing data of each frame The organic light emitting display device comprising: The method of claim 3,
In the sensing mode, the panel driver operates the driving transistor in the saturation driving mode through the switching of the first and second switching transistors, and drives the driving transistor in the sensing transistor through the reference line of each pixel. Wherein the threshold voltage of the organic light emitting diode is sensed and stored in the memory unit. 5. The method of claim 4,
Wherein the panel-
The second gate high voltage corresponding to the sensing data having the same value is detected by analyzing the sensing data of each frame on the pixel basis,
And the threshold voltage of the first switching transistor is detected in accordance with the second gate high voltage of each of the pixels and the threshold voltage of the driving transistor of the corresponding pixel stored in the memory unit and is stored in the memory unit. To the organic light emitting display device. 5. The method of claim 4,
Wherein in the display mode, the panel driving unit corrects data to be supplied to each pixel based on a threshold voltage of a driving transistor of each pixel stored in the memory unit. The method according to claim 5 or 6,
Wherein the panel driving unit sets the voltage level of the second gate high voltage based on a threshold voltage of the first switching transistor of each pixel stored in the memory unit in the display mode. A first switching transistor for supplying a data voltage to a first node which is a gate electrode of the driving transistor, and a second switching transistor for supplying a voltage supplied to a reference line to the organic light emitting element, And a second switching transistor for supplying the second switching transistor to a second node between the driving transistor and the driving transistor,
(A) driving each of the plurality of pixels in a sensing mode; And
(B) driving each of the plurality of pixels in a display mode,
Wherein the step (A) comprises: fixing a voltage level of a first gate high voltage supplied to a gate electrode of the second switching transistor; and a voltage level of a second gate high voltage supplied to a gate electrode of the first switching transistor, And sensing the threshold voltage of the first switching transistor included in the corresponding pixel through the reference line of each pixel. 9. The method of claim 8,
Wherein the voltage level of the second gate high voltage increases stepwise for each frame unit by a set voltage level in the step (A). 10. The method of claim 9,
The step (A)
Sensing the voltage of the reference line for each frame unit to generate sensing data of each frame; And
And calculating (A2) a threshold voltage of the first switching transistor included in each pixel based on sensing data of each frame. 11. The method of claim 10,
Wherein the driving transistor is operated in a saturation driving mode through the switching of the first and second switching transistors and the threshold voltage of the driving transistor included in the corresponding pixel through the reference line of each pixel, And storing the sensed data in the memory unit. 12. The method of claim 11,
The step (A2)
Analyzing sensing data of each frame on a pixel-by-pixel basis and detecting the second gate high voltage corresponding to the sensing data having the same value; And
Detecting a threshold voltage of the first switching transistor according to a second gate high voltage of the detected pixel and a threshold voltage of a driving transistor of the corresponding pixel stored in the memory unit and storing the detected threshold voltage in the memory unit And driving the organic light emitting display device. 13. The method of claim 12,
Wherein the step (B) comprises the step of correcting data to be supplied to each pixel based on a threshold voltage of a driving transistor of each pixel stored in the memory unit. The method according to claim 12 or 13,
Wherein the step (B) further comprises the step of setting a voltage level of the second gate high voltage based on a threshold voltage of a first switching transistor of each pixel stored in the memory unit A method of driving a display device.

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