KR20150067888A - Thin film transistor array substrate and method for fabricating the same - Google Patents

Abstract

The present invention relates to a thin film transistor array substrate and a manufacturing method thereof, wherein transmittance can be enhanced without an increase in a data voltage applied to a pixel electrode. The thin film transistor array substrate of the present invention comprises: multiple pixel regions defined by the intersection of gate wiring and data wiring on the substrate; a thin film transistor formed on each of the pixel regions; a first protective layer formed on the substrate to include a drain contact hole which exposes the thin film transistor; a pixel electrode formed on the first protective layer to have a form of a through electrode which accesses the thin film transistor through the drain contact hole; a second protective layer formed on the substrate to cover the pixel electrode; and a first common electrode and a second common electrode formed in a slit on the second protective layer to generate a fringe field with the pixel electrode, wherein the first common electrode is arranged within the pixel region to overlap the pixel electrode, the second common electrode is arranged on the edge of the pixel region to correspond to the separation space between the edge of the pixel electrode and the data wiring, and a first common voltage and a second common voltage, which are different, are applied respectively to the first common electrode and the second common electrode.

Description

TECHNICAL FIELD [0001] The present invention relates to a thin film transistor array substrate and a method of manufacturing the same. BACKGROUND ART [0002]

The present invention relates to a thin film transistor array substrate, and relates to a thin film transistor array substrate capable of improving transmittance and a manufacturing method thereof.

(PDP), Electro Luminescent Display (ELD), Vacuum Fluorescent (VFD), and the like have been developed in recent years in response to the demand for display devices. Display) have been studied, and some of them have already been used as display devices in various devices.

The liquid crystal display device includes a color filter substrate on which a color filter is formed, a thin film transistor array substrate on which thin film transistors are formed, and a liquid crystal layer formed between the color filter substrate and the thin film transistor array substrate. Specifically, in the thin film transistor array substrate, the gate wiring and the data wiring cross each other to define a sub pixel region, and a thin film transistor is formed in each sub pixel region. The color filter formed on the color filter substrate is formed so as to correspond to each sub pixel region, and the color light corresponding to each color filter is realized as the thin film transistor is driven.

At this time, the thin film transistor is driven by the fringe electric field generated between the pixel electrode and the common electrode, which is superimposed with the pixel electrode and the common electrode sandwiching the protective film therebetween. The fringe field is formed by a pixel top structure in which a pixel electrode is formed on a protective film or a Vcom top structure in which a common electrode is formed on a protective film. Generally, the Vcom top structure has a higher transmittance than a pixel top structure.

In general, in the Vcom top structure, the pixel electrode is formed in a tubular electrode shape, and the common electrode is formed in a plurality of slit shapes. However, the fringe electric field generated between the common electrode and the pixel electrode is more strongly formed at the edge of the pixel electrode, that is, at the edge of the pixel region, where the common electrode and the pixel electrode are not overlapped with each other than within the pixel region in which the common electrode and the pixel electrode overlap. Therefore, if the fringe field strength at the edge of the pixel region is increased, the transmittance of the display device including the thin film transistor array substrate can be improved.

SUMMARY OF THE INVENTION The present invention provides a thin film transistor array substrate including first and second common electrodes to which different common voltages are applied to one pixel region and a method of manufacturing the thin film transistor array substrate, There is a purpose.

According to an aspect of the present invention, there is provided a thin film transistor array substrate comprising: a plurality of pixel regions defined on a substrate such that gate lines and data lines cross each other; A thin film transistor formed in each pixel region; A first protective layer formed on the substrate, the first protective layer including a drain contact hole exposing the thin film transistor; A pixel electrode formed on the first protective film and connected to the thin film transistor through the drain contact, A second protective layer formed on the substrate to cover the pixel electrode; And a first common electrode and a second common electrode which are formed on the second protective film in a slit shape and form a fringe electric field with the pixel electrode, Wherein the second common electrode is provided at an edge of the pixel region so as to correspond to the interval between the pixel electrode edge and the data line, and the first common electrode and the second common electrode Voltage and the second common voltage are respectively applied.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor array substrate, including: forming a thin film transistor on a substrate in a plurality of pixel regions defined by intersecting gate and data lines; Forming a first protective film on the substrate to cover the thin film transistor; Forming a drain contact hole exposing the thin film transistor by selectively removing the first protective film; Forming a pixel electrode in the form of a tubular electrode connected to the thin film transistor exposed through the drain contact hole on the first protective film; Forming a second protective layer on the substrate to cover the pixel electrode; And forming a slit-shaped first common electrode and a second common electrode on the second passivation layer to form a fringe electric field with the pixel electrode, wherein the first common electrode is formed to overlap the pixel electrode, And the second common electrode is provided at an edge of the pixel region so as to correspond to the interval between the pixel electrode edge and the data line, 1 common voltage and the second common voltage are respectively applied.

And a potential difference between the second common electrode and the pixel electrode is larger than a potential difference between the first common electrode and the pixel electrode.

The first common voltage is constant for every frame, and the second common voltage swings every frame.

And the second common voltage applied to the second common electrode has a polarity opposite to a second common voltage applied to the second common electrode of the pixel electrodes on both sides adjacent to the data line.

The thin film transistor array substrate of the present invention and the method of fabricating the same of the present invention include first and second common electrodes to which common voltages are applied in one pixel region, thereby improving the transmissivity without increasing the data voltages of the pixel electrodes .

1A is a plan view of a thin film transistor array substrate of the present invention.
1B is a cross-sectional view taken along line I-I 'of FIG. 1A.
2A and 2B are output diagrams of the first common voltage and the second common voltage.
3A to 3C are plan views showing a method of manufacturing a thin film transistor array substrate according to the present invention.
4C to 4C are cross-sectional views illustrating a method of manufacturing the thin film transistor array substrate of the present invention.

Hereinafter, a thin film transistor array substrate of the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

1A is a plan view of a thin film transistor array substrate of the present invention, and FIG. 1B is a cross-sectional view taken along line I-I 'of FIG. 1A.

1A and 1B, a thin film transistor array substrate according to the present invention includes a pixel region defined by crossing a gate wiring 105 and a data wiring 120 on a substrate 100, a thin film transistor (TFT) A first protective film 125a formed to cover the thin film transistor TFT, a pixel electrode 130 formed on the first protective film 125a in the form of a tubular electrode connected to the thin film transistor TFT, And first and second common electrodes 140a and 140b formed on the second protective film 125b and the second protective film 125b to cover the pixel electrode 130 and the fringing field. At this time, different voltages are applied to the first common electrode 140a and the second common electrode 140b.

Specifically, in the thin film transistor array substrate of the present invention, the pixel region is defined by the gate wiring 105 and the data wiring 120 crossing the substrate 100 with the gate insulating film 110 interposed therebetween. Then, a thin film transistor (TFT) is formed in each pixel region. The thin film transistor TFT causes a data signal supplied to the data line 120 to be charged and held in the pixel electrode 130 in response to a scan signal supplied to the gate line 105. To this end, the thin film transistor TFT includes a gate electrode 105a, a gate insulating film 110, a semiconductor layer 115, a source electrode 120a and a drain electrode 120b.

The gate electrode 105a is protruded from the gate wiring 105 or defined as a partial area of the gate wiring 105. [ The gate electrode 105a and the gate wiring 105 may be formed of Al / Cr, Al / Mo, Al / Nd / Cr, Mo / Al (Nd) / Ti, Mo / Al, Mo / Ti / Al (Nd), Cu alloy / Mo, Cu alloy / Al, Cu alloy / Mo alloy, Cu alloy / Al alloy, Al / Mo alloy, , Al alloy / Mo alloy, Mo alloy / Al alloy, Mo / Al alloy, or the like, or a structure in which a layer of Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Layer structure of the same metal material.

The semiconductor layer 115 overlaps the gate electrode 105a with the gate insulating film 110 sandwiched therebetween. The semiconductor layer 115 includes an active layer and an ohmic contact layer which are sequentially stacked, though not shown. The ohmic contact layer serves to reduce the electrical contact resistance between the source and drain electrodes 120a and 120b and the active layer. The ohmic contact layer is selectively removed to expose the active layer, and the region where the ohmic contact layer is removed Channel region.

The source electrode 120a is connected to the data line 120 and receives a data signal of the data line 120. [ The drain electrode 120b is formed so as to face the source electrode 120a with the channel region of the semiconductor layer 115 therebetween and supplies the data signal from the data line 120 to the pixel electrode 130. [

The first protective film 125a is formed to cover the thin film transistor (TFT) as described above. The first passivation layer 125a may be formed of an organic insulating material. Although not shown, a protective film may be further formed between the first protective film 125a and the gate insulating film 110 with an inorganic insulating material.

A pixel electrode 130 in the form of a tubular electrode is formed on the first protective film 125a. The pixel electrode 130 is connected to the drain electrode 120b of the thin film transistor TFT exposed through the drain contact hole formed in the first protective film 125a. The pixel electrode 130 may be formed of a conductive material such as tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide Is formed of the same transparent conductive material.

The second protective film 125b is formed to cover the pixel electrode 130. [ The second protective film 125b is preferably formed of an inorganic insulating material. The first and second common electrodes 140a and 150a in the form of slits are formed on the second protective film 125b. The first and second common electrodes 140a and 150a are also formed of a transparent conductive material like the pixel electrode 130. The first and second common electrodes 140a and 150a are connected to first and second common lines 140, and 150, respectively. The first common electrode 140a is provided in the pixel region and overlaps the pixel electrode 130 with the second protective film 125b interposed therebetween. The second common electrode 150a is provided at the edge of the pixel region so as to correspond to the interval between the edge of the pixel electrode 130 and the data line 120.

The fringe electric field generated between the common electrodes 140a and 150a and the pixel electrode 130 is more likely to be transmitted to the common electrodes 140a and 150a than within the pixel region in which the common electrodes 140a and 150a and the pixel electrode 130 overlap, 150a and the pixel electrode 130 are not overlapped with each other at the edge of the pixel electrode 130, that is, at the edge of the pixel region. Accordingly, the transmissivity of the edge of the pixel region is higher than the transmissivity of the edge of the pixel region, and the transmissivity of the edge of the pixel region contributes most to the transmissivity of the display apparatus including the thin film transistor array substrate.

The thin film transistor array substrate according to the present invention includes a first common electrode 140a provided in a pixel region and two common electrodes provided at the edge of the pixel region so as to correspond to the interval between the edge of the pixel electrode 130 and the data line 120 Different voltages are applied to the electrode 150a. In this case, the first and second common electrodes 140a and 150a extend from the first and second common wirings 140 and 150, respectively.

2A and 2B are output diagrams of the first common voltage and the second common voltage.

As shown in FIGS. 2A and 2B, the first common voltage applied to the first common electrode 140a is constant for every frame like a common voltage applied to a common common electrode. On the other hand, the second common voltage applied to the second common electrode 150a swings every frame. That is, the potential difference generated between the second common electrode 150a and the pixel electrode 130 is greater than the potential difference generated between the first common electrode 140a and the pixel electrode 130, and the second common electrode 150a A stronger electric field is generated at the edge of the pixel region.

Specifically, as shown in FIG. 2A, the second common voltage swings every frame. At this time, when the data voltage applied to the pixel electrode 130 is positive with respect to the first common voltage, the second common voltage is negative with respect to the first common voltage, and when the data voltage is negative with respect to the first common voltage The second common voltage is preferably positive relative to the first common voltage. For example, when the data voltage applied to the pixel electrode 130 is 4.5 V, the first common voltage is 0 V, the second common voltage is -1 V in the odd frame, the second common voltage in the even frame is Lt; / RTI >

The thin film transistor array substrate is driven by a column inversion method. As shown in FIG. 2B, the thin film transistor array substrate is driven by a second common voltage, which is applied to the second common electrode 150a of the adjacent pixel region on the basis of the data line 120, A voltage having a polarity opposite to that of the second common electrode 150a of FIG. 2A is applied. That is, the driving integrated circuit that generates the common voltage can output a total of three common voltages.

In the thin film transistor array substrate of the present invention, different voltages are applied to the first and second common electrodes 140a and 150a, and a fringe electric field is strongly generated at the edge of the pixel region. Therefore, the transmittance of the display device provided with the thin film transistor array substrate of the present invention can be effectively improved. Generally, in order to strongly generate the fringe field, the data voltage applied to the pixel electrode 130 must be increased. In this case, however, the power consumption increases.

On the other hand, as described above, the thin film transistor array substrate of the present invention does not increase the data voltage to be applied to the pixel electrode 130, but increases the fringing electric field at the edge of the pixel region, The transmittance can be improved by adjusting only the voltage applied to the electrode 150a.

Hereinafter, a method of manufacturing a thin film transistor array substrate according to the present invention will be described in detail with reference to the accompanying drawings.

FIGS. 3A to 3C are plan views illustrating a method of manufacturing a thin film transistor array substrate of the present invention, and FIGS. 4A to 4C are cross-sectional views illustrating a method of manufacturing a thin film transistor array substrate of the present invention.

First, as shown in FIG. 3A and FIG. 4A, a thin film transistor (TFT) is formed for each pixel region defined by intersecting the gate wiring 105 and the data wiring 120 with the gate insulating film 110 interposed therebetween on the substrate 100 .

Specifically, a gate metal layer is formed by a deposition method such as a sputtering method, and then a gate metal layer is patterned to form a gate electrode 105a and a gate wiring 105. [ A gate insulating film 110 is formed on the entire surface of the substrate 100 including the gate electrode 105a and the gate wiring 105. Then, A semiconductor layer 115 having a structure in which an active layer (not shown) and an ohmic contact layer (not shown) are stacked in this order on the gate insulating film 110 is formed and a gate insulating film 110 ) Data metal layer is formed on the front surface. Then, the source and drain electrodes 120a and 120b and the data line 120 are formed by patterning the data metal layer.

The source electrode 120a protrudes from the data line 120 and the drain electrode 120b is formed apart from the source electrode 120a. An ohmic contact layer (not shown) corresponding to the spacing between the source and drain electrodes 120a and 120b is removed to form a channel region.

Next, as shown in FIGS. 3B and 4B, a first protective film 125a is formed on the entire surface of the gate insulating film 110 so as to cover the TFT. In this case, the first passivation layer 125a is preferably formed of an organic insulating material. Although not shown, a passivation layer may be further formed between the first passivation layer 125a and the gate insulating layer 110 using an inorganic insulating material. Then, the first protective film 125a is selectively removed to form a drain contact hole exposing the drain electrode 120b of the thin film transistor TFT.

The pixel electrode 130 connected to the drain electrode 120b through the drain contact hole is formed on the first protective film 125a. The pixel electrode 130 may be formed of a material selected from the group consisting of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide Is formed of the same transparent conductive material, and is formed in the shape of a tubular electrode.

3C and 4C, a second passivation layer 125b is formed on the entire surface of the substrate 100 so as to cover the pixel electrode 130. Referring to FIG. The second protective film 125b is preferably formed of an inorganic insulating material. Then, first and second common electrodes 140a and 150a in the form of slits are formed on the second protective film 125b. The first and second common electrodes 140a and 150a may be formed of a transparent conductive material such as the pixel electrode 130. [

The first common electrode 140a extends in the first common wiring 140 and overlaps the pixel electrode 130 with the second protective film 125b interposed therebetween. The second common electrode 150a extends from the second common line 150 and is provided at the edge of the pixel region so as to correspond to the interval between the edge of the pixel electrode 130 and the data line 120.

At this time, different voltages are applied to the first common electrode 140a and the two common electrodes 150a. Specifically, the first common voltage applied to the first common electrode 140a is constant for every frame. On the other hand, the second common voltage applied to the second common electrode 150a swings every frame. A potential difference generated between the second common electrode 150a and the pixel electrode 130 is applied to the first common electrode 140a so that a stronger electric field is generated at the edge of the pixel region having the second common electrode 150a. ) And the pixel electrode 130. In this case, To this end, the second common voltage may have a polarity opposite to that of the data signal applied to the pixel electrode 130.

That is, in the manufacturing method of the thin film transistor array substrate according to the present invention, different voltages are applied to the first and second common electrodes 140a and 150a, and a strong fringing field is generated at the edge of the pixel region. Therefore, the transmittance of the display device provided with the thin film transistor array substrate of the present invention can be effectively improved. The transmittance of the thin film transistor array substrate of the present invention can be effectively improved when the white ratio of the display device is higher. On the other hand, when the black ratio of the display device is higher, it is not necessary to improve the transmittance, and a constant voltage can be applied to the second common electrode 150a per frame like the first common electrode 140a.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Will be apparent to those of ordinary skill in the art.

100: substrate 105: gate wiring
105a: gate electrode 110: gate insulating film
115: semiconductor layer 120: data wiring
120a: source electrode 120b: drain electrode
125a: first protective film 125b: second protective film
130: pixel electrode 140: first common wiring
140a: first common electrode 150: second common wiring
150a: second common electrode

Claims (8)

A plurality of pixel regions defined by crossing gate wirings and data wirings on a substrate;
A thin film transistor formed in each pixel region;
A first protective layer formed on the substrate, the first protective layer including a drain contact hole exposing the thin film transistor;
A pixel electrode formed on the first protective film and connected to the thin film transistor through the drain contact,
A second protective layer formed on the substrate to cover the pixel electrode; And
A first common electrode and a second common electrode formed on the second passivation layer in a slit shape and forming a fringe electric field with the pixel electrode,
Wherein the first common electrode is provided in the pixel region so as to overlap with the pixel electrode and the second common electrode is provided at an edge of the pixel region so as to correspond to the interval between the pixel electrode edge and the data line,
Wherein a first common voltage and a second common voltage that are different from each other are applied to the first common electrode and the second common electrode, respectively. The method according to claim 1,
Wherein a potential difference between the second common electrode and the pixel electrode is greater than a potential difference between the first common electrode and the pixel electrode. The method according to claim 1,
Wherein the first common voltage is constant for every frame, and the second common voltage swings every frame. The method according to claim 1,
And a second common voltage applied to the second common electrode has a polarity opposite to a second common voltage applied to a second common electrode of pixel regions on both sides adjacent to the data line with respect to the data line. Board. Forming a thin film transistor on each of a plurality of pixel regions defined by intersecting gate wirings and data wirings on a substrate;
Forming a first protective film on the substrate to cover the thin film transistor;
Forming a drain contact hole exposing the thin film transistor by selectively removing the first protective film;
Forming a pixel electrode in the form of a tubular electrode connected to the thin film transistor exposed through the drain contact hole on the first protective film;
Forming a second protective layer on the substrate to cover the pixel electrode; And
And forming a slit-shaped first common electrode and a second common electrode on the second protective film to form a fringe electric field with the pixel electrode,
Wherein the first common electrode is provided in the pixel region so as to overlap with the pixel electrode and the second common electrode is provided at an edge of the pixel region so as to correspond to the interval between the pixel electrode edge and the data line,
Wherein a first common voltage and a second common voltage that are different from each other are applied to the first common electrode and the second common electrode, respectively. 6. The method of claim 5,
Wherein a potential difference between the second common electrode and the pixel electrode is greater than a potential difference between the first common electrode and the pixel electrode. 6. The method of claim 5,
Wherein the first common voltage is constant for every frame, and the second common voltage swings every frame. 6. The method of claim 5,
And the second common voltage applied to the second common electrode has a polarity opposite to a second common voltage applied to the second common electrode of the pixel electrodes on both sides adjacent to the data line with respect to the data line. / RTI >

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