KR102056687B1 - Liquid Crystal Display Device and Method for Fabricating the same - Google Patents

Abstract

The present invention discloses a liquid crystal display and a method of manufacturing the same. The disclosed liquid crystal display device includes a substrate; Gate lines and data lines cross-arranged to define pixel regions on the substrate; A switching element disposed in an intersection region of the gate line and the data line; First and second common lines disposed on left and right sides with the data line and the pixel area interposed therebetween and intersecting the gate line and parallel to the data line; A pixel electrode formed on the substrate of the pixel region; And a common electrode overlapping the pixel electrode and having a passivation layer therebetween, wherein a gate insulating layer is formed on the gate electrode of the thin film transistor and the gate line of the intersection region of the gate line and the data line.
The liquid crystal display of the present invention and a method of manufacturing the same have the effect of reducing power consumption by removing the gate insulating film between the pixel electrode and the common electrode which are arranged to overlap each other in the pixel region.

Description

Liquid crystal display device and method for manufacturing the same {Liquid Crystal Display Device and Method for Fabricating the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same, in which a gate insulating film is removed in a pixel region, thereby reducing power consumption and improving pixel transmittance.

In general, a liquid crystal display (LCD) displays an image by adjusting a light transmittance of a liquid crystal having dielectric anisotropy using an electric field. In the liquid crystal display, a color filter substrate on which a color filter array is formed and a thin film transistor array substrate on which a thin film transistor (TFT) array is formed are bonded to each other with a liquid crystal interposed therebetween.

Recently, in order to solve the narrow viewing angle problem of the liquid crystal display, a liquid crystal display adopting various new methods has been developed. Liquid crystal displays having a wide viewing angle include an in-plane switching mode (IPS), an optically compensated birefrigence mode (OCB), and a fringe field spooling (FFS).

The horizontal electric field type liquid crystal display device arranges the pixel electrode and the common electrode on the same substrate to generate a horizontal electric field between the electrodes. As a result, the long axes of the liquid crystal molecules are arranged in a horizontal direction with respect to the substrate, and thus have a wide viewing angle characteristic as compared with the conventional twisted nematic (TN) type liquid crystal display.

In addition, the LCD includes a liquid crystal display panel in which a plurality of pixels are arranged in a matrix, a gate driver driving a gate line of the liquid crystal display panel, a data driver driving a data line of the liquid crystal display panel, and the like.

Each pixel of the liquid crystal display panel implements a desired color by using a combination of red, green, and blue sub-pixels that adjust light transmittance according to a data signal. Each sub pixel includes a thin film transistor connected to a gate line and a data line, and a liquid crystal capacitor connected to the thin film transistor. The liquid crystal capacitor charges a difference voltage between the data signal supplied to the pixel electrode and the common voltage supplied to the common electrode through the thin film transistor and drives the liquid crystal according to the charged voltage to adjust the light transmittance.

The gate driver includes a plurality of gate integrated circuits (ICs) for sequentially driving gate lines of the liquid crystal panel. The data driver includes a plurality of data ICs which convert digital data signals into analog data signals and supply them to the data lines of the liquid crystal display panel each time the gate lines are driven.

The conventional transverse electric field type liquid crystal display device forms a thin film transistor, a common electrode and a pixel electrode on a substrate according to a mask process, and usually has a disadvantage in that the process is complicated because 6 to 7 mask processes are performed.

In addition, in the conventional transverse type liquid crystal display device, a plurality of insulating films are stacked in the pixel area, and when the pixel electrode and the common electrode are formed on the substrate and the upper insulating layer, the distance between the pixel electrode and the common electrode becomes wider and thus consumes power. There is a growing problem.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, in which the gate electrode and the pixel electrode are formed by the same mask process to reduce the number of steps and the transmittance is improved by removing the gate insulating film in the pixel region.

Another object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, in which power consumption is reduced by removing a gate insulating layer between a pixel electrode and a common electrode disposed to overlap each other in a pixel area.

The liquid crystal display device of the present invention for solving the above problems of the prior art, the substrate; Gate lines and data lines cross-arranged to define pixel regions on the substrate; A switching element disposed in an intersection region of the gate line and the data line; First and second common lines disposed on left and right sides with the data line and the pixel area interposed therebetween and intersecting the gate line and parallel to the data line; A pixel electrode formed on the substrate of the pixel region; And a common electrode overlapping the pixel electrode and having a passivation layer therebetween, wherein a gate insulating layer is formed on the gate electrode of the thin film transistor and the gate line of the intersection region of the gate line and the data line.

In addition, the liquid crystal display device manufacturing method of the present invention, providing a substrate; Sequentially forming first and second metal films on the substrate, and then forming first and second photoresist patterns according to a halftone mask or diffraction mask process; Performing an etching process using the first and second photoresist patterns as a mask to form a metal pattern on the gate electrode, the pixel electrode, and the pixel electrode; Performing an etching process on the substrate on which the first and second photoresist patterns are formed, removing the second photoresist pattern existing on the metal pattern, and forming a third photoresist pattern on the gate electrode; Forming a gate insulating film so that the third photoresist pattern surrounds the gate electrode; Forming a channel layer, a source electrode, and a drain electrode on the gate insulating layer on the gate electrode; Forming a protective film on the substrate on which the source electrode and the drain electrode are formed; And forming a common electrode on the passivation layer to overlap the pixel electrode.

The liquid crystal display of the present invention and the method of manufacturing the same have the effect of reducing the number of steps by forming the gate electrode and the pixel electrode in the same mask process and improving the transmittance by removing the gate insulating film in the pixel region.

In addition, the liquid crystal display of the present invention and a method of manufacturing the same have the effect of reducing power consumption by removing the gate insulating film between the pixel electrode and the common electrode which are arranged to overlap each other in the pixel region.

1 is a diagram illustrating a pixel structure of a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along lines II ′ and II-II ′ of FIG. 1.
3A to 3F illustrate a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a diagram illustrating a pixel structure of a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along lines II ′ and II-II ′ of FIG. 1.

1 and 2, in the transverse electric field type liquid crystal display device of the present invention, a plurality of gate lines 101 and a data line 103 are arranged to define a plurality of pixel regions, and the gate lines 101 are defined. ) And a thin film transistor (TFT), which is a switching element, are disposed in an area where the data line 103 crosses the.

In the present invention, the gate lines 101 are arranged in pairs in rows of respective pixel regions so as to be driven by the Z-inversion driving method or the 2-dot inversion driving method. The thin film transistors connected to each other are disposed in the left and right pixel areas based on the pair of gate lines 101.

That is, as shown in the figure, a pair of gate lines 101 are arranged adjacent to each other, the left (odd) pixel region is driven by a thin film transistor formed on the upper gate line of the pixel region, and the right (excellent) The pixel region is driven by the thin film transistor formed on the lower gate line 101 of the pixel region.

In addition, in the present invention, in order to improve the aperture ratio of the pixel area, the first common line 106a that is adjacent to the left (odd) pixel area and intersects the gate line 101 is disposed around the data line 103. The second common line 106b is disposed around the data line 103 and intersects with the gate line 101 while being adjacent to the right (excellent) pixel area.

That is, in the present invention, the first common line 106a, the data line 103, and the second common line 106b are alternately arranged with the pixel area interposed therebetween. Thus, the first and second common lines 106a and 106b are disposed parallel to the data line 103.

In addition, a first pixel electrode 109a, a first common electrode 105a, a second pixel electrode 109b, and a second common electrode 105a are respectively disposed in the left pixel area and the right pixel area around the data line 103. ) Are arranged.

In addition, a first cover electrode 133 formed integrally with the first and second common electrodes 105a and 105b and overlapping the data line 103 is disposed on the data line 103. It is formed integrally with the first and second common electrodes 105a and 105b on the first and second common lines 106a and 106b, and overlaps the first and second common lines 106a and 106b, respectively. The second cover electrode 134 is disposed.

As shown in the figure, the first pixel electrode 109a and the second pixel electrode 109b are each formed in a rectangular plate structure in left and right (odd / best) pixel areas of the substrate 100. The first and second common electrodes 105a and 105b are formed to overlap the first pixel electrode 109a and the second pixel electrode 109b, respectively. The first and second common electrodes 105a and 105b may have a plurality of slit structures.

The slit structures of the first and second common electrodes 105a and 105b have a predetermined inclination angle symmetrically with respect to the vertical data line 103 direction with respect to the center line of the pixel region parallel to the gate line 101. .

In addition, the thin film transistor formed in each pixel area is electrically connected to the first and second pixel electrodes 109a and 109b formed on the substrate 100. As illustrated in FIG. 2, the drain electrode 117b and the second pixel electrode 109b of the thin film transistor are electrically connected to each other by the contact electrode 250 in the first contact portion 201.

In the same manner, the first pixel electrode 109a is also electrically connected to the drain electrode of the thin film transistor of the adjacent pixel region. (Not shown) The first and second pixel electrodes 109a and 109b are connected to the gate of the thin film transistor. It is formed on the same layer as the electrode 111, all in contact with the substrate 100.

In addition, the first and second common electrodes 105a and 105b formed in the pixel areas of the liquid crystal display are electrically connected to each other, and the second common electrode 105b is integrally formed with the second cover electrode 134. Formed. The second cover electrode 134 is electrically connected to the second common line 106b through the second contact portion 202.

In the same manner, the second cover electrode 134 and the first common line 106b are also electrically connected by the contact portion.

Accordingly, the first and second common lines 106a and 106b are electrically connected to the first and second common electrodes 105a and 105b, so that a common voltage is applied to the first and second common electrodes 105a and 105b. To supply.

In addition, referring to FIG. 2, the transverse electric field type liquid crystal display device of the present invention includes a gate insulating layer 112 covering a gate electrode 111 having a double layer structure of a transparent conductive material layer and an opaque conductive material layer on a substrate 100. ). Both edges of the gate insulating layer 112 directly contact the substrate 100 while covering the gate electrode 111.

That is, in the present invention, the gate insulating film 112 is formed to cover the gate electrode 111 and the gate line 101 of the thin film transistor. The gate insulating layer as described above is formed by using the photoresist pattern used to form the gate electrode 111 and the pixel electrodes.

A portion of the gate insulating layer 112 is in contact with the gate electrode 111, and a channel layer 114 is formed in contact with the substrate 100 and a part of the second pixel electrode 109b. The channel layer 114 is formed on the channel layer 114. The source electrode 117a and the drain electrode 117b are formed.

In addition, a data line 103 and a channel layer pattern 114a formed under the data line 103 are formed on the substrate 100 in the data line 103 region, and the left and right sides of the data line 103 are formed on the substrate 100. First and second pixel electrodes 109a and 109b are formed on the substrate 100.

A passivation layer 119 is formed on the thin film transistor and the substrate 100 on which the first and second pixel electrodes 109a and 109b are formed. First and second common electrodes 105a and 105b formed of a transparent insulating material are formed on the passivation layer 119, and a first cover electrode (eg, on the passivation layer 119) is formed in an area overlapping the data line 103. 133 is formed.

Accordingly, only the passivation layer 119 is present between the first pixel electrode 109a and the first common electrode 105a, so that the distance D1 between the two electrodes has a value of 3000 to 6000 μs. That is, the thickness of the gate insulating film used in the related art, 2000 to 4000 kV, may be removed to lower the operating voltages of the first pixel electrode 109a and the first common electrode 105a.

Further, in the region of the first contact portion 201 where the drain electrode 117b of the thin film transistor is exposed, the drain electrode 117b and the first pixel electrode 109b are electrically connected by the contact electrode 250 formed of a transparent conductive material. Is connected.

As described above, in the present invention, the number of mask processes can be reduced by simultaneously forming the pixel electrode on the substrate when forming the gate electrode.

In addition, in the pixel region where the pixel electrode is formed, a gate insulating layer other than the passivation layer is not formed between the pixel electrode and the common electrode, thereby reducing power consumption.

3A to 3F illustrate a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention.

Referring to FIGS. 1 and 3A to 3F, a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention may include indium tin oxide (ITO) or indium zinc oxide (IZO) on a substrate 100 made of a transparent insulating material. Alternatively, the first metal film 11a made of a transparent conductive material such as indium tin zinc oxide (ITZO) and the second metal film 11b made of an opaque conductive material are sequentially stacked and formed by sputtering.

The second metal film 11b is formed from molybdenum (Mo), titanium (Ti), tantalum (Ta), tungsten (W), copper (Cu), chromium (Cr), aluminum (Al), or a combination thereof. It may be formed of an alloy.

Then, an organic film, for example, a photoacrylic insulating material is formed on the substrate 100, and then the first and second layers having different thicknesses on the substrate 100 using a diffraction mask or a halftone mask. Photosensitive film patterns 300a and 300b are formed.

As described above, when the first and second photoresist patterns 300a and 300b are completed, the etching process is performed on the first and second metal films 11a and 11b using the mask as a mask to form the first photoresist pattern 300a. The first and second pixel electrode patterns 109a, 109b and 21 corresponding to the gate electrode 111 and the second photoresist pattern 300b are formed. In this case, the gate electrode 111 is formed in a double layer structure consisting of the first and second metal films 11a and 11b. The first and second pixel electrode patterns 109a, 109b, and 21 may include first and second pixel electrodes 109a and 109b made of the first metal film 11a, and first and second pixel electrodes ( It is a double layer structure including the second metal film pattern 21 disposed on 109a and 109b.

Then, a dry etching process is performed to remove the second photoresist pattern 300b formed on the first and second pixel electrode patterns 109a, 109b, and 21, and to form a third photoresist pattern on the gate electrode 111. 310 is formed.

Subsequently, a reflow process is performed on the third photoresist pattern 310 so that the third photoresist pattern 310 covers the side surface of the gate electrode 111 to cover at least a portion of the substrate 100. The gate insulating film 112 is formed to completely cover the gate electrode 111 by flowing down to the contact.

As described above, in the present invention, the gate insulating film is not formed in the pixel region where the pixel electrode is formed, and the gate insulating film is formed only in the gate electrode 111. Although not shown in the drawing, when the gate electrode 111 is formed, a gate line 101 is also formed on the substrate 100, and the gate insulating layer is formed to further cover the gate line 101.

As described above, when the gate insulating layer 112 covering the gate electrode 111 is formed, a wet etching process is performed thereafter, whereby the second metal film patterns of the first and second pixel electrode patterns 109a and 109b ( 21) Remove. As a result, first and second pixel electrodes 109a and 109b having a single layer structure composed of only the first metal film 11a are formed.

Then, when the first and second pixel electrodes 109a and 109b and the gate insulating film 112 are formed on the substrate 100, as shown in FIG. 3E, an amorphous silicon film is formed on the entire surface of the substrate 100. And a semiconductor layer composed of a doped amorphous silicon film (n + or p +) and a source / drain metal film sequentially.

Then, a halftone mask or a diffraction mask process is performed to form the channel layer 113 and the source / drain electrodes 117a and 117b on the gate electrode 111 to complete the thin film transistor. The channel layer 113 includes an ohmic contact layer formed of a doped amorphous silicon film.

In addition, a channel layer pattern 114a and a channel layer pattern 114a in direct contact with the substrate 100 between the first pixel electrode 109a and the second pixel electrode 109b in the data line 103 region. The data line 103 formed on it is formed. The structure of the data line 103 includes a continuous wet etching process and a dry etching process according to the halftone mask or diffraction mask process.

The source / drain metal film may include any one of an alloy formed from molybdenum (Mo), titanium (Ti), tantalum (Ta), tungsten (W), copper (Cu), chromium (Cr), aluminum (Al), or a combination thereof. You can use one. In addition, a transparent conductive material such as indium tin oxide (ITO) may be used. In addition, although the figure is formed of a single metal film, at least two or more metal films may be stacked in some cases.

In addition, when the data line 103 is formed, the first and second common lines 106a and 106b are also formed at the same time.

As described above, when the source / drain electrodes 117a and 117b are formed on the substrate 100, as shown in FIG. 3F, a protective film 119 made of an organic material is formed on the entire surface of the substrate 100. The mask process is performed to form a first contact portion 201 exposing a part of the drain electrode 117b of the thin film transistor. The protective film 119 may be formed to a thickness of 3000 ~ 6000 ~.

In this case, a second contact portion 202 (see FIG. 1) exposing portions of the first and second common lines 106a and 106b is also formed.

As described above, when the contact portions are formed on the passivation layer 119, a transparent conductive material is formed on the entire surface of the substrate 100, and then a mask process is performed to form the first and second pixel electrodes 109a and 109b. The overlapping first and second common electrodes 105a and 105b having a plurality of slit structures are formed. The transparent conductive material may be indium tin oxide (ITO) or indium zinc oxide (IZO).

In this case, a contact electrode 250 is formed in the first contact portion 201 to electrically connect the exposed drain electrode 117b and the second pixel electrode 109b. When the first and second common electrodes 105a and 105b are formed, a first cover electrode 133 is formed to overlap the data line 103, and the first and second common lines 106a and 106b are formed. ) And a second cover electrode 134 is formed to overlap.

The second cover electrode 134 is electrically connected to the second common line 106b through the second contact portion 202. The connection relationship between the first pixel electrode 109a and the drain electrode of the thin film transistor is also the same as that of the second pixel electrode 109b.

The liquid crystal display of the present invention and the method of manufacturing the same have the effect of reducing the number of steps by forming the gate electrode and the pixel electrode in the same mask process and improving the transmittance by removing the gate insulating film in the pixel region.

In addition, the liquid crystal display of the present invention and a method of manufacturing the same have the effect of reducing power consumption by removing the gate insulating film between the pixel electrode and the common electrode which are arranged to overlap each other in the pixel region.

100 substrate 112 gate insulating film
114: channel layer 133: first cover electrode
134: second cover electrode 105a: first common electrode
105b: second common electrode 106a: first common line
106b: second common line 109a: first pixel electrode
109b: second pixel electrode

Claims (11)

Board;
Gate lines and data lines intersected to define pixel regions on the substrate;
A thin film transistor disposed at an intersection of the gate line and the data line;
First and second common lines disposed on the substrate;
A gate insulating layer disposed on the substrate and covering only the gate electrode and the gate electrode of the thin film transistor;
A pixel electrode formed on the substrate of the pixel region;
A passivation layer covering the gate line, the data line, the thin film transistor, the first common line, the second common line, and the pixel electrode; And
A common electrode formed on the passivation layer of the pixel region and overlapping the pixel electrode with only the passivation layer interposed therebetween,
The first common line is adjacent to a pixel area parallel to the data line and disposed on one side of the data line,
And the second common line is parallel to the data line and adjacent to a pixel area disposed on the other side of the data line.
The liquid crystal display of claim 1, further comprising a first cover electrode disposed on the passivation layer and overlapping the data line and integrally formed with the common electrode.
The liquid crystal display device of claim 2, further comprising a second cover electrode disposed on the passivation layer and overlapping the first and second common lines, respectively, and integrally formed with the common electrode.
The liquid crystal display device of claim 1, wherein a distance between the pixel electrode and the common electrode is about 3000 μs to about 6000 μs.
delete Providing a substrate;
Sequentially forming first and second metal films on the substrate, and then forming first and second photoresist patterns on the second metal film according to a halftone mask or diffraction mask process;
Etching the first and second metal layers by using the first and second photoresist patterns as masks, thereby forming a gate electrode and a gate line corresponding to the first photoresist pattern, and a pixel corresponding to the second photoresist pattern Forming an electrode pattern;
Removing the second photoresist pattern, and forming a third photoresist pattern on the gate electrode and the gate line;
Performing a reflow process on the third photoresist pattern to form a gate insulating layer covering only the gate electrode and the gate line;
Performing an etching process of removing the second metal layer of the pixel electrode pattern using the gate insulating layer as a mask to form a pixel electrode having a single layer structure formed of the first metal layer;
Forming a channel layer, a source electrode, and a drain electrode on the gate insulating layer, and forming a data line crossing the gate line and first and second common lines parallel to the data line on the substrate;
Forming a passivation layer on the substrate to cover the pixel electrode, the source electrode and the drain electrode, the data line, and the first and second common lines; And
And forming a common electrode overlapping the pixel electrode on the passivation layer.
The method of claim 6, wherein the gate insulating layer surrounds each of the gate electrode and the gate line and contacts at least a portion of the substrate.
7. The method of claim 6, wherein only the passivation layer is disposed between the pixel electrode and the common electrode, and the distance between the pixel electrode and the common electrode is 3000 m to 6000 m.
delete The method of claim 1,
Each of the gate line and the gate electrode of the thin film transistor has a double layer structure including a transparent conductive material layer on the substrate and an opaque conductive material layer on the transparent conductive material layer.
The pixel electrode has a single layer structure in which the opaque conductive material layer is removed from the double layer structure and is formed of the transparent conductive material layer.
The method of claim 6,
Wherein the first metal film is a transparent conductive material layer and the second metal film is an opaque conductive material layer.

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