KR20140091397A - lIQUID CRYSTAL dISPLAY HAVING STRUCTURE COLOR FILTER ON TFT AND METHOD OF FABRICATING THEREOF - Google Patents

Abstract

The present invention provides a liquid crystal display device of a COT structure and a manufacturing method thereof, capable of improving transmissivity by eliminating black matrix. The liquid crystal display device comprises a gate line extended in one direction on a substrate; a data line extended in the direction crossing the gate line and having an upper most part formed of a low reflective metal film; a thin film transistor formed at the intersection region of the gate line and the data line; and a black matrix formed at the upper part of the gate lien and the thin film transistor.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device having a color filter on TFT (COT) structure, and more particularly, to a liquid crystal display device having a cathode structure capable of improving a transmittance by removing a black matrix on a data line, And a manufacturing method thereof.

2. Description of the Related Art Generally, a liquid crystal display device includes a liquid crystal panel in which liquid crystal material is injected between two substrates, in which two substrates each having electrodes for generating an electric field are disposed to face each other, By controlling an optical anisotropy and a birefringence characteristic of the liquid crystal molecules by an electric field generated by the liquid crystal molecules.

Therefore, the process of attaching the two substrates on which the two electrodes are formed in the process of manufacturing the liquid crystal display greatly affects the quality of the image, and the color on TFT (hereinafter referred to as COT) Structure was proposed.

1A is a plan view of a conventional COT-structured liquid crystal display, and FIG. 1B is a cross-sectional view taken along line A-A 'in FIG. 1A.

1A and 1B, in a conventional liquid crystal display device, a unit pixel is defined by a plurality of gate lines 102a and a plurality of data lines 107 perpendicularly intersecting the gate lines 102a.

In addition, a thin film transistor 130 connected to the gate line 102a and the data line 107 is formed on one side of the unit pixel.

Above the gate line 102a and the data line 107, a black matrix 110 for blocking unnecessary light is formed in the upper portion or the lower portion of the gate line and the data line.

In the unit pixel region, color filter layers (not shown) of red, green, and blue are formed, and pixel electrodes (not shown) for displaying the colors of the liquid crystal display elements and applying an electric field to the liquid crystal are formed.

Since the color filter layer is formed on the array substrate on which the TFTs are formed, the liquid crystal display device having the above structure is referred to as a color filter on array (COA) or a color filter on TFT (COT).

A gate electrode 102 is formed on a transparent substrate 101 and branches off from the gate line and a gate insulating film 102 is formed on the gate line 102 to insulate the gate electrode 102. [ A layer 103 is formed.

An active layer 104 of a thin film transistor is formed on the gate insulating layer 103 and source and drain electrodes 106a and 106b are connected to the active layer 104 while the ohmic contact layer 105 is disposed.

The gate insulating layer 103 is formed with a data line 107 connected to the source electrode 106a and formed simultaneously with the source electrode.

A pixel electrode 109 connected to the drain electrode 106b is formed in the unit pixel region to apply an electric field to the liquid crystal layer 12.

The source and drain electrodes 106a and 106b and the data line 107 are insulated by an interlayer insulating layer 108. A black matrix 110 and a color filter layer 111 are formed on the interlayer insulating layer 108, Respectively.

In the color filter layer 111, a sub color filter layer of red, green, and blue is formed for each unit pixel, and the black matrix 110 is formed of a reverse tilt domain such as a gate line, a data line, ) Regions to prevent light leakage.

The upper substrate on which the common electrode 151 is formed is positioned on the opposite surface of the array substrate on which the gate lines and the data lines 107 are formed. The upper substrate includes a transparent substrate 150 and a common electrode 151 formed on the substrate 150.

Alignment films 112 and 152 for initial alignment of liquid crystal may be further formed on the common electrode 151 and the array substrate of the upper substrate. A liquid crystal 120 is filled between the upper substrate and the array substrate.

The liquid crystal display of the conventional COT structure described above should be formed so that the black matrix 110 covers the entire thin film transistor 130, the gate line 102a and the data line 107. [

In particular, since the black matrix is formed with margins in consideration of errors, it must be formed to have a width larger than that of the thin film transistor 130, the gate line 102a, and the data line 107. [ Such a black matrix reduces the aperture area of the liquid crystal display device, which lowers the transmittance of the liquid crystal display device.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal display device having a COT structure having improved transmittance by removing a black matrix corresponding to a data line by adding a low reflection metal film capable of performing a black matrix function to a data line, .

According to an aspect of the present invention, there is provided a liquid crystal display device having a gate structure, including: a gate line extending in one direction on a substrate; a gate line extending in a direction crossing the gate line; A thin film transistor formed in a crossing region of the gate line and the data line, a thin film transistor, and a black matrix formed on the gate line.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device having a gate structure, the method including forming a gate line, a gate electrode, and an active layer on a substrate, Forming an electrode to form a thin film transistor, forming a data line having a top portion made of a low reflective metal film, and forming a black matrix on the gate line and the thin film transistor.

According to the liquid crystal display device of the present invention and the method of manufacturing the same, the uppermost part of the data line is formed of a low reflection metal film and the black matrix corresponding to the upper part of the data line is removed, The transmittance can be improved.

1A is a plan view of a liquid crystal display device of a conventional COT structure.
1B is a cross-sectional view taken along line A-A 'in Fig. 1A.
2 is a plan view of a liquid crystal display of a COT structure according to an embodiment of the present invention.
FIG. 3A is a cross-sectional view of the liquid crystal display of FIG. 2 taken along line III-III '.
FIG. 3B is an enlarged view of a portion A in FIG. 3A.
4A to 4F are process sectional views of the liquid crystal display shown in FIG. 3A.
5A to 5C are process diagrams of a thin film transistor and a data line of a liquid crystal display device according to the present invention.

Hereinafter, a liquid crystal display device having a COT structure according to the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

FIG. 3 is a cross-sectional view taken along line III-III 'of FIG. 2, and FIG. 3B is a cross-sectional view of the liquid crystal display of FIG. And Figs. 4A to 4F are process sectional views of the liquid crystal display shown in Fig. 3A.

Hereinafter, a liquid crystal display device having a COT structure and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4F. FIG.

2 and 4A, a gate line 202a is formed on the substrate 201 in one direction, and a gate electrode 202 is formed in a shape protruding from the gate line 202a.

The gate line 202a and the gate electrode 202 are formed by depositing a conductive metal material such as aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), titanium ), And selectively patterning the same.

On the gate line 202a and the gate electrode 202, a gate insulating film 203 is formed. The gate insulating film 203 may be formed of silicon nitride (SiNx) or silicon oxide (SiO2).

Referring to FIGS. 2 and 4B, an active layer 208 is formed on the gate insulating layer 203. The active layer 208 may be formed by sequentially laminating an amorphous silicon layer (a-Si: H) and an amorphous silicon layer (n + or p +) containing impurities on the gate insulating film 203 and selectively patterning the amorphous silicon layer . Here, although not shown in the drawing, the active layer 208 may include an ohmic contact layer (not shown).

Referring to FIGS. 2 and 4C, on the gate insulating film 203 of the substrate 201 on which the active layer 208 is formed, a data line 205 crossing the gate line 202a and defining a pixel region is formed. A source electrode 206 and a drain electrode 207 are formed on the active layer 208.

The data line 205, the source electrode 206, and the drain electrode 207 may be formed in a structure in which one or more metal films are stacked, and may be formed together in the same process. Here, the uppermost metal film of the data line 205 may be formed of a metal having low reflection properties.

3A and 3B, the data line 205 may be formed as a triple-film structure in which three metal films are stacked on the gate insulating film 203.

At this time, the lowermost film 205a and the intermediate film 205b of the data line 205 are formed of a conductive metal material, and the uppermost film 205c may be formed of a low-reflective metal film.

For example, the lowermost film 205a and the intermediate film 205b of the data line 205 may be formed of aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr) Conductive metal such as molybdenum (Mo), molybdenum (Mo), molybdenum (Mo), molybdenum (Mo), molybdenum (Mo) and molybdenum May be formed of one or more metal water combinations among the metal groups.

The upper portion of the intermediate film 205b, that is, the uppermost film 205c of the data line 205 may be formed of a combination of at least one of low reflective metal groups such as copper nitride (CuNx), molybdenum oxide (MoX), and moly titanium have.

In this way, the uppermost film 205c of the data line 205 is shielded (or absorbed) from the light incident from the outside, since the uppermost film 205c of the data line 205 is formed of a triple- It can function as a black matrix. Therefore, as shown in FIG. 3A, the black matrix can be removed on the data line 205, and the opening area of the liquid crystal display device can be increased.

For example, assuming that the data line 205 is formed to have a width of about 4.5 um, in the conventional liquid crystal display device, a black matrix having a width of about 8 um is formed on the data line 205 in consideration of an error margin . However, as in the present invention, since the data line 205 is formed so as to function as a black matrix, the black matrix on the data line 205 can be omitted. Accordingly, since the black matrix area is formed only by the width of the data line 205, the liquid crystal display device can have a transmittance increasing effect of about 5.5% as compared with the conventional one.

On the other hand, the thicknesses of the metal films, that is, the thickness of the lowermost film 205a, the intermediate film 205b, and the top film 205c can be made different in consideration of the reflectance of external light.

For example, assuming that the data line 205 is a triple-film structure in which metal materials such as ITO, MoTi, and CuNx are sequentially stacked, ITO as the lowermost film 205a is formed to a thickness of about 400 ANGSTROM considering the reflectance of external light MoTi, which is the intermediate film 205b, is formed to a thickness of about 65 ANGSTROM, and CuNx which is the top film 205c is formed to a thickness of about 65 ANGSTROM.

3B, the data line 205 of the present invention is a triple-film structure in which three metal films are stacked. However, the data line 205 may be a double-film structure in which two metal films are stacked, and the top of the data line 205 should be formed of a low-reflection metal film even in a double-layer structure.

The source electrode 206 and the drain electrode 207 also have the same structure as that of the data line 205 in consideration of the fact that the source electrode 206 and the drain electrode 207 are formed in the same process as the data line 205, That is, the tops of the source electrode 206 and the drain electrode 207 are formed of a low-reflection metal film.

5A to 5C are process diagrams of a thin film transistor and a data line of a liquid crystal display device according to the present invention.

Hereinafter, the data line 205, the source electrode 206, and the drain electrode 207 are formed to have the same structure with reference to FIGS. 5A to 5C.

Although the data line 205, the source electrode 206 and the drain electrode 207 are formed in a triple-film structure in this embodiment, the data line 205, the source electrode 206, The electrode 207 may be formed in a double-layer structure.

5A, a first metal film (not shown) is formed on the entire surface of a substrate 201 on which a gate line, a gate electrode 202, a gate insulating film 203 and an active layer 208 are formed through the processes of FIGS. 4A and 4B. 215, the second metal film 216, and the third metal film 217 are sequentially deposited.

The first metal film 215 and the second metal film 216 may be formed of aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chrome (Cr) (ITO), indium-zinc-oxide (IZO), titanium (Ti), molybdenum tungsten (MoW), moly titanium (MoTi) and copper / moly titanium ), And the like.

Also, the third metal film 217 may be a combination of one or more of low reflective metal groups such as copper nitride (CuNx), molybdenum oxide (MoX), or moly titanium.

Referring to FIG. 5B, a photoresist (not shown) is applied to the entire surface of the third metal film 217, and a photolithography process using a mask is performed to form mask patterns 230 and 231. Here, the mask patterns 230 and 231 may be formed on the third metal film 217 only in the source electrode, the drain electrode forming region, and the data line forming region of the thin film transistor.

Next, the third metal film 217, the second metal film 216, and the first metal film 215 exposed on the substrate 201 are sequentially patterned using the mask patterns 230 and 231 as an etching mask, A source electrode 206, a drain electrode 207, and a data line 205 of a triple-film structure may be formed at the same time, as shown in Fig. 5C.

The source electrode 206 and the drain electrode 207 may constitute a thin film transistor together with the gate electrode 202 and the active layer 208 formed in the above process.

In this embodiment, the source electrode 206, the drain electrode 207, and the data line 205 are formed at the same time with the same structure. 3A, the source electrode 206, the drain electrode 207, and the data line 205 are formed in different structures in different structures, considering that the black matrix 220 is formed on the thin film transistor. As shown in FIG.

For example, in the process steps of FIGS. 5A to 5C, a first metal film 215 and a second metal film 216 are sequentially stacked on the entire surface of the substrate 201, and the source electrode 206, A first mask pattern (not shown) is formed in a region where the data line 205 and the data line 205 are to be formed and the first metal film 215 and the second metal film 216 are selectively A source electrode 206, a drain electrode 207 and a data line 205 having a double-layer structure can be formed.

After the third metal film 217 is laminated on the entire surface of the substrate 201 on which the source electrode 206, the drain electrode 207 and the data line 205 are formed, A second mask pattern (not shown) is formed, and the third metal film is selectively patterned using the second mask pattern to form a data line 205 of a triple-film structure.

As the source electrode 206 and the drain electrode 207 are formed in different structures from the data line 205, a masking process for forming the data line 205, that is, a process for forming a mask pattern needs to be added .

Referring again to FIG. 4C, the insulating layer 210 may be formed on the entire surface of the substrate 201 on which the thin film transistors and the data lines 205 are formed. The insulating layer 210 may be formed of an inorganic insulating layer using one of a group of inorganic insulating materials including silicon (SiN2) and silicon oxide (SiO2), or may be formed of one of photosensitive photosensitive photo- Can be formed as an organic insulating film.

2 and 4D, a color filter 211 may be formed on a substrate 201 on which an insulating layer 210 is formed, and a planarization layer 212 may be formed on a color filter 211.

The color filter 211 may be formed by applying a photosensitive color resin to the substrate 201 and selectively patterning the same. In addition, the color filter 211 may be arranged in various forms in the pixel region except the upper portion of the gate line 202a and the data line 205. [

The planarization layer 212 compensates for the level difference of the color filter 211 and may be formed of an organic insulating material such as benzocyclobutene (BCB) and acrylic resin.

2 and 4E, a contact hole (not shown) is formed in the planarization layer 212, the color filter 211, and the insulation layer 210 to expose the drain electrode 207 of the TFT. The pixel electrode 230 is formed on the planarization layer 212 so that the pixel electrode 230 is connected to the drain electrode 207 through the contact hole.

The pixel electrode 230 may be formed in a rod shape extending from the portion connected to the drain electrode 207 to the pixel region.

The first protective film 213 is formed on the entire surface of the substrate 201 on which the pixel electrode 230 is formed. The first protective film 213 may be formed using an inorganic insulating material or an organic insulating material.

A common electrode 204 is formed on the first protective film 213. The common electrode 204 may be spaced apart from the pixel electrode 230 by a predetermined distance with the first protective film 213 interposed therebetween.

The common electrode 204 may be formed to have a plurality of bars extending from the common electrode line (not shown) to the pixel region, and may be formed to intersect the pixel electrode 230 with the first protective film 213 interposed therebetween.

The second protective film 214 is formed on the entire surface of the substrate 201 on which the common electrode 204 is formed. The second protective film 214 may be formed using an inorganic insulating material or an organic insulating material in the same manner as the first protective film 213.

Referring to FIGS. 2 and 4F, a black matrix 220 is formed on the second protective layer 214 in a region corresponding to the TFT and the contact hole. As described above, the black matrix 220 can block light so that light entering from the outside does not enter the TFT and the contact hole.

As described above, since the uppermost portion of the data line 205 is formed of the low reflective metal film, the black matrix 220 may be omitted in the region corresponding to the data line 205 on the second protective film 214 have.

In this embodiment, the black matrix 220 is formed on the lower substrate. However, the black matrix 220 may be formed on the upper substrate bonded to the lower substrate.

2, a reference numeral 202P denotes a gate pad portion formed at an end of the gate line 202a, and a reference numeral 205P denotes a data pad portion formed at an end of the data line 205. In FIG.

While a number of embodiments have been described in detail above, it should be construed as being illustrative of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

202: gate electrode 202a: gate line
205: data line 206: source electrode
207: drain electrode 208: active layer
211: color filter 230: pixel electrode
204: common electrode 220: black matrix

Claims (10)

A gate line formed in one direction on the substrate;
A data line extending in a direction crossing the gate line and having a top portion formed of a low reflective metal film;
A thin film transistor formed in a crossing region of the gate line and the data line; And
And a black matrix formed on the thin film transistor and the gate line. The method according to claim 1,
Wherein the data line is a triple-film structure including the low reflective metal film. The method according to claim 1,
Wherein the low reflection metal film is formed of a combination of at least one of copper (CuNx), molybdenum oxide (MoX), and molybdenum (MoTi). The method according to claim 1,
Wherein the thin film transistor includes a source electrode and a drain electrode,
Wherein the source electrode and the drain electrode have a triple-layer structure having a top portion formed of the low reflective metal film. The method according to claim 1,
Wherein the thin film transistor includes a source electrode and a drain electrode,
Wherein the source electrode and the drain electrode are a double-layer structure of a conductive metal, and the data line is a triple-layer structure having the low reflective metal film added to an uppermost portion of the double-layer structure. Forming a gate line, a gate electrode and an active layer on a substrate;
Forming a source electrode and a drain electrode on the active layer to form a thin film transistor, and forming a data line having a top portion made of a low reflection metal film; And
And forming a black matrix on the gate line and the thin film transistor. The method according to claim 6,
Wherein the forming of the data lines simultaneously forms the top of each of the source electrode, the drain electrode, and the data line with a triple-film structure including the low reflective metal film. The method according to claim 6,
The forming of the data lines may include forming the source electrode and the drain electrode in a double layer structure of a conductive metal and forming a triple layer structure in which the low reflective metal layer is added to the top of the double layer structure Of the liquid crystal display device. The method according to claim 6,
Wherein the low reflection metal film is formed of a combination of at least one of copper (CuNx), molybdenum oxide (MoX), and molybdenum (MoTi). The method according to claim 6,
Forming a color filter on the thin film transistor, the gate line, and the data line, forming a pixel electrode on the color filter, and forming a common electrode on the pixel electrode,
Wherein the step of forming the black matrix is formed on the common electrode at a position corresponding to the thin film transistor and the gate line.

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