KR20140056930A - Light emitting device - Google Patents

Abstract

A light emitting device according to an embodiment comprises a first conductive semiconductor layer; a second conductive semiconductor layer; and an active layer between the first conductive semiconductor layer and the second semiconductor layer. The first conductive semiconductor layer includes a first layer and a second layer between the first layer and the active layer. The first layer has a plurality of recess regions at the interface between the first layer and the second layer, wherein a filling material is disposed within the recess regions. The active layer has a plurality of recess regions on one surface adjacent to the second conductive semiconductor layer. The second conductive semiconductor layer includes an insertion layer adjacent to the active layer and an electron blocking layer on the insertion layer.

Description

[0001] LIGHT EMITTING DEVICE [0002]

An embodiment relates to a light emitting element.

BACKGROUND ART Light emitting devices such as light emitting diodes and laser diodes using semiconductor materials of Group 3-5 or 2-6 group semiconductors have been widely used for various colors such as red, green, blue, and ultraviolet And it is possible to realize white light rays with high efficiency by using fluorescent materials or colors, and it is possible to realize low energy consumption, semi-permanent life time, quick response speed, safety and environment friendliness compared to conventional light sources such as fluorescent lamps and incandescent lamps .

Therefore, a transmission module of the optical communication means, a light emitting diode backlight replacing a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, a white light emitting element capable of replacing a fluorescent lamp or an incandescent lamp Diode lighting, automotive headlights, and traffic lights.

1 is a side cross-sectional view schematically showing a conventional light emitting device.

1, a conventional light emitting device 1 includes an n-GaN layer 12, an active layer 14, and a p-GaN layer 16 on a sapphire substrate 10, 12 and holes injected from the p-GaN layer 16 are recombined in the active layer 14 to emit light.

Since a nitride semiconductor light emitting device has a crystal structure identical to that of a nitride semiconductor material such as GaN and does not have a commercially available lattice matching substrate, a sapphire substrate 10 as an insulating substrate is generally used. At this time, a difference in lattice constant and thermal expansion coefficient occurs between the sapphire substrate 10 and the GaN layer grown on the sapphire substrate 10, causing lattice mismatching, and a defect such as a dislocation D is generated in the GaN layer Or a pit P in which the GaN layer is recessed is present. These defects cause leakage current and cause the reliability of the light emitting element 1 to deteriorate.

The embodiment attempts to improve the reliability of the light emitting device by preventing leakage current.

A light emitting device according to an embodiment includes a first conductive semiconductor layer; A second conductivity type semiconductor layer; And an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, wherein the first conductive type semiconductor layer includes a first layer and a second layer between the first layer and the active layer Wherein the first layer has a plurality of recessed regions at the interface with the second layer and the filling material is located in the recessed regions, and the active layer has a plurality of And the second conductivity type semiconductor layer includes an interlevel layer positioned adjacent to the active layer and an electron blocking layer on the interlevel layer.

The insertion layer may have a plurality of recessed regions corresponding to a plurality of recessed regions included in one surface of the active layer.

The electron blocking layer may fill a plurality of recessed regions of the interlevel layer.

The electron blocking layer may have a flat surface opposite to the surface contacting the insertion layer.

The insertion layer may have the same surface shape as the shape of one surface of the active layer having a plurality of recessed regions.

The first conductive semiconductor layer may further include a third layer located on one side of the first layer that is not in contact with the second layer.

A first electrode electrically connected to the first conductive semiconductor layer, and a second electrode electrically connected to the second conductive semiconductor layer, wherein the first electrode is in contact with the third layer.

The first layer may be an undoped semiconductor layer, or may be a low-doped semiconductor layer than the second layer or the third layer.

The electron blocking layer may have a single layer or superlattice structure.

The intercalation layer may have a thickness of several tens of angstroms to several hundreds of angstroms.

The first layer may have a thickness of from 0.05 [mu] m to 0.4 [mu] m.

The fill material may comprise an AlGaN or InAlGaN material.

A light emitting device according to another embodiment includes a substrate; And a light emitting structure disposed on the substrate and including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, wherein the first conductive semiconductor layer includes a plurality of Wherein the active layer has a recess region and a filling material is located in the recess region, the active layer has a plurality of recessed regions recessed toward the substrate on one surface adjacent to the second conductive type semiconductor layer, The semiconductor layer may include an insulator layer disposed in contact with the active layer and an electron blocking layer on the insulator layer. The insulator layer may be formed while maintaining a single-sided shape of the active layer having a plurality of recessed regions.

According to the embodiment, it is possible to prevent the leakage current by inducing the current flow to the defect-free high-quality region and improve the reliability of the light emitting device.

1 is a side sectional view schematically showing a conventional light emitting device.
2 is a side sectional view of a light emitting device according to the first embodiment;
3 is a side sectional view of a light emitting device according to a second embodiment;
4 is a view illustrating an example of a light emitting device having a horizontal structure to which the embodiments described above are applied.
5 is a view illustrating an example of a vertical-type light emitting device to which the embodiments described above are applied.
6 to 9 are views schematically showing an embodiment of a manufacturing process of a light emitting device.
FIG. 10 illustrates an embodiment of a light emitting device package including a light emitting device according to embodiments. FIG.
11 is a view illustrating a head lamp in which a light emitting device or a light emitting device package according to embodiments is disposed.
12 is a diagram illustrating a display device in which a light emitting device package according to an embodiment is disposed.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. Also, the size of each component does not entirely reflect the actual size.

2 is a side cross-sectional view of the light emitting device according to the first embodiment.

2, the light emitting device 100A according to the first embodiment includes a first conductive semiconductor layer 122, a second conductive semiconductor layer 126, and the first conductive semiconductor layer 122, And an active layer 124 between the second conductivity type semiconductor layers 126.

The first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be combined to form the light emitting structure 120.

The light emitting device 100 includes an LED (Light Emitting Diode) using a semiconductor layer of a plurality of compound semiconductor layers, for example, a group III-V group element or a group II-VI element, and the LED includes blue, green, A colored LED emitting the same light, or a white LED or a UV LED. The emitted light of the LED may be implemented using various semiconductors, but is not limited thereto.

The light emitting structure 120 may be formed using a metal organic chemical vapor deposition (MOCVD) method, a chemical vapor deposition (CVD) method, a plasma enhanced chemical vapor deposition (PECVD) method, (MBE), hydride vapor phase epitaxy (HVPE), or the like, but the present invention is not limited thereto.

The light emitting structure 120 may be supported by a substrate 110 and the substrate 110 may be a growth substrate of the light emitting structure 120.

The substrate 110 may be formed of a material having excellent thermal conductivity, which is suitable for semiconductor material growth. At least one of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga ₂ O ₃ may be used as the substrate 110. The substrate 110 may be wet-cleaned to remove impurities on the surface.

A buffer layer 115 may be positioned between the light emitting structure 120 and the substrate 110. The buffer layer 115 is intended to alleviate the difference in lattice mismatch and thermal expansion coefficient between the materials of the light emitting structure 120 and the substrate 110. The material of the buffer layer 115 may be at least one of Group III-V compound semiconductors such as GaN, InN, AlN, InGaN, InAlGaN, and AlInN.

An undoped semiconductor layer (not shown) may be disposed between the substrate 110 and the first conductivity type semiconductor layer 122. The un-doped semiconductor layer is a layer formed for improving the crystallinity of the first conductivity type semiconductor layer 122, and has a lower electrical conductivity than that of the first conductivity type semiconductor layer without being doped with an n-type dopant. May be the same as the first conductivity type semiconductor layer 122.

The first conductive semiconductor layer 122 may be formed of a semiconductor compound, for example, a compound semiconductor such as a group III-V element or a group II-VI element. The first conductive type dopant may also be doped. When the first conductivity type semiconductor layer 122 is an n-type semiconductor layer, the first conductivity type dopant may include Si, Ge, Sn, Se, and Te as an n-type dopant, but is not limited thereto. When the first conductive semiconductor layer 122 is a p-type semiconductor layer, the first conductive dopant may include Mg, Zn, Ca, Sr, and Ba as a p-type dopant, but is not limited thereto.

The first conductive semiconductor layer 122 includes a semiconductor material having a composition formula of Al _x In _y Ga _(1-xy) N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) can do. The first conductive semiconductor layer 122 may be formed of one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP and InP.

The second conductive semiconductor layer 126 may be formed of a semiconductor compound, and may be formed of a compound semiconductor such as a Group 3-Group 5 or a Group 2-Group 6, for example. The second conductivity type dopant may also be doped. The second conductivity type semiconductor layer 126 has a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) Semiconductor material. When the second conductive semiconductor layer 126 is a p-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, and Ba as p-type dopants, but is not limited thereto. When the second conductive semiconductor layer 126 is an n-type semiconductor layer, the second conductive dopant may include Si, Ge, Sn, Se, Te, or the like as the n-type dopant, but is not limited thereto.

Hereinafter, the case where the first conductivity type semiconductor layer 122 is an n-type semiconductor layer and the second conductivity type semiconductor layer 126 is a p-type semiconductor layer will be described as an example.

An n-type semiconductor layer (not shown) may be formed on the second conductive type semiconductor layer 126 when the semiconductor having the opposite polarity to the second conductive type, for example, the second conductive type semiconductor layer 126 is a p- . Accordingly, the light emitting structure may have any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

The active layer 124 is positioned between the first conductive semiconductor layer 122 and the second conductive semiconductor layer 126.

The active layer 124 is a layer in which electrons and holes meet each other to emit light having energy determined by the energy band inherent in the active layer (light emitting layer) material. When the first conductivity type semiconductor layer 122 is an n-type semiconductor layer and the second conductivity type semiconductor layer 126 is a p-type semiconductor layer, electrons are injected from the first conductivity type semiconductor layer 122, Holes can be injected from the conductive semiconductor layer 126. [

The active layer 124 may be formed of at least one of a single well structure, a multi-well structure, a quantum-wire structure, or a quantum dot structure. For example, the active layer 124 may be formed with a multiple quantum well structure by injecting trimethylgallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) But is not limited thereto.

InGaN / InGaN, InGaN / InGaN, InGaN / InGaN, InGaN / InGaN, InGaN / InGaN, InGaN / InGaN, and InGaN / InGaN, But may be formed of any one or more pairs of InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP, but is not limited thereto. The well layer may be formed of a material having a band gap smaller than the band gap of the barrier layer.

The first conductive semiconductor layer 122 includes a first layer 122-1 and a second layer 122-2 between the first layer 122-1 and the active layer 124. The first layer 122-1 includes a first layer 122-1 and a second layer 122-2. The first layer 122-1 and the second layer 122-2 may be made of the same material or may include different materials.

In the first conductivity type semiconductor layer 122, a plurality of recess regions P exist. Referring to FIG. 2, the first layer 122-1 may have a plurality of recessed regions P at the interface with the second layer 122-2. The recessed region P of the first conductive type semiconductor layer 122 indicates a structure in which the entire surface of the first layer 122-1 is not flat but recessed. The recess region P of the first conductivity type semiconductor layer 122 may be recessed in the direction of the substrate 110. The side surface of the recessed area P may exhibit a V shape having an inclination.

The recess region P of the first conductivity type semiconductor layer 122 may be formed by adjusting the growth temperature, growth rate, etc. of the first layer 122-1. The recess region P of the first conductivity type semiconductor layer 122 is formed mainly at a position where the potential D generated by the lattice mismatching occurs at the interface between the substrate 110 and the light emitting structure 120.

A filling material 122a is located in the recess region P of the first conductivity type semiconductor layer 122. [ The fill material 122a may be a high resistivity material, for example, an AlGaN or InAlGaN material.

The filling material 122a located in the recess region P of the first conductivity type semiconductor layer 122 has a high resistance so that current is leaked due to defects such as the recess region P and the potential D Can be prevented.

The second layer 122-2 is located between the first layer 122-1 and the active layer 124. The first layer 122-1 may be grown on the second layer 122-2 on the first layer 122-1 because the first layer 122-1 may be grown under the conditions that cause the recessed region P, To improve the crystallinity quality.

If the filling material 122a does not completely fill the recessed region P of the first layer 122-1, a portion of the recessed region P of the first layer 122-1 is covered with the second layer 122 -2) may be filled.

The active layer 124 also has a plurality of recess regions P on one surface adjacent to the second conductivity type semiconductor layer 126. The recessed region P of the active layer 124 indicates a structure in which the front surface of the active layer 124 is not flat but recessed. The recess region P of the active layer 124 may be recessed in the direction of the substrate 110. The side surface of the recessed area P may exhibit a V shape having an inclination.

The recess region P of the active layer 124 may be formed by adjusting the growth temperature, the growth rate, and the like of the active layer 124. The recess region P of the active layer 124 is located at a position where the potential D generated by the lattice mismatching occurs at the interface between the substrate 110 and the light emitting structure 120 or the lattice mismatch at the growth of the active layer 124 Is formed at a position where the electric potential D generated by the electric field is rising.

The second conductive semiconductor layer 126 is disposed on the active layer 124.

The second conductive semiconductor layer 126 may include an insertion layer 126a and an electron blocking layer 126b located adjacent to the active layer 124. [ The interlayer 126a and the electron blocking layer 126b may be doped with a second conductive dopant.

The electron blocking layer 126b has a high mobility of electrons provided in the first conductivity type semiconductor layer 122 so that electrons do not contribute to light emission and the second conductivity type semiconductor layer 126) to prevent the leakage current from being generated.

The electron blocking layer 126b is formed of a material having an energy band gap larger than that of the active layer 124 and may have a composition of In _x Al _y Ga _{1 -xy} N (0? _X <y <1). The electron blocking layer 126b may be a single layer or may have a superlattice structure including a pair of barrier layers having a large energy band gap and a pair of well layers having a smaller energy band gap than the barrier layer.

An interlevel layer 126a is located between the active layer 124 and the electron blocking layer 126b.

The insertion layer 126a serves to prevent diffusion of the doped second conductivity type dopant into the active layer 124 from the electron blocking layer 126b. The second conductivity type dopant is particularly concentrated in the recess region P of the active layer 124 and the light intensity and the low current level may be lowered. Therefore, the gap between the active layer 124 and the electron blocking layer 126b, The diffusion of the second conductivity type dopant can be blocked by locating the second conductivity type dopant 126a.

In addition, the insertion layer 126a may serve to provide holes to the active layer 124. The hole injection rate into the active layer 124 may be reduced due to a large energy band gap of the electron blocking layer 126b. By locating the insertion layer 126a between the active layer 124 and the electron blocking layer 126b, The injection efficiency of holes can be improved, and the doping efficiency of the electron blocking layer 126b can be improved by the existence of the insertion layer 126a. The interlayer 126a may be formed of the same material as the portion of the second conductive semiconductor layer 126 located after the electron blocking layer 126b.

The insertion layer 126a may be formed while maintaining the shape of the one surface of the active layer 124 having a plurality of recess regions P. [ That is, since the insertion layer 126a has the same surface shape as the one surface shape of the active layer 124 having a plurality of recess regions P, It is possible to have a heath region P.

The recess region P of the insertion layer 126a indicates a structure in which the entire surface of the insertion layer 126a is not flat but recessed. The recess region P of the insertion layer 126a may be recessed in the direction of the substrate 110. The side surface of the recessed area P may exhibit a V shape having an inclination.

Since the recessed region P of the intercalation layer 126a is located corresponding to the recessed region P of the active layer 124, the intercalation layer 126a is grown under growth conditions similar to the growth conditions of the active layer 124 A recessed region P can be formed.

As an example, the intercalation layer 126a may have a thickness T ₁ of several tens of angstroms to several hundreds of angstroms. Since the insertion layer 126a is formed while maintaining the shape of the recess region P of the active layer 124, the insertion layer 126a can be formed to have a thin thickness T ₁ so as not to cover the recess region P of the active layer 124 have.

The electron blocking layer 126b fills the recessed region P of the insertion layer 126a while being positioned on the upper side of the insertion layer 126a. Therefore, the electron blocking layer 126b can be flat without having a recessed region on the side opposite to the side in contact with the insertion layer 126a.

Since the electron blocking layer 126b is made of a material having a relatively high resistance, the electron blocking layer 126b material located in the recess region P of the intercalation layer 126a forms a recessed region P It is possible to prevent leakage of current due to a defect such as dislocation D.

2, a high resistance material is placed in the recessed region P of the first conductive type semiconductor layer 122 and the recessed region P of the inserted layer 126a to form a defect The reliability of the light emitting device can be improved by blocking the current flowing to the region and inducing the current flow C to the high quality region deviating from the defective region. Particularly, a high-resistance current flow path (C) is formed by forming a high-resistance region in both the first conductivity type semiconductor layer 122 and the second conductivity type semiconductor layer 126 which are upper and lower portions of the light- can do.

3 is a side sectional view of the light emitting device according to the second embodiment. The contents overlapping with the above embodiments will not be described again, and the differences will be mainly described below.

Referring to FIG. 3, the light emitting device 100B according to the second embodiment includes a first conductive semiconductor layer 122, a second conductive semiconductor layer 126, and the first conductive semiconductor layer 122, And an active layer 124 between the second conductivity type semiconductor layers 126.

The first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be combined to form the light emitting structure 120.

The light emitting structure 120 may be supported by a substrate 110 and the substrate 110 may be a growth substrate of the light emitting structure 120.

The first conductive semiconductor layer 122 includes a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, And a third layer 122-3 located on one side of the first layer 122-1 that is not in contact with the second layer 122-2.

The first layer 122-1 may be an undoped semiconductor layer or a semiconductor layer that is less doped than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 &lt; ¹⁷ &gt;

In the first conductivity type semiconductor layer 122, a plurality of recess regions P exist. Referring to FIG. 3, the first layer 122-1 may have a plurality of recessed regions P at the interface with the second layer 122-2. The recessed region P of the first conductive type semiconductor layer 122 indicates a structure in which the entire surface of the first layer 122-1 is not flat but recessed. The recess region P of the first conductivity type semiconductor layer 122 may be recessed in the direction of the substrate 110. The side surface of the recessed area P may exhibit a V shape having an inclination.

The recess region P of the first conductivity type semiconductor layer 122 may be formed by adjusting the growth temperature, growth rate, etc. of the first layer 122-1. The recess region P of the first conductivity type semiconductor layer 122 is formed mainly at a position where the potential D generated by the lattice mismatching occurs at the interface between the substrate 110 and the light emitting structure 120.

A filling material 122a is located in the recess region P of the first conductivity type semiconductor layer 122. [ The fill material 122a may be a high resistivity material, for example, an AlGaN or InAlGaN material.

The filling material 122a located in the recess region P of the first conductivity type semiconductor layer 122 has a high resistance so that current is leaked due to defects such as the recess region P and the potential D Can be prevented.

In the second embodiment, the reason why the first layer 122-1 is formed of an unshown semiconductor layer or a lightly doped semiconductor layer is that by inducing rough surface growth to sufficiently secure the size of the recessed region P In order to effectively fill the filling material 122a for bypassing the current flow in the recess region P. [ In addition, the dopant is injected well by the same defect as the potential (D) at the time of doping the first conductive type semiconductor layer 122. If the resistance is lowered by the dopant, it may cause a leakage current. ) Is formed of an inactive semiconductor layer or a lightly doped semiconductor layer, the resistance of the defective region can be increased to effectively block the flow of the leakage current.

As an example, the first layer 122-1 may be formed with a thickness (T ₂ ) of 0.05 um to 0.4 um. If the thickness of the first layer 122-1 is too small, the effect of the embodiment that the leakage current is blocked by increasing the resistance may be insufficient. If the thickness of the first layer 122-1 is too thick, The crystalline quality is lowered and the low current characteristics can be intensified.

The second layer 122-2 and the third layer 122-3 may be made of the same material or may include different materials.

The second layer 122-2 is located between the first layer 122-1 and the active layer 124. The first layer 122-1 may be grown on the second layer 122-2 on the first layer 122-1 because the first layer 122-1 may be grown under the conditions that cause the recessed region P, To improve the crystallinity quality.

If the filling material 122a does not completely fill the recessed region P of the first layer 122-1, a portion of the recessed region P of the first layer 122-1 is covered with the second layer 122 -2) may be filled.

The active layer 124 and the second conductivity type semiconductor layer 126 are the same as those described in connection with the first embodiment, and a detailed description thereof will be omitted.

4 is a view showing an example of a light emitting device having a horizontal structure to which the embodiments described above are applied. The contents overlapping with the above-mentioned contents will not be described again, and the following description will focus on the differences.

Referring to FIG. 4, the light emitting device 100 having a horizontal structure according to the first or second embodiment includes a first conductive semiconductor layer 122, an active layer 124, and a second conductive semiconductor layer 126, A first electrode 130 on the first conductive type semiconductor layer 122 and a second electrode 140 on the second conductive type semiconductor layer 126. The light emitting structure 120 includes a light emitting structure 120,

The horizontal structure means a structure in which the first electrode 130 and the second electrode 140 are formed in the same direction in the light emitting structure 120. Referring to FIG. 4, a first electrode 130 and a second electrode 140 are formed in an upper direction of the light emitting structure 120.

Although the structure of the first conductivity type semiconductor layer 122 as described in the second embodiment is shown in FIG. 4 as an example, the structure of the first conductivity type semiconductor layer 122 as described in the first embodiment Is also applicable.

Referring to FIG. 4, the first conductive semiconductor layer 122 includes a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, And a third layer 122-3 located on one side of the first layer 122-1 that does not contact the second layer 122-2 in the first layer 122-1.

The first layer 122-1 may be an undoped semiconductor layer or a semiconductor layer that is less doped than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 &lt; ¹⁷ &gt;

The light emitting structure 120 is supported by the substrate 110, and the substrate 110 is as described above.

The first conductive semiconductor layer 122 has the exposed surface S exposed by selectively etching at least a portion of the second conductive semiconductor layer 126 and the active layer 124. The first electrode 130 is located on the exposed surface S and the second electrode 140 is located on the un-etched second conductive semiconductor layer 126.

The first electrode 130 and the second electrode 140 may be formed of at least one selected from the group consisting of Mo, Cr, Ni, Au, Al, Ti, Pt, Layer structure including at least one of tungsten (V), tungsten (W), lead (Pd), copper (Cu), rhodium (Rh) or iridium (Ir).

When the second embodiment is applied, the first electrode 130 electrically connected to the first conductive type semiconductor layer 122 may be in contact with the third layer 122-3.

The third layer 122-3 is grown prior to the first layer 122-1, which has better electrical conductivity than the first layer 122-1 and has a low contact resistance and can be degraded in relative crystallinity, The first electrode 130 can be formed by forming the exposed surface S on the third layer 122-3 in the selective etching process of the light emitting structure 120. [

The conductive layer 150 may be formed on the second conductive semiconductor layer 126 before the second electrode 140 is formed.

A part of the conductive layer 150 may be opened to expose the second conductive semiconductor layer 126 so that the second conductive semiconductor layer 126 and the second electrode 140 can be in contact with each other.

Alternatively, as shown in FIG. 4, the second conductive semiconductor layer 126 and the second electrode 140 may be electrically connected to each other with the conductive layer 150 therebetween.

The conductive layer 150 may be formed of a layer or a plurality of patterns for improving electrical characteristics of the second conductivity type semiconductor layer 126 and improving electrical contact with the second electrode 140. The conductive layer 150 may be formed of a transparent electrode layer having transparency.

For example, the conductive layer 150 may include a transparent conductive layer and a metal. For example, the conductive layer 150 may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO) ), IGZO (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON TiO 2, Ag, Ni, Cr, Ti, Al, Rh, ZnO, IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf.

5 is a view illustrating an example of a vertical-type light emitting device to which the embodiments described above are applied. The contents overlapping with the above-mentioned contents will not be described again, and the following description will focus on the differences.

5, the vertical light emitting device 100 according to the first or second embodiment includes a first conductive semiconductor layer 122, an active layer 124, and a second conductive semiconductor layer 126, A first electrode 130 on the first conductive type semiconductor layer 122 and a second electrode 140 on the second conductive type semiconductor layer 126. The light emitting structure 120 includes a light emitting structure 120,

The vertical structure means a structure in which the first electrode 130 and the second electrode layer 160 are formed in different directions in the light emitting device 100. Referring to FIG. 5, a first electrode 130 is formed in an upper direction of the light emitting structure 120, and a second electrode layer 160 is formed in a lower direction of the light emitting structure 120.

Although the structure of the first conductivity type semiconductor layer 122 as described in the second embodiment is shown in FIG. 5 as an example, the structure of the first conductivity type semiconductor layer 122 as described in the first embodiment Is also applicable.

Referring to FIG. 5, the first conductive semiconductor layer 122 includes a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, And a third layer 122-3 located on one side of the first layer 122-1 that does not contact the second layer 122-2 in the first layer 122-1.

The first layer 122-1 may be an undoped semiconductor layer or a semiconductor layer that is less doped than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 &lt; ¹⁷ &gt;

The first electrode 130 is located on the upper surface of the light emitting structure 120 or the first conductive semiconductor layer 122 and the lower surface of the light emitting structure 120, The second electrode layer 160 is located.

As an example, the second electrode layer 160 may include at least one of a conductive layer 160a and a reflective layer 160b.

The conductive layer 160a is provided to improve the electrical characteristics of the second conductivity type semiconductor layer 126 and may be in contact with the second conductivity type semiconductor layer 126. [

The conductive layer 160a may be formed of a transparent electrode layer or an opaque electrode layer. For example, the conductive layer 160a may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO) , IGZO (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON ), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, , Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf.

The reflective layer 160b may improve the external quantum efficiency of the light emitting device 100 by reducing the amount of light that is extinguished inside the light emitting device 100 by reflecting the light generated in the active layer 124. [

The reflective layer 160b may include at least one of Ag, Ti, Ni, Cr, and AgCu, but is not limited thereto.

When the reflective layer 160b is formed of a material that makes an ohmic contact with the second conductive type semiconductor layer 126, the conductive layer 160a may not be formed separately.

The light emitting structure 120 is supported by the supporting substrate 180.

The supporting substrate 180 is formed of a material having high electrical conductivity and high thermal conductivity. For example, the supporting substrate 180 may be a base substrate having a predetermined thickness such as molybdenum (Mo), silicon (Si), tungsten (W) (Au), a copper alloy (Cu Alloy), a nickel (Ni), a copper-tungsten (Cu-Al) alloy, or a material selected from the group consisting of copper (Cu) W), carrier wafer (for example, a GaN, Si, Ge, GaAs, ZnO, SiGe, SiC, SiGe, Ga 2 O 3 , etc.) or a conductive sheet or the like may optionally be included.

The light emitting structure 120 may be bonded to the supporting substrate 120 by a bonding layer 185. At this time, the second electrode layer 160 located under the light emitting structure 120 may be in contact with the bonding layer 185.

The bonding layer 185 may include a barrier metal or a bonding metal and may include at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, It is not limited thereto.

The bonding layer 185 may include a diffusion preventing layer (not shown) adjacent to the light emitting structure 120 to prevent the metal or the like used in the bonding layer 185 from diffusing into the upper light emitting structure 120 have.

The channel layer 170 may be located around the bottom of the light emitting structure 120. The channel layer 170 protects the light emitting structure 120 and can function as a stop layer for etching during the isolation process during the manufacturing process of the light emitting device.

The channel layer 170 may be formed in a pattern such as a loop shape, an annular shape, or a frame shape around the bottom of the second conductivity type semiconductor layer 126 of the light emitting structure 120.

The channel layer 170 prevents a short circuit from occurring between the outer walls of the light emitting structure even when exposed to moisture, thereby providing a light emitting device resistant to high humidity.

The channel layer 170 may be formed of a material selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IGTO), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), SiO2, SiOx, SiOxNy, Si3N4, Al2O3 and TiO2 But the present invention is not limited thereto.

The passivation layer 190 may be located on at least a portion of the light emitting structure 120, the side surface, and the channel layer 170 exposed to the outside of the light emitting structure 120.

The passivation layer 190 may be made of an oxide or a nitride to protect the light emitting structure 120. As an example, the passivation layer 240 may comprise, but is not limited to, a silicon oxide (SiO ₂ ) layer, a silicon nitride layer, an oxynitride layer, or an aluminum oxide layer.

The roughness pattern R may be formed on the first conductivity type semiconductor layer 122 of the light emitting structure 120. [ The roughness pattern R may be located on the passivation layer 190 when the passivation layer 190 is present on the upper side of the light emitting structure 120. The roughness pattern R can be formed by performing an etching process using a PEC (Photo Enhanced Chemical) etching method or a mask pattern. The roughness pattern R is for increasing the external extraction efficiency of light generated in the active layer 124, and may have a regular period or an irregular period.

6 to 9 are views schematically showing an embodiment of a manufacturing process of a light emitting device. 6 to 9 illustrate the manufacturing process of the light emitting device according to the second embodiment described above as an example, but the present invention is not limited thereto.

First, referring to FIG. 6, a buffer layer 115 is grown on a substrate 110. The buffer layer 115 is intended to alleviate the lattice mismatch between the semiconductor layers to be grown later and the substrate 110. The buffer layer 115, the first conductivity type semiconductor layer 122, and the semiconductor layers thereafter may be formed by, for example, MOCVD (Chemical Organic Chemical Vapor Deposition), CVD (Chemical Vapor Deposition) May be grown by a method such as chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE) Not limited.

The third layer 122-3 and the first layer 122-2 of the first conductivity type semiconductor layer 122 are grown first. The first layer 122-1 may be grown to an unselected semiconductor layer, or may be doped to a lower concentration than the third layer 122-3 after being grown to the unshown semiconductor layer.

The first layer 122-1 induces rough surface growth by promoting vertical growth at a low temperature of about 600-950 ° C. The recessed region P can be formed on the surface of the first layer 122-1 by inducing rough surface growth.

When the growth of the first layer 122-1 is completed, the filling material 122a is grown in the recess region P on the surface of the first layer 122-1. The fill material 122a induces horizontal growth at pressures below about 200 torr so that the fill material 122a can be pumped into the recessed area P rather than the flat surface of the first layer 122-1.

The filling material 122a may include AlGaN or InAlGaN material, and the relative resistance may be high, so that the content of Al may be 20% or more.

7, after the filling material 122a is grown in the recessed region P of the first layer 122-1, the second layer 122-2 is grown, and on the active layer 122-1, (124).

Since the active layer 124 has a large content of In having a large crystal lattice and grows at a relatively low temperature, a plurality of recess regions P may be formed on the surface.

The insertion layer 126a of the second conductive type semiconductor layer 126 is first grown on the active layer 124 on which the recess region P is formed.

Since the insertion layer 126a is grown while maintaining the surface shape of the active layer 124 in which the recessed region P is formed, the insertion layer 126a is also provided with a plurality of A recessed region P is formed. The insertion layer 126a may be thinly grown to a thickness of several tens of angstroms to several hundreds of angstroms so as to maintain the shape of the recessed region P of the active layer 124 as it is.

Referring to FIG. 8, the growth of the electron blocking layer 126b and the subsequent portions of the second conductivity type semiconductor layer 126 on the insertion layer 126a is completed.

The electron blocking layer 126b is flattened on the upper surface while filling the recessed region P of the inserting layer 126a. The portion of the electron blocking layer 126b located in the recess region P of the intercalation layer 126a exhibits a relatively high resistance and the content of Al in the electron blocking layer 126b may be about 10 to 25%.

After the growth of the light emitting structure 120 is completed, a light emitting device having a horizontal structure as shown in FIG. 4 can be manufactured through a selective etching process.

Alternatively, the light emitting device having the vertical structure as shown in FIG. 5 can be manufactured through the process shown in FIG.

Referring to FIG. 9, after the second conductive semiconductor layer 126 is grown as shown in FIG. 8, a second electrode layer 160 is formed. Then, the channel layer 170 is formed by removing a portion of the second electrode layer 160 in an area to be isolated by the individual light emitting structure.

Thereafter, the supporting substrate 180 is disposed on the second electrode layer 160. The supporting substrate 180 may be formed by a bonding method, a plating method, or a vapor deposition method. When the supporting substrate 180 is formed by the bonding method, the second electrode layer 160 and the supporting substrate 180 may be bonded through the bonding layer 185.

Then, as shown in Fig. 9, the substrate 110 is separated. The substrate 110 may be separated by a laser lift off (LLO) method using an excimer laser or the like, or may be a dry or wet etching method.

When excimer laser light having a wavelength in a certain region in the direction of the substrate 110 is focused and irradiated using the laser lift-off method, heat energy is applied to the interface between the substrate 110 and the light emitting structure 120 The interface is separated into gallium and nitrogen molecules, and the substrate 110 is instantaneously separated from the laser light passing portion. After the substrate 110 is removed, the buffer layer 115 may be removed through a separate etching process.

Thereafter, the vertical light emitting device as shown in Fig. 5 can be manufactured by the isolation etching.

The fabrication process of the above-described light emitting device is merely an example, and the order and method of the specific fabrication process may be changed according to the embodiment.

10 is a view showing an embodiment of a light emitting device package including the light emitting device according to the embodiments.

The light emitting device package 300 according to an exemplary embodiment includes a body 310, a first lead frame 321 and a second lead frame 322 disposed on the body 310, Emitting device 100 according to the above-described embodiments electrically connected to the first lead frame 321 and the second lead frame 322, and a molding part 340 formed in the cavity. A cavity may be formed in the body 310.

The body 310 may include a silicon material, a synthetic resin material, or a metal material. When the body 310 is made of a conductive material such as a metal material, an insulating layer is coated on the surface of the body 310 to prevent an electrical short between the first and second lead frames 321 and 322 .

The first lead frame 321 and the second lead frame 322 are electrically separated from each other and supply current to the light emitting device 100. The first lead frame 321 and the second lead frame 322 may increase the light efficiency by reflecting the light generated from the light emitting device 100. The heat generated from the light emitting device 100 To the outside.

The light emitting device 100 may be disposed on the body 310 or may be disposed on the first lead frame 321 or the second lead frame 322. The first lead frame 321 and the light emitting element 100 are directly energized and the second lead frame 322 and the light emitting element 100 are connected to each other through the wire 330 in this embodiment. The light emitting device 100 may be connected to the lead frames 321 and 322 by a flip chip method or a die bonding method in addition to the wire bonding method.

The molding part 340 may surround and protect the light emitting device 100. In addition, the phosphor 350 may be included on the molding part 340 to change the wavelength of light emitted from the light emitting device 100.

The phosphor 350 may include a garnet-based phosphor, a silicate-based phosphor, a nitride-based phosphor, or an oxynitride-based phosphor.

For example, the garnet-base phosphor is _{YAG (Y 3 Al 5 O 12} : Ce 3 +) or TAG: may be a _{(Tb 3 Al 5 O 12 Ce} 3 +), wherein the silicate-based phosphor is (Sr, Ba, Mg, Ca) ₂ SiO ₄ : Eu ^{2 +} , and the nitride phosphor may be CaAlSiN ₃ : Eu ^{2 +} containing SiN, and the oxynitride phosphor may be Si _{6 - x Al x O x N 8 -x:} Eu 2 + (0 <x <6) can be.

The light of the first wavelength range emitted from the light emitting device 100 is excited by the phosphor 350 to be converted into the light of the second wavelength range and the light of the second wavelength range passes through the lens (not shown) The light path can be changed.

A plurality of light emitting device packages according to embodiments may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, and the like may be disposed on the light path of the light emitting device package. Such a light emitting device package, a substrate, and an optical member can function as a light unit. Still another embodiment may be implemented as a display device, an indicating device, a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, for example, the lighting system may include a lamp, a streetlight .

Hereinafter, the headlamp and the backlight unit will be described as an embodiment of the lighting system in which the above-described light emitting device or the light emitting device package is disposed.

11 is a view illustrating an embodiment of a headlamp in which a light emitting device or a light emitting device package according to embodiments is disposed.

11, the light emitted from the light emitting module 710 having the light emitting device or the light emitting device package according to the embodiments is reflected by the reflector 720 and the shade 730 and then transmitted through the lens 740 It can be directed toward the front of the vehicle body.

The light emitting module 710 may include a plurality of light emitting devices on a circuit board, but the present invention is not limited thereto.

12 is a diagram illustrating a display device in which a light emitting device package according to an embodiment is disposed.

12, the display device 800 according to the embodiment includes a light emitting module 830 and 835, a reflection plate 820 on the bottom cover 810, and a reflection plate 820 disposed in front of the reflection plate 820, A first prism sheet 850 and a second prism sheet 860 disposed in front of the light guide plate 840 and a second prism sheet 860 disposed in front of the light guide plate 840, A panel 870 disposed in front of the panel 870 and a color filter 880 disposed in front of the panel 870.

The light emitting module includes the above-described light emitting device package 835 on the circuit board 830. Here, a PCB or the like may be used for the circuit board 830, and the light emitting device package 835 is as described with reference to FIG.

The bottom cover 810 may house the components in the display device 800. The reflection plate 820 may be formed as a separate component as shown in the drawing, or may be formed to be coated on the rear surface of the light guide plate 840 or on the front surface of the bottom cover 810 with a highly reflective material Do.

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 840 scatters light emitted from the light emitting device package module so that the light is uniformly distributed over the entire screen area of the LCD. Accordingly, the light guide plate 830 is made of a material having a good refractive index and transmittance. The light guide plate 830 may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), or polyethylene (PE). An air guide system is also available in which the light guide plate is omitted and light is transmitted in a space above the reflective sheet 820.

The first prism sheet 850 is formed on one side of the support film with a transparent and elastic polymeric material, and the polymer may have a prism layer in which a plurality of steric structures are repeatedly formed. As shown in the drawings, the plurality of patterns may be repeatedly provided with a stripe pattern.

In the second prism sheet 860, the edges and the valleys on one surface of the support film may be perpendicular to the edges and the valleys on one surface of the support film in the first prism sheet 850. This is to uniformly distribute the light transmitted from the light emitting module and the reflective sheet in all directions of the panel 870.

In the present embodiment, the first prism sheet 850 and the second prism sheet 860 form an optical sheet, which may be formed of other combinations, for example, a microlens array or a diffusion sheet and a microlens array Or a combination of one prism sheet and a microlens array, or the like.

A liquid crystal display (LCD) panel may be disposed on the panel 870. In addition to the liquid crystal display panel 860, other types of display devices requiring a light source may be provided.

In the panel 870, the liquid crystal is positioned between the glass bodies, and the polarizing plate is placed on both glass bodies to utilize the polarization of light. Here, the liquid crystal has an intermediate property between a liquid and a solid, and liquid crystals, which are organic molecules having fluidity like a liquid, are regularly arranged like crystals. The liquid crystal has a structure in which the molecular arrangement is changed by an external electric field And displays an image.

A liquid crystal display panel used in a display device is an active matrix type, and a transistor is used as a switch for controlling a voltage supplied to each pixel.

A color filter 880 is provided on the front surface of the panel 870 so that light projected from the panel 870 transmits only red, green, and blue light for each pixel.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the equivalents of the claims, as well as the claims.

100: light emitting device 110: substrate
120: light emitting structure 122: first conductivity type semiconductor layer
122-1: first layer 122-2: second layer
122-3: third layer 122a: filling material
124: active layer 126: second conductivity type semiconductor layer
126a: insertion layer 126b: electron blocking layer
160: second electrode layer 170: channel layer
180: support substrate 190: passivation layer
310: package body 321, 322: first and second lead frames
330: wire 340: molding part
350: phosphor 710: light emitting module
720: Reflector 730: Shade
800: Display device 810: Bottom cover
820: reflector 840: light guide plate
850: first prism sheet 860: second prism sheet
870: Panel 880: Color filter

Claims (13)

A first conductive semiconductor layer;
A second conductivity type semiconductor layer; And
And an active layer between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer,
Wherein the first conductive semiconductor layer includes a first layer and a second layer between the first layer and the active layer, the first layer has a plurality of recessed regions at an interface with the second layer, The filling material is located in the recessed region,
Wherein the active layer has a plurality of recessed regions on one surface adjacent to the second conductivity type semiconductor layer,
Wherein the second conductivity type semiconductor layer includes an insertion layer positioned adjacent to the active layer and an electron blocking layer on the insertion layer. The method according to claim 1,
Wherein the insertion layer has a plurality of recessed regions corresponding to a plurality of recessed regions included in one surface of the active layer. 3. The method of claim 2,
Wherein the electron blocking layer fills a plurality of recessed regions of the inserting layer. The method according to claim 1,
And the electron blocking layer has a flat surface opposite to the surface contacting the insertion layer. The method according to claim 1,
Wherein the insertion layer has the same surface shape as the shape of one surface of the active layer having a plurality of recessed regions. The method according to claim 1,
Wherein the first conductive semiconductor layer further comprises a third layer located on one side of the first layer that is not in contact with the second layer. The method according to claim 6,
A first electrode electrically connected to the first conductive semiconductor layer, and a second electrode electrically connected to the second conductive semiconductor layer,
And the first electrode contacts the third layer. The method according to claim 6,
Wherein the first layer is an undoped semiconductor layer or a semiconductor layer that is lightly doped to a lower concentration than the second layer or the third layer. The method according to claim 1,
Wherein the electron blocking layer has a single layer or a super lattice structure. The method according to claim 1,
Wherein the inserting layer has a thickness of several tens of angstroms to several hundreds of angstroms. The method according to claim 6,
Wherein the first layer has a thickness of 0.05 um to 0.4 um. The method according to claim 1,
Wherein the filling material comprises AlGaN or InAlGaN material. Board; And
And a light emitting structure disposed on the substrate and including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer,
Wherein the first conductive semiconductor layer has a plurality of recessed regions which are embedded in the substrate in the direction of the substrate, the filling material is located in the recessed region,
Wherein the active layer has a plurality of recessed regions recessed toward the substrate on one surface adjacent to the second conductive type semiconductor layer,
Wherein the second conductivity type semiconductor layer includes an insulator layer disposed in contact with the active layer and an electron blocking layer on the insulator layer, the insulator layer having a plurality of recessed regions, .

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