KR102050052B1 - Light emitting device - Google Patents

Abstract

In one embodiment, a light emitting device includes: a first conductive semiconductor layer; A second conductivity type semiconductor layer; And an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein the first conductive semiconductor layer includes a first layer and a second layer between the first layer and the active layer. The first layer has a plurality of recess regions at an interface with the second layer, a filling material is located in the recess region, and the active layer has a plurality of active regions on one surface adjacent to the second conductive semiconductor layer. The second conductive semiconductor layer has a recess region and includes an insertion layer positioned adjacent to the active layer and an electron blocking layer on the insertion layer.

Description

Light Emitting Device {LIGHT EMITTING DEVICE}

The embodiment relates to a light emitting device.

Light emitting devices such as light emitting diodes or laser diodes using semiconductors of Group 3-5 or 2-6 compound semiconductor materials of semiconductors have various colors such as red, green, blue, and ultraviolet rays due to the development of thin film growth technology and device materials. It is possible to realize efficient white light by using fluorescent materials or combining colors, and it has low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent and incandescent lamps. Has an advantage.

Therefore, a white light emitting device which can replace a LED backlight, a fluorescent lamp or an incandescent lamp, which replaces a cold cathode tube (CCFL) constituting a backlight of a transmission module of an optical communication means and a liquid crystal display (LCD) display device. Applications are expanding to diode lighting devices, automotive headlights and traffic lights.

1 is a side cross-sectional view briefly showing a conventional light emitting device.

Referring to FIG. 1, in the conventional light emitting device 1, an n-GaN layer 12, an active layer 14, and a p-GaN layer 16 are positioned on a sapphire substrate 10, and an n-GaN layer ( Electrons injected in 12) and holes injected in the p-GaN layer 16 emit light by recombination in the active layer 14.

In the nitride semiconductor light emitting device, since there is no commercial substrate having the same crystal structure and lattice matching with a nitride semiconductor material such as GaN or the like, a sapphire substrate 10 that is an insulating substrate is generally used. At this time, a difference in lattice constant and coefficient of thermal expansion occurs between the sapphire substrate 10 and the GaN layer grown on the sapphire substrate 10, so that lattice mismatch occurs and defects such as dislocations (D) are generated in the GaN layer. Or a pit P in which the GaN layer is pitted. These defects cause leakage current and cause deterioration of the reliability of the light emitting element 1.

The embodiment aims to improve the reliability of the light emitting device by preventing leakage current.

In one embodiment, a light emitting device includes: a first conductive semiconductor layer; A second conductivity type semiconductor layer; And an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein the first conductive semiconductor layer includes a first layer and a second layer between the first layer and the active layer. The first layer has a plurality of recess regions at an interface with the second layer, a filling material is located in the recess region, and the active layer has a plurality of active regions on one surface adjacent to the second conductive semiconductor layer. The second conductive semiconductor layer has a recess region and includes an insertion layer positioned adjacent to the active layer and an electron blocking layer on the insertion layer.

The insertion layer may have a plurality of recess regions respectively corresponding to the plurality of recess regions included in one surface of the active layer.

The electron blocking layer may fill the plurality of recess regions of the insertion layer.

The electron blocking layer may have a flat surface opposite to the surface of the electron blocking layer.

The insertion layer may have the same surface shape as the shape of one surface of the active layer having a plurality of recess regions.

The first conductivity type semiconductor layer may further include a third layer positioned on one surface of the first layer that is not in contact with the second layer.

The display device may further include a first electrode electrically connected to the first conductive semiconductor layer and a second electrode electrically connected to the second conductive semiconductor layer, wherein the first electrode may contact the third layer.

The first layer may be an undoped semiconductor layer, or may be a lower-doped semiconductor layer than the second layer or the third layer.

The electron blocking layer may be formed of a single layer or a superlattice structure.

The insertion layer may have a thickness of several tens of microseconds to several hundred microns.

The first layer may have a thickness of 0.05um to 0.4um.

The filler material may comprise an AlGaN or InAlGaN material.

A light emitting device according to another embodiment includes a substrate; And a light emitting structure on the substrate, the light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, wherein the first conductive semiconductor layer is recessed in the direction of the substrate. A recessed region, a filling material is located in the recessed region, the active layer has a plurality of recessed regions recessed in the direction of the substrate on one surface adjacent to the second conductive semiconductor layer, and the second conductive type The semiconductor layer may include an insertion layer positioned to contact the active layer and an electron blocking layer on the insertion layer, and the insertion layer may be formed while maintaining a shape of one surface of the active layer having a plurality of recess regions.

According to the embodiment, it is possible to induce the flow of current to a high quality region free of defects, thereby preventing leakage current and improving reliability of the light emitting device.

1 is a side cross-sectional view schematically showing a conventional light emitting device.
2 is a side sectional view of a light emitting device according to the first embodiment;
3 is a side sectional view of a light emitting device according to a second embodiment;
4 is a view showing an example of a light emitting device having a horizontal structure to which the above-described embodiments are applied.
5 is a view showing an example of a light emitting device having a vertical structure to which the above-described embodiments are applied.
6 to 9 schematically illustrate an embodiment of a manufacturing process of the light emitting device.
10 is a view showing an embodiment of a light emitting device package including a light emitting device according to the embodiment.
FIG. 11 is a view illustrating an embodiment of a headlamp in which a light emitting device or a light emitting device package is disposed according to embodiments.
12 is a diagram illustrating a display device in which a light emitting device package is disposed according to an embodiment.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described.

In the description of the embodiment according to the present invention, when described as being formed on the "on or under" of each element, the above (on) or below (on) or under) includes both two elements being directly contacted with each other or one or more other elements are formed indirectly between the two elements. In addition, when expressed as “on” or “under”, it may include the meaning of the downward direction as well as the upward direction based on one element.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

2 is a side cross-sectional view of a light emitting device according to the first embodiment.

Referring to FIG. 2, the light emitting device 100A according to the first embodiment may include a first conductive semiconductor layer 122, a second conductive semiconductor layer 126, and the first conductive semiconductor layer 122. An active layer 124 between the second conductive semiconductor layer 126 is included.

The first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be collectively referred to as a light emitting structure 120.

The light emitting device 100 includes a plurality of compound semiconductor layers, for example, a light emitting diode (LED) using a semiconductor layer of a Group 3-Group 5 or Group 2-Group 6 element, the LED is blue, green or red, etc. It may be a colored LED emitting the same light, or it may be a white LED or a UV LED. The emission light of the LED may be implemented using various semiconductors, but is not limited thereto.

The light emitting structure 120 may include, for example, Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), and molecular beam growth. It may be formed using a method such as Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), but is not limited thereto.

The light emitting structure 120 is supported by the substrate 110, and the substrate 110 may be a growth substrate of the light emitting structure 120.

The substrate 110 may be formed of a material suitable for growing a semiconductor material and a material having excellent thermal conductivity. The substrate 110 may use, for example, at least one of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga ₂ 0 ₃ . Impurities on the surface may be removed by wet cleaning the substrate 110.

The buffer layer 115 may be positioned between the light emitting structure 120 and the substrate 110. The buffer layer 115 is intended to mitigate the difference in lattice mismatch and thermal expansion coefficient of the material of the light emitting structure 120 and the substrate 110. The material of the buffer layer 115 may be formed of at least one of Group III-V compound semiconductors, for example, GaN, InN, AlN, InGaN, InAlGaN, and AlInN.

An undoped semiconductor layer (not shown) may be positioned between the substrate 110 and the first conductivity type semiconductor layer 122. The undoped semiconductor layer is a layer formed to improve the crystallinity of the first conductivity type semiconductor layer 122, except that the n-type dopant is not doped and thus has lower electrical conductivity than that of the first conductivity type semiconductor layer. It may be the same as the first conductivity type semiconductor layer 122.

The first conductivity-type semiconductor layer 122 may be formed of a semiconductor compound, for example, may be formed of a compound semiconductor, such as Group 3-5 or Group 2-6. In addition, the first conductivity type dopant may be doped. When the first conductivity type semiconductor layer 122 is an n type semiconductor layer, the first conductivity type dopant may include Si, Ge, Sn, Se, Te, and the like as an n type dopant, but is not limited thereto. When the first conductivity type semiconductor layer 122 is a p-type semiconductor layer, the first conductivity type dopant may include, but is not limited to, Mg, Zn, Ca, Sr, and Ba as a p-type dopant.

The first conductivity-type semiconductor layer 122 includes a semiconductor material having a composition formula of Al _x In _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). can do. The first conductive semiconductor layer 122 may be formed of any one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, InP.

The second conductivity-type semiconductor layer 126 may be formed of a semiconductor compound, and for example, may be formed of a compound semiconductor, such as Groups 3-5 or 2-6. In addition, the second conductivity type dopant may be doped. A second conductive semiconductor layer 126 is, for example, having a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It may include a semiconductor material. When the second conductivity-type semiconductor layer 126 is a p-type semiconductor layer, the second conductivity-type dopant may be a p-type dopant and may include Mg, Zn, Ca, Sr, and Ba, but is not limited thereto. When the second conductivity-type semiconductor layer 126 is an n-type semiconductor layer, the second conductivity-type dopant may include Si, Ge, Sn, Se, Te, and the like as an n-type dopant, but is not limited thereto.

Hereinafter, the case where the first conductive semiconductor layer 122 is an n-type semiconductor layer and the second conductive semiconductor layer 126 is a p-type semiconductor layer will be described as an example.

On the second conductive semiconductor layer 126, a semiconductor having a polarity opposite to that of the second conductive type, for example, an n-type semiconductor layer (not shown) is formed when the second conductive semiconductor layer 126 is a p-type semiconductor layer. Can be formed. Accordingly, the light emitting structure may be implemented as any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

The active layer 124 is positioned between the first conductive semiconductor layer 122 and the second conductive semiconductor layer 126.

The active layer 124 is a layer where electrons and holes meet each other to emit light having energy determined by an energy band inherent in the active layer (light emitting layer) material. When the first conductivity-type semiconductor layer 122 is an n-type semiconductor layer and the second conductivity-type semiconductor layer 126 is a p-type semiconductor layer, electrons are injected from the first conductivity-type semiconductor layer 122 and the second Holes may be injected from the conductive semiconductor layer 126.

The active layer 124 may be formed of at least one of a single well structure, a multiple well structure, a quantum-wire structure, or a quantum dot structure. For example, the active layer 124 may be injected with trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) to form a multi-quantum well structure. It is not limited to this.

When the active layer 124 has a multi-well structure, it includes a plurality of well layers and barrier layers alternately positioned, and the well layer / barrier layer of the active layer 124 may be InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP may be formed as one or more pair structures, but is not limited thereto. The well layer may be formed of a material having a bandgap smaller than the bandgap of the barrier layer.

The first conductive semiconductor layer 122 includes a first layer 122-1 and a second layer 122-2 between the first layer 122-1 and the active layer 124. The first layer 122-1 and the second layer 122-2 may be made of the same material, or may include different materials.

A plurality of recess regions P is present in the first conductivity type semiconductor layer 122. Referring to FIG. 2, the first layer 122-1 may have a plurality of recess regions P at an interface with the second layer 122-2. The recess region P of the first conductive semiconductor layer 122 refers to a structure in which the entire surface of the first layer 122-1 is not flat but is recessed. The recess region P of the first conductive semiconductor layer 122 may be recessed in the direction of the substrate 110. The side cross section of the recess region P may exhibit a V shape having an inclination.

The recess region P of the first conductive semiconductor layer 122 may be formed by controlling a growth temperature, a growth rate, and the like of the first layer 122-1. The recess region P of the first conductivity type semiconductor layer 122 is mainly formed at a position where a potential D generated by lattice mismatch at the interface between the substrate 110 and the light emitting structure 120 rises.

The filling material 122a is positioned in the recess region P of the first conductive semiconductor layer 122. The filling material 122a is a material having high resistance, and may include, for example, AlGaN or InAlGaN material.

Since the filling material 122a positioned in the recess region P of the first conductive semiconductor layer 122 has high resistance, current may leak due to defects such as the recess region P or the potential D. Can be prevented.

The second layer 122-2 is positioned between the first layer 122-1 and the active layer 124. Since the first layer 122-1 may be grown under a condition causing the recess region P, the crystalline quality may be degraded, and thus the second layer 122-2 may be disposed on the first layer 122-1. Can be grown to complement the crystalline quality.

When the filling material 122a does not completely fill the recess region P of the first layer 122-1, the second layer 122 is formed in a part of the recess region P of the first layer 122-1. -2) may be filled.

The active layer 124 also has a plurality of recess regions P on one surface adjacent to the second conductivity-type semiconductor layer 126. The recess region P of the active layer 124 refers to a structure in which the entire surface of the active layer 124 is not flat but is recessed. The recess region P of the active layer 124 may be recessed in the direction of the substrate 110. The side cross section of the recess region P may exhibit a V shape having an inclination.

The recess region P of the active layer 124 may be formed by adjusting a growth temperature, a growth rate, and the like of the active layer 124. The recess region P of the active layer 124 is located at a position where a potential D generated due to lattice mismatch at the interface between the substrate 110 and the light emitting structure 120 rises, or when the active layer 124 grows. The dislocation D generated by this is mainly formed at the position where it rises.

The second conductive semiconductor layer 126 is positioned on the active layer 124.

The second conductivity-type semiconductor layer 126 may include an insertion layer 126a and an electron blocking layer 126b positioned adjacent to the active layer 124. The insertion layer 126a and the electron blocking layer 126b may be doped with a second conductivity type dopant.

Since the electron blocking layer 126b has a high mobility of electrons provided from the first conductivity type semiconductor layer 122, electrons do not contribute to light emission, and the electron blocking layer 126b extends beyond the active layer 124. 126) to act as a potential barrier to prevent the escape of the leakage current.

The electron blocking layer 126b may be formed of a material having a larger energy band gap than the active layer 124, and may have a composition of In _x Al _y Ga _{1 -xy} N (0 ≦ x <y <1). The electron blocking layer 126b may be formed of a single layer or may have a superlattice structure including a plurality of pair structures of a barrier layer having a large energy band gap and a well layer having a smaller energy band gap than the barrier layer.

An insertion layer 126a is positioned between the active layer 124 and the electron blocking layer 126b.

The insertion layer 126a serves to block diffusion of the second conductivity type dopant doped into the active layer 124 into the electron blocking layer 126b. Since the second conductivity type dopant is particularly concentrated in the recess region P of the active layer 124, the luminous intensity and the low current level may be lowered. Thus, an insertion layer is formed between the active layer 124 and the electron blocking layer 126b. Positioning 126a can block diffusion of the second conductivity type dopant.

In addition, the insertion layer 126a may serve to provide holes to the active layer 124. Due to the large energy band gap of the electron blocking layer 126b, the hole injection rate into the active layer 124 may be lowered. By placing the insertion layer 126a between the active layer 124 and the electron blocking layer 126b, The hole injection efficiency may be improved, and the presence of the insertion layer 126a may improve the dopant injection efficiency of the electron blocking layer 126b. The insertion layer 126a may be formed of the same material as a portion of the second conductivity-type semiconductor layer 126 positioned after the electron blocking layer 126b.

The insertion layer 126a may be formed while maintaining the shape of one surface of the active layer 124 having the plurality of recess regions P. Referring to FIG. That is, since the insertion layer 126a has the same surface shape as that of one surface of the active layer 124 having the plurality of recess regions P, the plurality of recesses corresponds to the recess region P of the active layer 124. It may have a recess region P.

The recess region P of the insertion layer 126a refers to a structure in which the entire surface of the insertion layer 126a is not flat but is recessed. The recess region P of the insertion layer 126a may be recessed in the direction of the substrate 110. The side cross section of the recess region P may exhibit a V shape having an inclination.

Since the recess region P of the insertion layer 126a is positioned corresponding to the recess region P of the active layer 124, the growth of the insertion layer 126a is performed under growth conditions similar to those of the active layer 124. The recess region P may be formed.

As an example, the insertion layer 126a may have a thickness T ₁ of several tens of micrometers to several hundred micrometers. Since the insertion layer 126a is formed while maintaining the shape of the recess region P of the active layer 124, the insertion layer 126a may be formed to have a thin thickness T ₁ so as not to fill the recess region P of the active layer 124. have.

The electron blocking layer 126b is positioned above the insertion layer 126a and fills the recess region P of the insertion layer 126a. Therefore, the surface of the electron blocking layer 126b opposite to the surface of the electron blocking layer 126a may be flat without the recess region.

Since the electron blocking layer 126b is made of a material having a relatively high resistance, the material of the electron blocking layer 126b located in the recess region P of the insertion layer 126a is used to form the recess region P or the like. It is possible to prevent leakage of current arising from a defect such as the potential D.

Referring to FIG. 2, the effect of the embodiment is described again. A high resistance material is placed in the recess region P of the first conductivity-type semiconductor layer 122 and the recess region P of the insertion layer 126a. The reliability of the light emitting device can be improved by blocking the current flowing to the region and inducing the flow of current C to the high quality region outside the defective region. In particular, a high-resistance region is formed in both the first conductive semiconductor layer 122 and the second conductive semiconductor layer 126, which are upper and lower portions of the light emitting structure 120, thereby forming a high quality current flow path. can do.

3 is a side cross-sectional view of a light emitting device according to the second embodiment. Duplicates of the above-described embodiment will not be described again, and the following description will focus on differences.

Referring to FIG. 3, the light emitting device 100B according to the second embodiment may include a first conductive semiconductor layer 122, a second conductive semiconductor layer 126, and the first conductive semiconductor layer 122. An active layer 124 between the second conductive semiconductor layer 126 is included.

The first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be collectively referred to as a light emitting structure 120.

The light emitting structure 120 is supported by the substrate 110, and the substrate 110 may be a growth substrate of the light emitting structure 120.

The first conductive semiconductor layer 122 may include a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, and the first layer ( And a third layer 122-3 positioned on one surface of the first layer 122-1 that is not in contact with the second layer 122-2.

The first layer 122-1 may be an undoped semiconductor layer or a lower-doped semiconductor layer than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 ¹⁷ or less, but is not limited thereto.

A plurality of recess regions P is present in the first conductivity type semiconductor layer 122. Referring to FIG. 3, the first layer 122-1 may have a plurality of recess regions P at an interface with the second layer 122-2. The recess region P of the first conductive semiconductor layer 122 refers to a structure in which the entire surface of the first layer 122-1 is not flat but is recessed. The recess region P of the first conductive semiconductor layer 122 may be recessed in the direction of the substrate 110. The side cross section of the recess region P may exhibit a V shape having an inclination.

The recess region P of the first conductive semiconductor layer 122 may be formed by controlling a growth temperature, a growth rate, and the like of the first layer 122-1. The recess region P of the first conductivity type semiconductor layer 122 is mainly formed at a position where a potential D generated by lattice mismatch at the interface between the substrate 110 and the light emitting structure 120 rises.

The filling material 122a is positioned in the recess region P of the first conductive semiconductor layer 122. The filling material 122a is a material having high resistance, and may include, for example, AlGaN or InAlGaN material.

Since the filling material 122a positioned in the recess region P of the first conductive semiconductor layer 122 has high resistance, current may leak due to defects such as the recess region P or the potential D. Can be prevented.

In the second embodiment, the reason for forming the first layer 122-1 as an undoped semiconductor layer or a lightly doped semiconductor layer is to induce rough surface growth to sufficiently secure the size of the recess region P. This is to effectively fill the filling material 122a for bypassing the current flow in the recess region P. FIG. In addition, when the dopant of the first conductivity type semiconductor layer 122 is doped, the dopant is well implanted due to a defect such as a potential D. When the resistance is lowered by the dopant, the first layer 122-1 may be a cause of leakage current. ) As an undoped semiconductor layer or a lightly doped semiconductor layer, it is possible to effectively block the flow of leakage current by increasing the resistance of the defective region.

As an example, the first layer 122-1 may be formed to a thickness T _{2 of} 0.05 μm to 0.4 μm. If the thickness of the first layer 122-1 is too thin, the effect of the embodiment to block leakage current by increasing the resistance may be insignificant. If the thickness of the first layer 122-1 is too thick, rough surface growth may occur. As a result, the crystalline quality may be degraded, thereby lowering the low current characteristic.

The second layer 122-2 and the third layer 122-3 may be made of the same material or may include different materials.

The second layer 122-2 is positioned between the first layer 122-1 and the active layer 124. Since the first layer 122-1 may be grown under a condition causing the recess region P, the crystalline quality may be degraded, and thus the second layer 122-2 may be disposed on the first layer 122-1. Can be grown to complement the crystalline quality.

When the filling material 122a does not completely fill the recess region P of the first layer 122-1, the second layer 122 is formed in a part of the recess region P of the first layer 122-1. -2) may be filled.

Since the contents of the active layer 124 and the second conductivity-type semiconductor layer 126 are the same as described above with reference to the first embodiment, detailed description thereof will be omitted.

4 is a diagram illustrating an example of a light emitting device having a horizontal structure to which the above-described embodiments are applied. Duplicate content described above will not be described again, and will be described below with emphasis on differences.

Referring to FIG. 4, the light emitting device 100 having the horizontal structure to which the first or second embodiment is applied may include a first conductive semiconductor layer 122, an active layer 124, and a second conductive semiconductor layer 126. And a light emitting structure 120, a first electrode 130 on the first conductive semiconductor layer 122, and a second electrode 140 on the second conductive semiconductor layer 126.

The horizontal structure refers to a structure in which the first electrode 130 and the second electrode 140 are formed in the same direction in the light emitting structure 120. For example, referring to FIG. 4, the first electrode 130 and the second electrode 140 are formed in an upper direction of the light emitting structure 120.

As an example, the structure of the first conductive semiconductor layer 122 as described in the second embodiment is illustrated in FIG. 4, but the structure of the first conductive semiconductor layer 122 as described in the first embodiment is illustrated. Is also applicable.

Referring to FIG. 4, the first conductive semiconductor layer 122 may include a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, And a third layer 122-3 positioned on one surface of the first layer 122-1 that is not in contact with the second layer 122-2 in the first layer 122-1.

The first layer 122-1 may be an undoped semiconductor layer or a lower-doped semiconductor layer than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 ¹⁷ or less, but is not limited thereto.

The light emitting structure 120 is supported by the substrate 110, and the substrate 110 is as described above.

The first conductive semiconductor layer 122 has an exposed surface S on which at least a portion of the second conductive semiconductor layer 126 and the active layer 124 are selectively etched and exposed. The first electrode 130 is positioned on the exposed surface S, and the second electrode 140 is positioned on the second conductive semiconductor layer 126 that is not etched.

The first electrode 130 and the second electrode 140 are molybdenum (Mo), chromium (Cr), nickel (Ni), gold (Au), aluminum (Al), titanium (Ti), platinum (Pt), vanadium At least one of (V), tungsten (W), lead (Pd), copper (Cu), rhodium (Rh) or iridium (Ir) may be formed in a single layer or a multilayer structure.

When the second embodiment is applied, the first electrode 130 electrically connected to the first conductivity type semiconductor layer 122 may be in contact with the third layer 122-3.

The third layer 122-3 grows earlier than the first layer 122-1, which has better electrical conductivity than the first layer 122-1, and thus has lower contact resistance and relatively lower crystalline quality. Since the crystallinity is good, the first electrode 130 may be formed by forming the exposed surface S on the third layer 122-3 in the selective etching process of the light emitting structure 120.

The conductive layer 150 may be formed on the second conductive semiconductor layer 126 before the second electrode 140 is formed.

In some embodiments, a portion of the conductive layer 150 may be opened to expose the second conductive semiconductor layer 126 so that the second conductive semiconductor layer 126 and the second electrode 140 may contact each other.

Alternatively, as shown in FIG. 4, the second conductive semiconductor layer 126 and the second electrode 140 may be electrically connected with the conductive layer 150 interposed therebetween.

The conductive layer 150 is to improve electrical characteristics of the second conductive semiconductor layer 126 and to improve electrical contact with the second electrode 140, and may be formed in a layer or a plurality of patterns. The conductive layer 150 may be formed of a transparent electrode layer having transparency.

A transparent conductive layer and a metal may be selectively used for the conductive layer 150. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide (AZO) ), Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON (IZO Nitride), AGZO (Al-Ga) ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, may be formed including at least one of Hf, but is not limited to these materials.

5 is a view illustrating an example of a light emitting device having a vertical structure to which the above-described embodiments are applied. Duplicate content described above will not be described again, and will be described below with emphasis on differences.

Referring to FIG. 5, the light emitting device 100 having the vertical structure to which the first or second embodiment is applied may include a first conductive semiconductor layer 122, an active layer 124, and a second conductive semiconductor layer 126. And a light emitting structure 120, a first electrode 130 on the first conductive semiconductor layer 122, and a second electrode 140 on the second conductive semiconductor layer 126.

The vertical structure refers to a structure in which the first electrode 130 and the second electrode layer 160 are formed in different directions in the light emitting device 100. For example, referring to FIG. 5, the first electrode 130 is formed in the upper direction of the light emitting structure 120, and the second electrode layer 160 is formed in the lower direction of the light emitting structure 120.

As an example, FIG. 5 illustrates a structure of the first conductivity type semiconductor layer 122 as described in the second embodiment, but a structure of the first conductivity type semiconductor layer 122 as described in the first embodiment. Is also applicable.

Referring to FIG. 5, the first conductivity type semiconductor layer 122 may include a first layer 122-1, a second layer 122-2 between the first layer 122-1 and the active layer 124, And a third layer 122-3 positioned on one surface of the first layer 122-1 that is not in contact with the second layer 122-2 in the first layer 122-1.

The first layer 122-1 may be an undoped semiconductor layer or a lower-doped semiconductor layer than the second layer 122-2 or the third layer 122-3. When the first layer 122-1 is a lightly doped semiconductor layer, the doping concentration may be 5 * 10 ¹⁷ or less, but is not limited thereto.

The first electrode 130 is positioned on an upper surface of the light emitting structure 120, that is, on one surface of the first conductive semiconductor layer 122, and a lower surface of the light emitting structure 120, that is, on one surface of the second conductive semiconductor layer 126. The second electrode layer 160 is located at.

As an example, the second electrode layer 160 may include at least one of the conductive layer 160a and the reflective layer 160b.

The conductive layer 160a is to improve electrical characteristics of the second conductive semiconductor layer 126 and may be positioned in contact with the second conductive semiconductor layer 126.

The conductive layer 160a may be formed of a transparent electrode layer or an opaque electrode layer. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide (AZO) , IGZO (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO ), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd At least one of Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf may be formed, but is not limited thereto.

The reflective layer 160b may improve the external quantum efficiency of the light emitting device 100 by reducing the amount of light that is extinguished in the light emitting device 100 by reflecting the light generated by the active layer 124.

The reflective layer 160b may include at least one of Ag, Ti, Ni, Cr, or AgCu, but is not limited thereto.

When the reflective layer 160b is made of a material in ohmic contact with the second conductivity-type semiconductor layer 126, the conductive layer 160a may not be separately formed.

The light emitting structure 120 is supported by the support substrate 180.

The support substrate 180 is formed of a material having high electrical conductivity and thermal conductivity. For example, the support substrate 180 is a base substrate having a predetermined thickness, and includes molybdenum (Mo), silicon (Si), tungsten (W), and copper. It may be made of a material selected from the group consisting of (Cu) or aluminum (Al) or alloys thereof, and also may be gold (Au), copper alloy (Cu Alloy), nickel (Ni), copper-tungsten (Cu- W), a carrier wafer (eg, GaN, Si, Ge, GaAs, ZnO, SiGe, SiC, SiGe, Ga ₂ O _3, etc.) or a conductive sheet may be optionally included.

The light emitting structure 120 may be bonded to the support substrate 120 by the bonding layer 185. In this case, the second electrode layer 160 and the bonding layer 185 positioned under the light emitting structure 120 may contact each other.

The bonding layer 185 may include a barrier metal or a bonding metal, and may include, for example, at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta. It does not limit to this.

The bonding layer 185 may include a diffusion barrier layer (not shown) adjacent to the light emitting structure 120 to prevent diffusion of metal, etc. used in the bonding layer 185 into the upper light emitting structure 120. have.

The channel layer 170 may be positioned around the bottom of the light emitting structure 120. The channel layer 170 protects the light emitting structure 120 and may function as a stop layer of etching during isolation etching during the manufacturing process of the light emitting device.

The channel layer 170 may be formed in a pattern such as a loop shape, a ring shape, or a frame shape around the lower portion of the second conductive semiconductor layer 126 of the light emitting structure 120.

The channel layer 170 may provide a light emitting device resistant to high humidity by preventing short circuits from occurring even when the outer wall of the light emitting structure is exposed to moisture.

The channel layer 170 may be selected from a material of an oxide, a nitride, or an insulating layer. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), Selective from indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), SiO2, SiOx, SiOxNy, Si3N4, Al2O3, TiO2 It may be formed as, but is not limited thereto.

The passivation layer 190 may be positioned on at least a portion of the light emitting structure 120, a side surface, and an upper portion of the channel layer 170 exposed to the outside of the light emitting structure 120.

The passivation layer 190 may be formed of an oxide or a nitride to protect the light emitting structure 120. For example, the passivation layer 240 may be formed of a silicon oxide (SiO ₂ ) layer, a silicon nitride layer, an oxynitride layer, or an aluminum oxide layer, but is not limited thereto.

The roughness pattern R may be formed on the first conductivity type semiconductor layer 122 of the light emitting structure 120. When the passivation layer 190 is present on the light emitting structure 120, the roughness pattern R may be located on the passivation layer 190. The roughness pattern R may be formed by performing a photo enhanced chemical (PEC) etching method or an etching process using a mask pattern. The roughness pattern R is to increase the external extraction efficiency of the light generated in the active layer 124 and may have a regular period or an irregular period.

6 to 9 are schematic views illustrating an embodiment of a manufacturing process of a light emitting device. 6 to 9 illustrate a manufacturing process of the light emitting device according to the second embodiment as an example, but is not limited thereto.

First, referring to FIG. 6, the buffer layer 115 is grown on the substrate 110. The buffer layer 115 is intended to mitigate lattice mismatch between the semiconductor layers to be grown later and the substrate 110. The buffer layer 115, the first conductivity type semiconductor layer 122, and the subsequent semiconductor layers are, for example, metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and the like. It is not limited.

The third layer 122-3 and the first layer 122-2 are first grown in the first conductive semiconductor layer 122. The first layer 122-1 may be grown as an undoped semiconductor layer, or may be doped to a lower concentration than the third layer 122-3 after growing as an undoped semiconductor layer.

The first layer 122-1 induces rough surface growth by promoting vertical growth at a low temperature of about 600 to 950 ° C. The recess region P may be formed on the surface of the first layer 122-1 by inducing rough surface growth.

When growth of the first layer 122-1 is completed, the filling material 122a is grown in the recess region P on the surface of the first layer 122-1. The fill material 122a induces horizontal growth at a pressure of about 200 torr or less to allow the fill material 122a to be driven into the recessed region P rather than the flat surface of the first layer 122-1.

The filling material 122a may include an AlGaN or InAlGaN material, and the Al content may be 20% or more because the resistance should be relatively high.

Subsequently, referring to FIG. 7, after the filling material 122a is grown in the recess region P of the first layer 122-1, the second layer 122-2 is grown, and the active layer thereon. Grow 124.

Since the active layer 124 has a large In content and a relatively high crystal lattice, a plurality of recess regions P may be formed on a surface thereof.

The insertion layer 126a of the second conductivity-type semiconductor layer 126 is first grown on the active layer 124 on which the recess region P is formed.

Since the insertion layer 126a is grown while maintaining the surface shape of the active layer 124 on which the recess region P is formed, the insertion layer 126a also corresponds to the recess region P of the active layer 124. The recess region P is formed. The insertion layer 126a may be thinly grown to a thickness of several tens of micrometers to several hundreds of micrometers so as to maintain the shape of the recess region P of the active layer 124.

Referring to FIG. 8, the growth of the electron blocking layer 126b and the subsequent second conductive semiconductor layer 126 on the insertion layer 126a is completed.

The electron blocking layer 126b is grown to have an upper surface flat while filling all of the recess regions P of the insertion layer 126a. A portion of the electron blocking layer 126b positioned in the recess region P of the insertion layer 126a has a relatively high resistance, and the Al content of the electron blocking layer 126b may be about 10-25%.

After the growth of the light emitting structure 120 is completed, a light emitting device having a horizontal structure as shown in FIG. 4 may be manufactured through a selective etching process.

Alternatively, a light emitting device having a vertical structure as shown in FIG. 5 may be manufactured through the process illustrated in FIG. 9.

Referring to FIG. 9, after growing the second conductivity-type semiconductor layer 126 as shown in FIG. 8, the second electrode layer 160 is formed. Then, the channel layer 170 is formed by removing a part of the second electrode layer 160 in the region to be later isolated with the respective light emitting structure.

Thereafter, the support substrate 180 is disposed on the second electrode layer 160. The support substrate 180 may be formed by a bonding method, a plating method, or a deposition method. When the support substrate 180 is formed by a bonding method, the second electrode layer 160 and the support substrate 180 may be bonded through the bonding layer 185.

And, as shown in FIG. 9, the substrate 110 is separated. The substrate 110 may be separated by a laser lift off (LLO) method using an excimer laser or the like, or may be a method of dry and wet etching.

For example, when the laser lift-off method focuses and irradiates excimer laser light having a predetermined wavelength in the direction of the substrate 110, heat energy is applied to the interface between the substrate 110 and the light emitting structure 120. As the interface is concentrated and separated into gallium and nitrogen molecules, separation of the substrate 110 occurs at a portion where the laser light passes. After separation of the substrate 110, the buffer layer 115 may be removed through a separate etching process.

Thereafter, a vertical light emitting device as shown in FIG. 5 can be manufactured by isolation etching.

The manufacturing process of the above-described light emitting device is only an example, and the order or method of the specific manufacturing process may vary depending on the embodiment.

10 is a view showing an embodiment of a light emitting device package including a light emitting device according to the embodiment.

The light emitting device package 300 according to the exemplary embodiment includes a body 310, a first lead frame 321 and a second lead frame 322 disposed on the body 310, and disposed on the body 310. And a light emitting device 100 according to the above-described embodiments electrically connected to the first lead frame 321 and the second lead frame 322, and a molding part 340 formed in the cavity. A cavity may be formed in the body 310.

The body 310 may be formed including a silicon material, a synthetic resin material, or a metal material. When the body 310 is made of a conductive material such as a metal material, although not shown, an insulating layer is coated on the surface of the body 310 to prevent an electrical short between the first and second lead frames 321 and 322. Can be.

The first lead frame 321 and the second lead frame 322 are electrically separated from each other, and supplies a current to the light emitting device 100. In addition, the first lead frame 321 and the second lead frame 322 may increase the light efficiency by reflecting the light generated by the light emitting device 100, heat generated by the light emitting device 100 Can be discharged to the outside.

The light emitting device 100 may be disposed on the body 310 or on the first lead frame 321 or the second lead frame 322. In the present embodiment, the first lead frame 321 and the light emitting device 100 are directly energized, and the second lead frame 322 and the light emitting device 100 are connected through a wire 330. The light emitting device 100 may be connected to the lead frames 321 and 322 by a flip chip method or a die bonding method in addition to the wire bonding method.

The molding part 340 may surround and protect the light emitting device 100. In addition, a phosphor 350 is included on the molding part 340 to change the wavelength of light emitted from the light emitting device 100.

The phosphor 350 may include a garnet-based phosphor, a silicate-based phosphor, a nitride-based phosphor, or an oxynitride-based phosphor.

For example, the garnet-base phosphor is _{YAG (Y 3 Al 5 O 12} : Ce 3 +) or TAG: may be a _{(Tb 3 Al 5 O 12 Ce} 3 +), wherein the silicate-based phosphor is (Sr, Ba, _{Mg, Ca) 2 SiO 4:} Eu 2 + one can, the nitride-based fluorescent material is CaAlSiN ₃ containing SiN: Eu ^{2 +} one can, Si ₆ of the oxynitride-based fluorescent material includes SiON _{- x} Al _x O _x N _{8 -x} : Eu ^{2 +} (0 <x <6).

Light in the first wavelength region emitted from the light emitting device 100 is excited by the phosphor 350 and converted into light in the second wavelength region, and the light in the second wavelength region passes through a lens (not shown). The light path can be changed.

A plurality of light emitting device packages according to the embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, and the like, which are optical members, may be disposed on an optical path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a light unit. Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp. .

Hereinafter, a head lamp and a backlight unit will be described as an embodiment of the lighting system in which the above-described light emitting device or light emitting device package is disposed.

FIG. 11 is a diagram illustrating an embodiment of a headlamp in which a light emitting device or a light emitting device package is disposed according to embodiments.

Referring to FIG. 11, after the light emitted from the light emitting module 710 in which the light emitting device or the light emitting device package is disposed is reflected by the reflector 720 and the shade 730, the light is transmitted through the lens 740. May face forward.

The light emitting module 710 may be provided with a plurality of light emitting devices on a circuit board, but is not limited thereto.

12 is a diagram illustrating an example embodiment of a display device in which a light emitting device package is disposed.

Referring to FIG. 12, a display device 800 according to an exemplary embodiment includes light emitting modules 830 and 835, a reflecting plate 820 on a bottom cover 810, and a front of the reflecting plate 820. The light guide plate 840 for guiding light emitted from the front of the display device, the first prism sheet 850 and the second prism sheet 860 disposed in front of the light guide plate 840, and the second prism sheet ( And a color filter 880 disposed in front of the panel 870 disposed in front of the panel 870.

The light emitting module includes the above-described light emitting device package 835 on the circuit board 830. Here, the PCB 830 may be used as the circuit board 830, and the light emitting device package 835 is as described with reference to FIG. 10.

The bottom cover 810 may receive components in the display device 800. The reflective plate 820 may be provided as a separate component as shown in the figure, or may be provided in the form of a high reflective material on the rear surface of the light guide plate 840 or the front surface of the bottom cover 810. Do.

Here, the reflective plate 820 may use a material having a high reflectance and being extremely thin, and may use polyethylene terephthalate (PET).

The light guide plate 840 scatters the light emitted from the light emitting device package module so that the light is uniformly distributed over the entire area of the screen of the liquid crystal display. Accordingly, the light guide plate 830 is made of a material having good refractive index and high transmittance, and may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), polyethylene (PE), or the like. In addition, the light guide plate may be omitted, and thus an air guide method in which light is transmitted in a space on the reflective sheet 820 may be possible.

The first prism sheet 850 is formed of a translucent and elastic polymer material on one surface of the support film, and the polymer may have a prism layer in which a plurality of three-dimensional structures are repeatedly formed. Here, the plurality of patterns may be provided in the stripe type and the valley repeatedly as shown.

In the second prism sheet 860, the direction of the floor and the valley of one surface of the support film may be perpendicular to the direction of the floor and the valley of one surface of the support film in the first prism sheet 850. This is to evenly distribute the light transmitted from the light emitting module and the reflective sheet in all directions of the panel 870.

In the present embodiment, the first prism sheet 850 and the second prism sheet 860 form an optical sheet, which is composed of another combination, for example, a micro lens array or a diffusion sheet and a micro lens array. Or a combination of one prism sheet and a micro lens array.

The liquid crystal display panel (Liquid Crystal Display) may be disposed on the panel 870, in addition to the liquid crystal display panel 860 may be provided with other types of display devices that require a light source.

The panel 870 is a state in which the liquid crystal is located between the glass body and the polarizing plate is placed on both glass bodies in order to use the polarization of light. Herein, the liquid crystal has an intermediate characteristic between a liquid and a solid. The liquid crystal, which is an organic molecule having fluidity, like a liquid, has a state in which the liquid crystal is regularly arranged like a crystal, and the molecular arrangement is changed by an external electric field. Display an image.

The liquid crystal display panel used in the display device uses a transistor as an active matrix method as a switch for adjusting a voltage supplied to each pixel.

The front surface of the panel 870 is provided with a color filter 880 to transmit the light projected from the panel 870, only the red, green and blue light for each pixel can represent an image.

As described above, although the embodiments have been described by the limited embodiments and the drawings, the present invention is not limited to the above embodiments, and those skilled in the art to which the present invention pertains various modifications and variations from such descriptions. This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below but also by the equivalents of the claims.

100: light emitting element 110: substrate
120: light emitting structure 122: first conductive semiconductor layer
122-1: First layer 122-2: Second layer
122-3: third layer 122a: filling material
124: active layer 126: second conductive semiconductor layer
126a: insertion layer 126b: electron blocking layer
160: second electrode layer 170: channel layer
180: support substrate 190: passivation layer
310: package body 321, 322: first and second lead frames
330: wire 340: molding part
350: phosphor 710: light emitting module
720: Reflector 730: Shade
800: display device 810: bottom cover
820: reflector 840: light guide plate
850: first prism sheet 860: second prism sheet
870: panel 880: color filter

Claims (13)

A first conductivity type semiconductor layer having a first layer, a second layer on the first layer, and a third layer located below the first layer;
An active layer on the second layer;
A second conductivity type semiconductor layer on the active layer;
A first electrode electrically connected to the third layer of the first conductivity type semiconductor layer; And
A second electrode electrically connected to the second conductivity type semiconductor layer,
The first layer of the first conductivity type semiconductor layer has a plurality of recess regions at an interface with the second layer, and a filling material including AlGaN or InAlGaN material is located in the recess region.
The active layer has a plurality of recess regions on one surface adjacent to the second conductivity type semiconductor layer,
The second conductivity type semiconductor layer
An insertion layer having a plurality of recess regions respectively corresponding to the plurality of recess regions included in one surface of the active layer, the insertion layer having the same surface shape as the shape of one surface of the active layer and adjacent to the active layer; And
An electron blocking layer formed on the insertion layer and formed of a material having a larger energy band gap than the active layer, and having a composition of In _x Al _y Ga _1-xy N (0 ≦ x <y <1),
The insertion layer has a thin thickness T _{1 that} does not fill the recess region of the active layer so as to be formed while maintaining the shape of the recess region of the active layer.
The thickness T ₁ of the insertion layer has a thickness thinner than the thickness T ₂ of the first layer. delete The method of claim 1,
The electron blocking layer has a single layer or a superlattice structure, fills a plurality of recess regions of the insertion layer, and has a flat surface opposite to a surface in contact with the insertion layer. delete delete delete delete The method of claim 1,
The first layer is an undoped semiconductor layer or a semiconductor layer that is lightly doped (low-doped) than the second layer or the third layer, the light emitting device having a thickness of 0.05um to 0.4um. delete delete delete delete delete

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