KR20140020575A - Nitride semiconductor device and method for manufacturing the same - Google Patents

Abstract

Disclosed are a nitride semiconductor element and a manufacturing method thereof. The embodiments of the present invention are able to minimize the leakage current and the reduction of breakdown voltage by firstly doping iron atoms and carbon atoms into a nitride thin film in order and then forming an un-doped layer on the top. In the embodiment of the present invention, iron, which does not affect the crystalizability during the growth of the nitride thin film, is firstly doped in the lower part and then carbon is doped in the area under the memory effect due to the iron doping so that the amount of dislocation as well as the number of free electrons existing on the thin film can be reduced. The embodiments of the present invention do not compromise the features of a two-dimensional electron gas (2DEG) channel and bring a high pressure resistance effect, by making the nitride thin film have high resistance. Also, by minimizing the leakage current when the element operates at high voltages and at the same time preventing reduction in the carrier density (number of carriers) or in the electron mobility of the 2DEG channel, the stability and the reliability of the element can be improved. [Reference numerals] (AA) Start; (BB) End; (S110) Form a first highly-resistant layer on a substrate using a first doping material; (S121) Stop the injection of the first doping material; (S123) Inject a second doping material; (S125) Stop the injection of the second doping material; (S130) Form an active layer on a second highly-resistant layer; (S140) Form a barrier layer on the active layer; (S150) Touch a source electrode and a drain electrode onto the barrier layer; (S160) Touch a gate electrode

Description

[0001] NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [0002]

The present invention relates to a nitride semiconductor device capable of reducing the amount of leakage current between the source and the drain by using the doping of the nitride thin film and a method of manufacturing the same.

The nitride semiconductor is a broadband bandgap compound semiconductor and is capable of emitting light up to a visible range and broadly to the ultraviolet range. Blue violet laser diodes and blue light emitting diodes are used in a wide range of applications, from optical pickup devices, traffic lights, public displays, liquid crystal backlights, and lighting.

Nitride semiconductors are attracting attention due to their high critical electric field, low on resistance, high temperature and high frequency operation characteristics compared to silicon and are being studied as materials for next generation semiconductor devices.

BACKGROUND ART [0002] Metal-oxide semiconductor field-effect-transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs) are generally used for high output power devices. In addition, devices such as a high electron mobility transistor (HEMT), a heterojunction field-effect transistor (HFET), and a MOSFET are studied as a gallium nitride (GaN) . HEMTs are used for high frequency communication devices and the like by using high mobility of electrons.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an exemplary diagram illustrating the general structure of a heterojunction field effect transistor (HFET). Referring to FIG. 1, a general HFET includes a substrate 1, a first GaN layer 2 formed on the substrate, an AlGaN layer 3 formed on the first GaN layer, 2 GaN layer 4, a gate electrode 5, a source electrode 6 and a drain electrode 7 formed on the second GaN layer.

A typical HFET operates to switch a two-dimensional electron gas (2DEG) current flowing from a drain electrode to a source electrode through a schottky gate electrode.

In the case of a general HFET device, the quality of the Schottky characteristic using the gate operation can have a large influence on the switching characteristics of the device. Therefore, the role of minimizing leakage on the gate side and expanding the depletion region is of the utmost importance. In addition, there is a need for a technique of shifting the threshold voltage (supply voltage) in a positive direction so that the current flow of the 2DEG channel in the heterojunction structure is usually turned off.

The nitride film constituting the HFET device is doped n-type due to unintentional nitrogen defects during the growth process, and the nitride film has conductivity despite the high band gap.

The free electron carrier formed in the nitride thin film layer by undoped doping is usually formed at a level of about 1.0 × 10 ¹⁶ to 1.0 × 10 ¹⁷ . Through this process, when a free electron carrier is formed in the nitride film itself, the 2DEG channel existing under the gate is locally depleted. As a result, the HFET device is formed with a channel through which a current flows in addition to the 2DEG channel. At this time, the current flowing through the thin film rather than the 2DEG channel is a leakage current, which degrades the performance of the device. Loses. That is, an HFET device can have a large leakage current and a low withstand voltage due to unintended doping.

It is an object of the present invention to provide a nitride semiconductor device capable of reducing the amount of leakage current between a source and a drain by doping a nitride thin film using one or more doping materials and a method of manufacturing the same.

It is an object of the present invention to provide a nitride semiconductor device and a method of manufacturing the same, which doped iron first during growth of the nitride thin film and then doped carbon together to reduce leakage current and minimize reduction of breakdown voltage. .

The nitride semiconductor device according to an embodiment may be formed on a substrate, and may be formed of a first high resistance layer made of nitride doped with a first doping material, and may be formed on the first high resistance layer, and the first doped material and the second material may be formed of a nitride semiconductor device. A second high resistance layer made of nitride doped together with a doping material, an active layer formed on the second high resistance layer and formed of undoped nitride, and formed on the active layer, wherein a two-dimensional electron gas channel is formed in the active layer And a barrier layer to be formed, and a source electrode and a drain electrode respectively contacting the barrier layer.

In the nitride semiconductor device, the first doping material is iron (Fe), and the doping concentration of the first high resistance layer is 1e17 / cm ³ to 1e19 / cm ³ . In addition, the second doping material is carbon (C), and the doping concentration of the second high resistance layer is 1e16 / cm ³ to 1e19 / cm ³ .

According to another embodiment, a nitride semiconductor device is formed on a substrate and is formed of a nitride that is doped with a first doping material, and is formed on the first high resistance layer, and the first doping material and the second material. A second high resistance layer made of nitride doped together with a doping material, an active layer formed on the second high resistance layer and formed of undoped nitride, and formed on the active layer, wherein a two-dimensional electron gas channel is formed in the active layer A barrier layer to be formed, a cap layer formed on the barrier layer and formed of gallium nitride or aluminum gallium nitride, the cap layer having a thickness of 0 to 100 nanometers, and a source electrode and a drain electrode respectively contacting the cap layer; It is configured to include.

In another embodiment, a nitride semiconductor device includes a first high resistance layer formed on a substrate and doped with a first doped material, and a first high resistance layer formed on the first high resistance layer. A second high resistance layer made of nitride doped together with a two doping material, an active layer formed on the second high resistance layer and formed of an undoped nitride, and formed on the active layer, wherein the two-dimensional electron gas channel is formed in the active layer And a barrier layer to be formed, a source electrode and a drain electrode respectively contacted on the barrier layer, a gate insulating film layer formed on the barrier layer, and a gate electrode contacted on the gate insulating film layer.

In another embodiment, a nitride semiconductor device includes a first high resistance layer formed on a substrate and doped with a first doped material, and a first high resistance layer formed on the first high resistance layer. A second high resistance layer made of nitride doped together with a two doping material, an active layer formed on the second resistance layer and formed of undoped nitride, and formed on the active layer, wherein a two-dimensional electron gas channel is formed in the active layer A barrier layer to be formed, a source electrode and a drain electrode in contact with each of the barrier layer, a recess region formed by etching the barrier layer or by etching part or all of the active layer together with the barrier layer; A gate insulating film layer formed in the recess region and a gate electrode in contact with the gate insulating film layer.

According to one or more exemplary embodiments, a method of manufacturing a nitride semiconductor device includes forming a first high resistance layer using nitride doped with a first doping material on a substrate, and forming the first high resistance layer on the first high resistance layer. Forming a second high resistance layer using nitride doped together with a second doping material, forming an active layer using undoped nitride on the second high resistance layer, and forming a barrier layer on the active layer. Forming and contacting the source electrode and the drain electrode over the barrier layer.

Embodiments of the present invention may minimize the leakage current and minimize the breakdown voltage by sequentially doping the nitride thin film using iron and carbon atoms, and then forming an undoped layer thereon.

Embodiments of the present invention, the amount of dislocation by doping iron (Fe) that does not affect the crystallinity at the time of the growth of the nitride thin film first, and doping the carbon in the interval of the memory effect caused by iron doping In addition, the free electrons present in the thin film can be reduced.

Embodiments of the present invention, by making the nitride thin film has a high resistance does not impair the characteristics of the two-dimensional electron gas channel, and together with the effect of high withstand pressure.

In addition, the device's stability and reliability are improved by minimizing leakage current when operating the device at high voltages, while reducing the carrier concentration (number) and electron mobility of the 2DEG channel.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an exemplary diagram illustrating the general structure of a heterojunction field effect transistor (HFET);
2 illustrates a structure of a nitride semiconductor device according to an embodiment;
3 is a flowchart schematically illustrating a method of manufacturing a nitride semiconductor device according to one embodiment;
4 and 5 are views illustrating a structure of a nitride semiconductor device according to other embodiments;
6 and 7 are flowcharts schematically illustrating a method of manufacturing a nitride semiconductor device according to other embodiments;
8A-8D illustrate various forms of recessed areas in embodiments of the present invention; And
9 is a graph showing a change in concentration of doping materials in the embodiments of the present invention.

2, a nitride semiconductor device according to an embodiment may include a first high resistance layer 10, a second high resistance layer 20, an active layer 30, a barrier layer 40, and a gate. The electrode 50 is configured to include a source electrode 60 and a gate electrode 70.

The first high resistance layer 10 is formed on the substrate 1 and is made of nitride doped with a first doping material. The second high resistance layer 20 is formed on the first high resistance layer 10 and is formed of a nitride doped together with the first doping material and the second doping material. The active layer 30 is formed on the second high resistance layer 20 and is made of undoped nitride. The barrier layer 40 is formed on the active layer 30, and forms a 2-Dimensional Electron Gas (2DEG) channel in the active layer.

The first high resistance layer 10, the second high resistance layer 20, and the active layer 30 are all GaN (gallium nitride) layers, which are undoped GaN or carbon. , A high resistance GaN layer doped with iron (Fe), magnesium (Mg), or a combination thereof. The doping material forms a deep accepter inside the GaN layer, that is, the nitride thin film, to thereby bind a free electron carrier which is inadvertently generated. The thickness of the GaN layer is 0.5 to 10 micrometers (μm), preferably 0.6 to 3 μm. The concentration of the doped material doped to the GaN layer is generally doped to have a concentration of 1e17 / cm ³ to about 1e20 / cm ^3, preferably at 1e18 / cm ³ to about 1e19 / cm ^3.

The first doping material doped in the first high resistance layer 10 is iron (Fe), the doping concentration of the first high resistance layer 10 is 1e17 / cm ³ to 1e19 / cm ³ , preferably 1e17 / cm ³ to 5e18 / cm ³ . Iron (Fe) has an acceptor level smaller than carbon (C), with an energy level close to 0.3 eV from the conduction band edge.

The second doping material doped in the second high resistance layer 20 is carbon (C), and the doping concentration of the second high resistance layer 20 is 1e16 / cm ³ to 1e19 / cm ³ . Carbon (C), on the other hand, has a larger acceptor level than iron (Fe), forming a deep acceptor with a low energy level close to 2.5 eV from the conduction band edge. Of course, iron (Fe), which is a first doping material, is present in the second high resistance layer 10. The thickness of the second high resistance layer 20 may be in a range of 100 nm to 1 μm.

Iron (Fe), unlike carbon (C), does not increase to a significant level as compared to before doping. Therefore, iron atoms are implanted onto the substrate 1 to form the first high resistance layer 10. When the formation of the first high resistance layer 10 is completed, the injection of iron, which is the first doping material, is stopped. However, even if iron is stopped, doping does not stop immediately and there is a phenomenon in which doping is not desired, that is, a memory effect. Therefore, iron atoms also exist in the second high resistance layer 10. These iron atoms may act as an impurity (impurity) to reduce the mobility (mobility) of the electrons.

As shown in FIG. 9, the second high resistance layer 20 is formed when the injection of the first doping material is stopped and the injection of the second doping material starts. As described above, iron (Fe), which is the first doping material, is present in the second high resistance layer 20 even if the implantation is stopped, and the concentration gradually decreases. The injection amount of carbon (C), which is the second doping material, is increased by the concentration of the iron atoms to be reduced so that the second high resistance layer 20 is to be doped, for example, 1e16 / cm ³ to 1e19 / cm ³ . Then, when the height reaches a predetermined height, the injection of carbon C into the second high resistance layer 20 is stopped, and the active layer 30 is formed on the second high resistance layer 20. That is, the nitride semiconductor device may increase the concentration of the second doping material (carbon) in response to the concentration that decreases after the injection stop of the first doping material (iron).

For example, referring to FIG. 9, iron (Fe), which is the first doping material, is doped to a concentration of 1e18 cm ³ to form the first high resistance layer 10, and then the implantation of iron is stopped and carbon (C) is stopped. Is injected to form the second high resistance layer 20. In this case, the concentration of the second high resistance layer 20 may be maintained at 1e18 cm ³ , similarly to the concentration of the first high resistance layer 10. Then, when it is determined that the height of the second high resistance layer 20 reaches a certain height or the iron concentration in the second high resistance layer 20 decreases below a certain concentration, the injection of carbon is stopped. Grow the active layer.

The active layer 30 is an undoped GaN layer or a GaN layer that is in fact unintendedly doped and contains a very small concentration of impurities (or doping material). The height of the active layer 30 is preferably 1 to 200 nanometers (nm).

The first high resistance layer 10, the second high resistance layer 20, and the active layer 30 may be formed in various ways (methods). A metal organic chemical vapor deposition (MOCVD), a molecular beam epitaxy (MBE), a hydride vapor phase epitaxy (HVPE), a plasma enhanced chemical vapor deposition (PECVD), Sputtering, and Atomic Layer Deposition (ALD). However, considering the crystallinity of the GaN layer, it is general to fabricate by metal-organic chemical vapor deposition. TMGa as a raw material of Ga, and NH ₃ as a raw material of N are synthesized at a high temperature in a reactor to perform epitaxial growth.

Although not shown in the lower portion of the first high resistance layer 10, a low resistance layer may be included between the substrate 1. The low-resistance layer is generally made of an n-type gallium nitride (n-GaN). The thickness of the low resistance layer is 0.01 to 10 micrometers ([mu] m). Preferably, the low resistance layer is grown to a thickness of 0.1 to 2 μm. The low resistance layer may also be formed by metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, or the like.

Although not shown, an AlGaN layer made of Al _x Ga _{1- x} N (0 ≦ _x ≦ ₁ ) may be further formed between the first high resistance layer 10 and the substrate 1.

The barrier layer 40 is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _{1 - x} N (0 _{? X} ? 1). The thickness of the barrier layer 40 is 2 to 100 nanometers (nm). Preferably 15 to 30 nm. The Al composition of AlGaN is about 1 to 100%, preferably about 10 to 50%. The barrier layer 40 may also be formed by metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, and the like.

Referring to FIG. 4, a nitride semiconductor device according to another embodiment may include a first high resistance layer 10 formed of a nitride formed on a substrate 1 and doped with a first doping material, and the first high resistance layer. A second high resistance layer 20 formed of nitride and doped together with the first doped material and the second doped material, and formed on the second high resistance layer 20 and not doped. An active layer 30 made of nitride, a barrier layer 40 formed on the active layer 30, and a two-dimensional electron gas channel formed on the active layer, and a cap layer 80 formed on the barrier layer 40. It is configured to include. Here, the source electrode 60 and the drain electrode 70 are in contact with the cap layer 80, unlike in one embodiment. Description of other components is replaced with one embodiment.

Like the barrier layer 20, the cap layer 80 is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _{1 - x} N (0 ≦ _x ≦ 1). Al composition may use 0 to 100%. The thickness is grown to 0 to 100 nanometers, preferably about 2 to 10 nm. Cap layer 80 prevents surface leakage current.

After epitaxial growth, an isolation process is performed to define regions between devices and to deposit source and drain electrodes.

That is, after epitaxial growth, the source electrode 60 is formed on the barrier layer 40 or the cap layer 80. The source electrode 60 is formed in a portion where the gate electrode 50 is not formed, and is made of metal.

The source electrode 60 is formed by ohmic contact. For example, the source electrode 60 uses a Ti / Al-based structure, which may be used after heat treatment or without heat treatment. For example, the source electrode 60 is patterned by a lift-off process by depositing Ti / Al / Ti / Au with a thickness of 30/100/20/200 nm using an electron beam evaporator .

After the epitaxial growth, the drain electrode 70 is formed on the barrier layer 40 or the cap layer 80. The drain electrode 70 is formed in a portion where the gate electrode 50 is not formed, and is made of metal.

The drain electrode 70 is formed by ohmic contact. For example, the drain electrode 70 uses a Ti / Al-based structure, which may be used after heat treatment or without heat treatment.

As illustrated in FIG. 2 or 4, the gate electrode 50 may be formed on the barrier layer 40 or the cap layer 80.

Meanwhile, referring to FIG. 5, a nitride semiconductor device according to another embodiment may include a first high resistance layer 10 formed of a nitride formed on a substrate 1 and doped with a first doping material, and the first high resistance layer 10. It is formed on the high resistance layer 10, and formed on the second high resistance layer 20 and the second high resistance layer 20 made of a nitride doped together with the first doping material and the second doping material, An active layer 30 made of undoped nitride, a barrier layer 40 formed on the active layer 30, and a two-dimensional electron gas channel formed on the active layer 30, and on the barrier layer 40. A source electrode 60 and a drain electrode 70 in contact with each other, a gate insulating layer layer 51 formed on the barrier layer 40, and a gate electrode 50 in contact with the gate insulating layer layer 51. It is composed. Of course, as shown in FIG. 4, when the nitride semiconductor device includes the cap layer 80, the source electrode 60 and the drain electrode 70 may be formed on the cap layer 80.

The gate insulating layer 51 prevents leakage current of the gate electrode. The gate insulating layer 51 is made of at least one of silicon oxide (SiO ₂ ), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), and silicon nitride (SiN). Here, the gate electrode 50 is formed on the gate insulating film layer 51. The nitride semiconductor device may have a MIS (Metal-Insulator-Semiconductor) structure.

The gate insulating layer 51 can be formed in various ways (methods). For example, based on at least one of metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, sputtering, and atomic layer deposition. For example, the source electrode 60 and the drain electrode 70 are formed on the substrate grown up to the cap layer 80 (or the barrier layer 40) by a manufacturing process, and the gate insulating layer 51 is thermal evaporator or PECVD. After the deposition using, to form a gate electrode on the deposited gate insulating layer, that is, oxide.

8A to 8D, a nitride semiconductor device according to another embodiment may include a first high resistance layer 10 formed on a substrate 1 and made of nitride doped with a first dopant material, and the first semiconductor layer. It is formed on the first high resistance layer 10, and formed on the second high resistance layer 20 and the second high resistance layer 20 made of a nitride doped together with the first doping material and the second doping material And an active layer 30 made of undoped nitride, a barrier layer 40 formed on the active layer 30 to form a two-dimensional electron gas channel in the active layer 30, and the barrier layer 40. A source electrode 60 and a drain electrode 70 which are in contact with each other, and the barrier layer 40 are etched, or a portion or all of the active layer 30 is etched together with the barrier layer 40. A recess region 90, a gate insulating layer 51 formed in the recess region 90, and And a gate electrode 50 in contact with the gate insulating layer. Of course, as shown in FIG. 4, when the nitride semiconductor device includes the cap layer 80, the recess region 90 may be formed by further etching the cap layer 80.

The recess process uses a chlorine-based etching gas, for example, Cl ₂ and BCl ₃ based gas to etch the barrier layer and the like. In addition, the recess process may use an etching gas to etch the layer above or below the 2DEG channel, that is, the active layer. The gate electrode 50 is deposited on the recess region 90, and the width of the region is the same as the recess region, or 0 to 5 micrometers (the region of the source electrode 60 or the drain electrode 70). in μm). In addition, the gate electrode 50 may be made of an electrode having a high work function such as Ni, Ir, Pd, or Pt.

8A through 8D illustrate various types of recess regions. The recess region 90 may have various shapes such as a rectangular shape (FIG. 8A), a trench shape (FIG. 8B), a V-groove shape (FIG. 8C), a semicircle shape (FIG. 8D), and the like. Can have

The gate electrode 50 may be formed on the gate insulating layer 52 formed on the recess region 90. The gate insulating film layer 42 prevents the leakage current of the gate electrode similarly to the gate insulating film layer 51. The gate insulating layer 52 is also made of at least one of silicon oxide (SiO ₂ ), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), and silicon nitride (SiN), and a metal-organic chemical vapor phase. And one or more of deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, sputtering, and atomic layer deposition.

Referring to FIG. 3, a method of manufacturing a nitride semiconductor device according to an embodiment includes forming a first high resistance layer using nitride doped with a first doping material on a substrate (S110), and forming the first high resistance layer. Forming a second high resistance layer using nitride doped together with the first doped material and the second doped material on the resistive layer (S120), and using an undoped nitride layer on the second high resistance layer. Forming a barrier layer (S130), forming a barrier layer on the active layer (S140), and contacting the source electrode and the drain electrode on the barrier layer (S150).

The first high resistance layer, the second high resistance layer, and the active layer are all GaN layers, which are undoped GaN layers, or carbon, iron, magnesium, and these. It is a high resistive GaN layer doped in one of the combinations. The doping material forms a deep accepter inside the GaN layer, that is, the nitride thin film, to thereby bind a free electron carrier which is inadvertently generated. The thickness of the GaN layer is 0.5 to 10 m, preferably 0.6 to 3 m. The concentration of the doped material doped to the GaN layer is generally doped to have a concentration of 1e17 / cm ³ to about 1e20 / cm ^3, preferably at 1e18 / cm ³ to about 1e19 / cm ^3.

In the forming of the first high resistance layer (S110), iron (Fe) having a concentration of 1e ¹⁷ / cm ³ to 1e ¹⁹ / cm ³ is injected. That is, the first doping material doped in the first high resistance layer is iron (Fe), the doping concentration of the first high resistance layer is 1e17 / cm ³ to 1e19 / cm ³ , preferably 1e17 / cm ³ to 5e18 / cm ³ . Iron (Fe) has an acceptor level smaller than carbon (C), but has an energy level close to 0.3 eV from the conduction band edge.

Forming the second high resistance layer (S120), is formed by injecting iron (Fe) and carbon (C) together to have a concentration of 1e ¹⁶ / cm ³ to 1e ¹⁹ / cm ³ . That is, the second doping material doped in the second high resistance layer is carbon (C), and the doping concentration of the second high resistance layer 20 is 1e16 / cm ³ to 1e19 / cm ³ . Carbon (C), on the other hand, has a larger acceptor level than iron (Fe), forming a deep acceptor with a low energy level close to 2.5 eV from the conduction band edge. Of course, iron (Fe), which is the first doping material, is present in the second high resistance layer. The thickness of the second high resistance layer 20 may be in a range of 100 nm to 1 μm.

The forming of the second high resistance layer (S120) may include stopping the injection of the first doping material (S121), increasing the concentration by injecting the second doping material (S123), and 2 if the high resistance layer reaches a certain height, or if the concentration of the first doping material in the second high resistance layer is less than or equal to a certain concentration, stopping the injection of the second doping material (S125); It is composed.

Iron (Fe), unlike carbon (C), does not increase to a significant level as compared to before doping. Accordingly, first, a first high resistance layer is formed by implanting iron atoms on the substrate (S110). When the formation of the first high resistance layer is completed, the injection of iron, which is the first doping material, is stopped (S121). However, even if iron is added to the thin film and stops injecting, iron is doped to a part that does not want to be doped, that is, a memory effect. Therefore, iron atoms also exist in the second high resistance layer. These iron atoms may act as an impurity (impurity) to reduce the mobility (mobility) of the electrons.

As shown in FIG. 9, the second high resistance layer is formed while the injection of the first doping material is stopped (S121) and the injection of the second doping material is started (S123). As described above, iron (Fe), which is the first doping material, is present in the second high resistance layer even if the injection is stopped, and the concentration gradually decreases. The injection amount of carbon (C), which is the second doping material, is increased by the concentration of the iron atom to be reduced so that the second high resistance layer is to be doped, for example, 1e16 / cm ³ to 1e19 / cm ³ . Then, if it is determined that the height of the second high resistance layer reaches a certain height or the concentration of iron in the second high resistance layer decreases below a certain concentration, the carbon (C) for the second high resistance layer is determined. Injection is stopped (S125), and an active layer is formed on the second high resistance layer (S130). That is, the nitride semiconductor device may increase the concentration of the second doping material (carbon) in response to the concentration that decreases after the injection stop of the first doping material (iron).

For example, referring to FIG. 9, iron (Fe), which is the first doping material, is doped to a concentration of 1e18 cm ³ to form a first high resistance layer, and then the injection of iron is stopped and carbon (C) is injected. A second high resistance layer is formed. In this case, the concentration of the second high resistance layer may be maintained at 1e18 cm ³ , similarly to the concentration of the first high resistance layer. Then, when it is determined that the height of the second high resistance layer reaches a certain height or the iron concentration in the second high resistance layer decreases below a certain concentration, the injection of carbon is stopped to grow the active layer.

The active layer is an undoped GaN layer or, in fact, an unintentionally doped GaN layer, with very low concentrations of impurities (or doping materials). The height of the active layer is preferably 1 to 200 nanometers (nm).

The first high resistance layer, the second high resistance layer, and the active layer may be formed in various ways (methods). A metal organic chemical vapor deposition (MOCVD), a molecular beam epitaxy (MBE), a hydride vapor phase epitaxy (HVPE), a plasma enhanced chemical vapor deposition (PECVD), Sputtering, and Atomic Layer Deposition (ALD). However, considering the crystallinity of the GaN layer, it is general to fabricate by metal-organic chemical vapor deposition. TMGa as a raw material of Ga, and NH ₃ as a raw material of N are synthesized at a high temperature in a reactor to perform epitaxial growth.

The barrier layer is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _{1 - x} N (0 _{? X} ? 1). The thickness of the barrier layer is grown to 2 to 100 nm, preferably 15 to 30 nm. The Al composition of AlGaN is grown to 1 to 100%, preferably 10 to 50% (S140). The barrier layer may also be formed by metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, and the like.

After the epitaxial growth, an isolation process is performed to define a region between the devices and to deposit a source electrode and a drain electrode (S150).

That is, after epitaxial growth, a source electrode is formed on the barrier layer (S150). The source electrode is formed at a portion where no gate electrode is formed, and is made of metal.

The source electrode is formed by ohmic contact. For example, the source electrode uses a Ti / Al-based structure, which can be used after heat treatment or without heat treatment. For example, the source electrode is formed by depositing Ti / Al / Ti / Au with a thickness of 30/100/20/200 nm using an electron beam evaporator to form a pattern by a lift-off process.

After the epitaxial growth, a drain electrode is formed on the barrier layer (S150). The drain electrode is formed in a portion where the gate electrode is not formed, and is made of metal.

The drain electrode is formed by ohmic contact. For example, the drain electrode uses a Ti / Al-based structure, which can be used with or without heat treatment.

Then, as shown in Figure 2, the gate electrode can be formed on the barrier layer (S160).

Referring to FIG. 6, the method of manufacturing a nitride semiconductor device according to another embodiment may further include forming a cap layer on the barrier layer using gallium nitride or aluminum gallium nitride (S250). It is configured by.

First, in the manufacturing method, the first high resistance layer is formed on the substrate using the first doping material (S210). In the forming of the first high resistance layer (S210), iron (Fe) having a concentration of 1e ¹⁷ / cm ³ to 1e ¹⁹ / cm ³ is injected. That is, the first doping material doped in the first high resistance layer is iron (Fe), the doping concentration of the first high resistance layer is 1e17 / cm ³ to 1e19 / cm ³ , preferably 1e17 / cm ³ to 5e18 / cm ³ .

Then, the manufacturing method, using the first and second doping material to form a second high resistance layer on the first high resistance layer (S220). Forming the second high resistance layer (S220), it is formed by injecting iron (Fe) and carbon (C) together to have a concentration of 1e ¹⁶ / cm ³ to 1e ¹⁹ / cm ³ . That is, the second doping material doped in the second high resistance layer is carbon (C), and the doping concentration of the second high resistance layer 20 is 1e16 / cm ³ to 1e19 / cm ³ .

When it is determined that the height of the second high resistance layer reaches a certain height or the iron concentration in the second high resistance layer is reduced to a predetermined concentration or less, the injection of carbon is stopped to grow the active layer (S230). The active layer is an undoped GaN layer or, in fact, an unintentionally doped GaN layer, with very low concentrations of impurities (or doping materials). The height of the active layer is preferably 1 ~ 200 nm.

The barrier layer is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _{1 - x} N (0 _{? X} ? 1). The thickness of the barrier layer is grown to 2 to 100 nm, preferably 15 to 30 nm. The Al composition of AlGaN is grown to 1 to 100%, preferably 10 to 50% (S240). The barrier layer may also be formed by metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, and the like.

The cap layer, like the barrier layer, is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _1-x N (0 ≦ _x ≦ 1). Al composition may use 0 to 100%. The thickness is grown to about 0 to 100 nm, preferably about 2 to 10 nm (S250). The cap layer prevents surface leakage currents.

After the epitaxial growth, an isolation process is performed to define the region between the devices and to deposit the source electrode and the drain electrode (S260). That is, after epitaxial growth, a source electrode is formed on the cap layer (S260). The source electrode is formed at a portion where no gate electrode is formed, and is made of metal. In addition, the manufacturing method forms a drain electrode on the cap layer (S260). The drain electrode is also formed in a portion where the gate electrode is not formed and is made of metal.

Then, as shown in FIG. 4, the gate electrode may be formed on the cap layer (S160).

A method of manufacturing a nitride semiconductor device according to still another embodiment may further include forming a gate insulating layer on the barrier layer and contacting the gate electrode on the gate insulating layer in addition to the above embodiments. . In this case, as shown in FIG. 5, when the cap layer is formed, the gate insulating layer may be formed on the cap layer.

The gate insulating film (layer) can be formed in various ways (methods). For example, based on at least one of metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, sputtering, and atomic layer deposition.

The gate insulating film (layer) prevents leakage current of the gate electrode. The gate insulating film layer is made of at least one of silicon oxide (SiO ₂ ), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), and silicon nitride (SiN). Here, the gate electrode is formed on the gate insulating film layer. The nitride semiconductor device may have a MIS (Metal-Insulator-Semiconductor) structure.

Referring to FIG. 5, a source electrode and a drain electrode are formed through a manufacturing process on a substrate grown up to a cap layer (or a barrier layer), the gate insulating layer is deposited using a thermal evaporator or PECVD, and then the deposited gate insulating layer, In other words, a gate electrode is formed on the oxide.

Referring to FIG. 7, in the method of manufacturing the nitride semiconductor device according to another embodiment, in addition to the above embodiments, the barrier layer may be etched, or a portion or all of the active layer may be etched together with the barrier layer to recess the region. And forming a gate insulating layer in the recess region (S370), and contacting a gate electrode on the gate insulating layer (S380). Of course, as shown in FIG. 4, when the nitride semiconductor device includes a cap layer, the recess region may be formed by further etching the cap layer.

First, in the manufacturing method, the first high resistance layer is formed on the substrate using the first doping material (S310). Forming the first high resistance layer (S310) is formed by injecting iron (Fe) with a concentration of 1e ¹⁷ / cm ³ to 1e ¹⁹ / cm ³ , preferably 1e17 / cm ³ to 5e18 / cm ³ (S310).

Then, the manufacturing method, using the first and second doping material to form a second high resistance layer on the first high resistance layer (S320). In the forming of the second high resistance layer (S220), iron (Fe) and carbon (C) are injected and formed together to have a concentration of 1e ¹⁶ / cm ³ to 1e ¹⁹ / cm ³ (S320).

When it is determined that the height of the second high resistance layer reaches a certain height or the iron concentration in the second high resistance layer is reduced to a predetermined concentration or less, the injection of carbon is stopped to grow the active layer (S330). The active layer is an undoped GaN layer or, in fact, an unintentionally doped GaN layer, with very low concentrations of impurities (or doping materials). The height of the active layer is preferably 1 ~ 200 nm.

The barrier layer is made of aluminum gallium nitride (AlGaN), that is, Al _x Ga _{1 - x} N (0 _{? X} ? 1). The thickness of the barrier layer is grown to 2 to 100 nm, preferably 15 to 30 nm. The Al composition of AlGaN is grown to 1 to 100%, preferably 10 to 50% (S340). The barrier layer may also be formed by metal-organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, and the like.

After the epitaxial growth, an isolation process is performed to define the region between the devices and to deposit the source electrode and the drain electrode (S350). That is, after epitaxial growth, a source electrode is formed on the barrier layer (or cap layer) (S350). The source electrode is formed at a portion where no gate electrode is formed, and is made of metal. In addition, the manufacturing method forms a drain electrode on the barrier layer (or cap layer) (S350). The drain electrode is also formed in a portion where the gate electrode is not formed and is made of metal.

The recess process uses a chlorine-based etching gas, for example, Cl ₂ and BCl ₃ based gas to etch the barrier layer and the like. In addition, the recess process may use an etching gas to etch the layer above or below the 2DEG channel, that is, the active layer. The gate electrode is deposited on the recess region, and the width of the region may be the same as the recess region, or may be extended by 0 to 5 μm to the region of the source electrode or the drain electrode. The gate electrode is preferably made of an electrode having a high work function such as Ni, Ir, Pd, or Pt.

8A through 8D illustrate various types of recess regions. The recess region 90 may have various shapes such as a rectangular shape (FIG. 8A), a trench shape (FIG. 8B), a V-groove shape (FIG. 8C), a semicircle shape (FIG. 8D), and the like. Can have

A gate insulating layer (layer) may be formed on the recess region (S370), and the gate electrode may be formed on the gate insulating layer (layer) (S380). The gate insulating film (layer) can be divided into 51 and 52, as shown in Figs. 8B to 8D. That is, the gate insulating layer 51 may be formed before the recess region is formed, and the gate insulating layer 52 may be formed again on the recess region after etching the recess region.

The gate insulating layer (layer) is made of at least one of silicon oxide (SiO ₂ ), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), and silicon nitride (SiN), and is a metal-organic chemical vapor deposition. , Molecular beam epitaxy, hydride vapor phase epitaxy, plasma chemical vapor deposition, sputtering, and atomic layer deposition may be formed based on one or more (S370).

As described above, the nitride semiconductor device and the manufacturing method thereof according to the embodiments of the present invention, by sequentially doping the nitride thin film using an iron atom and a carbon atom, and then forming an undoped layer on top of the leakage current And minimization of the breakdown voltage can be minimized. Embodiments of the present invention reduce the amount of dislocations by first doping iron that does not affect the crystallinity at the time of growth of the nitride thin film, and doping carbon in the region where the memory effect due to iron doping occurs, In addition, free electrons present in the thin film can be reduced. Embodiments of the present invention, by making the nitride thin film has a high resistance does not impair the characteristics of the two-dimensional electron gas channel, and together with the effect of high withstand pressure. In addition, the device's stability and reliability are improved by minimizing leakage current when operating the device at high voltages, while reducing the carrier concentration (number) and electron mobility of the 2DEG channel.

1: Substrate 10: First High Resistance Layer
20: second high resistance layer 30: active layer
40: barrier layer 50: gate electrode
51, 52: gate insulating film 60: source electrode
70: drain electrode 80: cap layer
90: recessed area

Claims (19)

A first high resistance layer formed on the substrate and made of nitride doped with a first doping material;
A second high resistance layer formed on the first high resistance layer and made of nitride doped together with the first and second doping materials;
An active layer formed on the second high resistance layer and formed of undoped nitride;
A barrier layer formed on the active layer and allowing a two-dimensional electron gas channel to be formed in the active layer; And
And a source electrode and a drain electrode respectively contacting the barrier layer. The method according to claim 1,
The second doping material is less nitride semiconductor device, characterized in that contained in the first high resistance layer than the second high resistance layer. The method according to claim 1,
And the second doped material is substantially absent from the first high resistance layer. The method according to claim 1,
The concentration of the first doping material in the first high resistance layer is higher than that in the second high resistance layer. The method according to claim 1,
The first doped material is a nitride semiconductor device, characterized in that the iron (Fe). 6. The method of claim 5,
The second doped material is a nitride semiconductor device, characterized in that the carbon (C). The method according to claim 1,
The second high resistance layer,
The higher the height, the concentration of the first doping material is reduced, the nitride semiconductor device, characterized in that formed by increasing the concentration of the second doping material. The method according to claim 1,
The first high resistance layer, the second high resistance layer, and the active layer,
A nitride semiconductor device, each consisting of gallium nitride, the total thickness of which is 1 to 10 micrometers. The method according to claim 1,
Wherein the barrier layer comprises
A nitride semiconductor device comprising aluminum gallium nitride and having a thickness of 2 to 100 nanometers. The method according to claim 1,
And a cap layer formed on the barrier layer and formed of gallium nitride or aluminum gallium nitride. 11. The method according to any one of claims 1 to 10,
A gate insulating layer formed on the barrier layer; And
And a gate electrode contacting the gate insulating film layer. 11. The method according to any one of claims 1 to 10,
A recess region formed by etching the barrier layer or by etching part or all of the active layer together with the barrier layer;
A gate insulating layer formed in the recess region; And
And a gate electrode contacting the gate insulating film layer. Forming a first high resistance layer on the substrate using nitride doped with a first doped material;
Forming a second high resistance layer on the first high resistance layer by using a nitride doped together with the first doped material and the second doped material;
Forming an active layer using an undoped nitride on the second high resistance layer;
Forming a barrier layer over the active layer; And
Contacting the source electrode and the drain electrode on the barrier layer. The method of claim 13,
Forming the first high resistance layer,
A method of manufacturing a nitride semiconductor device, characterized in that formed by injecting iron (Fe) with a concentration of 1e ¹⁷ / cm ³ to 1e ¹⁹ / cm ³ . The method of claim 13,
Forming the second high resistance layer,
A method of manufacturing a nitride semiconductor device, characterized in that formed by injecting iron (Fe) and carbon (C) together to have a concentration of 1e ¹⁶ / cm ³ to 1e ¹⁹ / cm ³ . The method of claim 13,
Forming the second high resistance layer,
Stopping implantation of the first doped material;
Injecting the second doping material to increase the concentration; And
Stopping the injection of the second doping material when the second high resistance layer reaches a certain height or when the concentration of the first doping material in the second high resistance layer is lower than or equal to a certain concentration. A method for producing a nitride semiconductor device, characterized in that. The method of claim 13,
Forming a cap layer on the barrier layer by using gallium nitride or aluminum gallium nitride; 18. The method according to any one of claims 13 to 17,
Forming a gate insulating layer on the barrier layer; And
And contacting a gate electrode on the gate insulating layer. 18. The method according to any one of claims 13 to 17,
Etching the barrier layer or etching part or all of the active layer with the barrier layer to form a recessed region;
Forming a gate insulating layer in the recess region; And
And contacting a gate electrode on the gate insulating layer.

Images