KR20130076335A

KR20130076335A - Light emitting device

Info

Publication number: KR20130076335A
Application number: KR1020110144890A
Authority: KR
Inventors: 김종국; 정종필; 황정현
Original assignee: 엘지이노텍 주식회사
Priority date: 2011-12-28
Filing date: 2011-12-28
Publication date: 2013-07-08

Abstract

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.
A light emitting device according to an embodiment includes a substrate; A light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the substrate; And a nitride semiconductor layer disposed between the substrate and the light emitting structure and including a void, wherein the nitride semiconductor layer is formed of Al _x In _y Ga _(1-xy) N / GaN (where 0 ≦ x And a superlattice nitride semiconductor layer with ≦ 1, 0 ≦ y ≦ 1).

Description

[0001] LIGHT EMITTING DEVICE [0002]

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

A light emitting device is a device in which electrical energy is converted into light energy, and for example, various colors can be realized by adjusting a composition ratio of a compound semiconductor.

When a forward voltage is applied to a light emitting device, the electrons in the n-layer and the holes in the p-layer are coupled to emit energy corresponding to the energy gap between the conduction band and the valance band. It emits mainly in the form of heat or light, and emits in the form of light.

For example, nitride semiconductors have received great interest in the development of optical devices and high power electronic devices due to their high thermal stability and wide bandgap energy. In particular, blue light emitting devices, green light emitting devices, and ultraviolet light emitting devices using nitride semiconductors are commercially used and widely used.

The nitride semiconductor light emitting device according to the prior art includes a nitride semiconductor layer organically deposited on a sapphire substrate which is a heterogeneous substrate.

The nitride semiconductor light emitting device may be classified into a horizontal type and a vertical type according to the position of the electrode layer.

In the conventional horizontal light emitting device, a GaN epitaxial layer is grown on a sapphire substrate having a patterned sapphire substrate (PSS), and then a p electrode and an n electrode are formed through a mesa structure.

The distribution of light emitted from the horizontal light emitting device according to the prior art is about 30% of the light emitted from the top of the GaN and about 70% of the light emitted from the bottom of the sapphire substrate. Will come out.

This is a phenomenon caused by total reflection due to the difference in refractive index between the sapphire substrate and the air, which means that even if the patterned sapphire substrate (PSS) exists, the light beyond the critical angle cannot escape out much.

In addition, according to the prior art, light is absorbed, scattered, and lost due to a long emission path when emitting toward the PSS and the chip side during light emission.

Embodiments provide a light emitting device having an increased light efficiency, a manufacturing method of a light emitting device, a light emitting device package, and an illumination system.

A light emitting device according to an embodiment includes a substrate; A light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the substrate; And a nitride semiconductor layer disposed between the substrate and the light emitting structure and including a void, wherein the nitride semiconductor layer is formed of Al _x In _y Ga _(1-xy) N / GaN (where 0 ≦ x And a superlattice nitride semiconductor layer with ≦ 1, 0 ≦ y ≦ 1).

According to the light emitting device, the method of manufacturing the light emitting device, the light emitting device package, and the lighting system according to the embodiment, the light intensity may be improved by light extraction through light reflection and light scattering.

For example, according to the embodiment, a void may be formed in the nitride semiconductor layer including the superlattice nitride semiconductor layer, thereby improving light extraction through light reflection and light scattering.

In addition, according to the embodiment, by forming a nitride semiconductor layer including the superlattice nitride semiconductor layer, it is possible to increase the reliability improvement effect by blocking dislocations generated from the substrate.

1 is a cross-sectional view of a light emitting device according to an embodiment.
2A is a partially enlarged view of a light emitting device according to the embodiment;
2B is a perspective view of a void of the light emitting device according to the embodiment.
3 is a photographic illustration of a light emitting device according to an embodiment;
4 to 7 is a process example of a manufacturing method of a light emitting device according to the embodiment.
8 is a cross-sectional view of a light emitting device package according to the embodiment.
9 is a perspective view of a lighting unit according to an embodiment.
10 is a perspective view of a backlight unit according to an embodiment.

In the description of an embodiment, each layered region (Vb) film, region, pattern, or structure may be " on / over " or " down " of the substrate, each layer (film), region, pad, or pattern. In the case described as being formed under, "on / over" and "under" are formed "directly" or "indirectly" through another layer. It includes everything that is done. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

(Example)

1 is a cross-sectional view of a light emitting device 100 according to the embodiment, FIG. 2 is an enlarged view of a portion A of the light emitting device according to the embodiment, and FIG. 3 is a photographic illustration of the light emitting device according to the embodiment.

The light emitting device 100 according to the embodiment includes a substrate 105, a nitride semiconductor layer 107 including a void (V) on the substrate 105, and a nitride semiconductor layer 107. A first conductive semiconductor layer 112, an active layer 114 on the first conductive semiconductor layer 112, and a second conductive semiconductor layer 116 on the active layer 114 are included.

The nitride semiconductor layer 107 includes a first nitride semiconductor layer 107a and a second nitride semiconductor layer 107b, and includes at least one of the first nitride semiconductor layer 107a and the second nitride semiconductor layer 107b. One may include a superlattice nitride semiconductor layer.

For example, the first nitride semiconductor layer 107a is a superlattice nitride semiconductor layer, the second nitride semiconductor layer 107b is a superlattice nitride semiconductor layer, or the first nitride semiconductor layer 107a and the first layer Both of the two nitride semiconductor layers 107b may be superlattice nitride semiconductor layers.

The superlattice nitride semiconductor layer of the nitride semiconductor layer 107 may include Al _x In _y Ga _(1-xy) N / GaN (where 0 ≦ x ≦ 1 and 0 ≦ y ≦ 1). It is not.

Accordingly, according to the embodiment, a void may be formed in the nitride semiconductor layer 107 including the superlattice nitride semiconductor layer to improve light extraction by light extraction through light reflection and light scattering.

For example, as the LED chip size increases in recent years, the path is increased for light emitted to the side of the epi layer, thereby increasing absorption. The structure of the embodiment can increase light extraction efficiency by increasing the ratio of light emitted to the epi top layer.

In addition, according to the embodiment, the nitride semiconductor layer 107 including the superlattice nitride semiconductor layer is formed to block dislocations generated from the substrate, thereby improving the reliability improvement effect.

In an embodiment, the bottom region Va of the void V formed in the nitride semiconductor layer 107 may not have a flat bottom surface.

One of the prior arts is to make the void into a prism shape, which has a flat bottom. In addition, in the prior art, the bottom of the voids generated in the case of selective growth (selective growth) called Epitaxial Leteral Overgrowth (ELOG) is flat. This is because it stops growth, removes epi to the outside to form voids, and then forms a pad on the outside of the flat epi surface.

On the other hand, since the light emitting device according to the embodiment directly forms and fills voids during epi growth, the bottom shape is not flat. That is, the void (V) is made of a seed (seed), becomes larger, and fills again while changing the growth conditions. According to the embodiment, not only the growth structure but also the growth cost can be reduced, and the problem of defects that can occur while taking out the pattern can be reduced.

In addition, in the embodiment, the void V may have a vertical section having a lower region Va and an upper region Vb, and the upper region Vb may have a predetermined angle. The upper region Va may have a corner upward.

In the prior art, in the case of selective growth by forming a predetermined pattern to form a void, most of the prior art uses a method of directly filling the pattern rather than having an angle.

On the other hand, the embodiment may maintain the growth mode as it is to have excellent crystallinity that is commercially required effectively, and in such a growth mode, the upper region Va of the void may have a predetermined angle (angle). .

In addition, in an embodiment, the void V may have a diameter D2 of a horizontal cross section of about 1 μm to about 5 μm. The size D2 of the void V may be a horizontal size, but is not limited thereto.

For example, when the size of the voids V is too small, less than 1 μm, it is difficult to effectively scatter the light in light of 450 nm wavelength, and large voids larger than 5 μm do not maintain excellent crystallinity. Accordingly, suitable void sizes that can be used in practice can have a size of about 1 μm to about 5 μm. While the horizontal size of the voids in the prior art is about 0.4 μm or less, the voids in the embodiment may have a size of about 1 μm to about 5 μm, so that light extraction efficiency may be significantly improved through light scattering.

In an exemplary embodiment, the void V may be formed in the nitride semiconductor layer 107 below the intermediate region based on the vertical thickness D3 from the active layer 114 to the substrate 105. For example, the vertical thickness D4 of the nitride semiconductor layer 107 on which the voids V are formed is less than or equal to the middle region based on the vertical thickness D3 from the active layer 114 to the substrate 105. Can be located.

On the other hand, the prior art for forming the void from the outside it is difficult to see the limitation of the void position in the prior art because it is necessary to stop the growth and to form a pattern and regrow any part.

On the other hand, in the light emitting device according to the embodiment, the void V is formed in the region of the first conductive semiconductor layer 112 below the intermediate region based on the vertical thickness of the first conductive semiconductor layer 112. By fully recovering from the crystal defect problems that occur, commercially available quality can be made.

In addition, the vertical section of the void V included in the nitride semiconductor layer may have a diamond shape.

In addition, as shown in FIG. 2B, the one-sided end surface of the void V included in the nitride semiconductor layer may be hexagonal.

In an embodiment, the void V may have a distance D1 spaced apart from the active layer 114 in the direction of the substrate 105 to be about 1 μm or more.

Through this, the crystal defect problem occurring when the void (V) is formed in the embodiment can be sufficiently recovered to produce a commercially effective quality.

According to the light emitting device according to the embodiment, a void may be formed in the epitaxial structure to improve light extraction by light extraction through light scattering.

VF3 (20mA) Vbr (-10 μA) IR (-5V) WD (nm) IV (chip) Ref 3.26 14.6 0.04 452.9 124.1 Example 3.25 13.9 0.05 444.9 128.3

Table 1 is an example of light extraction improvement data compared to the prior art (Ref).

For example, according to the embodiment, by improving the light extraction through light scattering by forming a void in the epi structure compared to the prior art, a light improvement of about 4% can be obtained.

In an embodiment, when the substrate 105 is a sapphire substrate, the refractive index may be about 1.8, and the refractive index of the light emitting structure 110 may be about 2.3, but is not limited thereto. In addition, the refractive index of the nitride semiconductor layer 107 may have a refractive index between the light emitting structure 110 and the substrate 105, but is not limited thereto.

Reference numerals in FIG. 1 will be described below in the manufacturing method.

According to the light emitting device, the manufacturing method of the light emitting device, the light emitting device package and the illumination system according to the embodiment, by improving the light extraction through light reflection and light scattering by forming a void in the epi structure can be improved.

Hereinafter, a method of manufacturing a light emitting device according to an embodiment will be described with reference to FIGS. 4 to 7.

First, the substrate 105 is prepared as shown in FIG. 4. The substrate 105 may include a conductive substrate or an insulating substrate. For example, the substrate 105 may include sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ 0. ₃ May be used. A concavo-convex structure may be formed on the substrate 105, but the present invention is not limited thereto. Impurities on the surface may be removed by wet cleaning the substrate 105.

Thereafter, a nitride semiconductor layer 107 is formed on the substrate 105, and a first conductivity type semiconductor layer 112, an active layer 114, and a second conductivity type semiconductor layer (on the nitride semiconductor layer 107) are formed. The light emitting structure 110 including the 116 may be formed.

A buffer layer (not shown) may be formed on the substrate 105. The buffer layer may mitigate lattice mismatch between the material of the light emitting structure 110 and the substrate 105, and the material of the buffer layer may be a Group III-V compound semiconductor such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN. , AlInN may be formed of at least one.

5, the nitride semiconductor layer 107 including the voids V may be formed on the substrate 105.

The nitride semiconductor layer 107 includes a first nitride semiconductor layer 107a and a second nitride semiconductor layer 107b, and any of the first nitride semiconductor layer 107a and the second nitride semiconductor layer 107b. One or more may be a superlattice nitride semiconductor layer.

In an embodiment, the void V may have a vertical cross section having a lower region Va and an upper region Vb, and the upper region Vb may have a predetermined angle. The upper region Vb may have a corner upward.

The lower region Va of the void may be formed in the first nitride semiconductor layer 107a, and the upper region Vb of the void may be formed in the second nitride semiconductor layer 107b.

The embodiment may maintain the growth mode as it is to have excellent crystallinity that is commercially required effectively, and in such a growth mode, the upper region Vb of the void V may have a predetermined angle. have.

According to an embodiment, the bottom area Va of the void V may not be flat. Since the light emitting device according to the embodiment directly forms and fills voids during epi growth, the bottom shape may not be flat. That is, in the embodiment, the voids V are made into seeds and become larger, and are filled again while changing the growth conditions. According to the embodiment, not only the growth structure but also the growth cost can be reduced, and the problem of defects that can occur while taking out the pattern can be reduced.

Also, in an embodiment, the voids V may have a size of about 1 μm to about 5 μm. The size of the void V may be a horizontal size, but is not limited thereto.

For example, when the size of the voids V is too small, less than 1 μm, it is difficult to effectively scatter the light in light of 450 nm wavelength, and large voids larger than 5 μm do not maintain excellent crystallinity. Accordingly, suitable void sizes that can be used in practice can have a size of about 1 μm to about 5 μm.

In addition, in the exemplary embodiment, the voids V are formed in the nitride semiconductor layer 107 region below the intermediate region based on the vertical thickness of the substrate 105 from the active layer 114, and thus crystal defects occur during void formation. Can be sufficiently recovered to produce a commercially available quality.

In addition, according to the embodiment, the voids V may be spaced apart from the active layer 114 by about 1 μm or more. Through this, the crystal defect problem occurring when the void (V) is formed in the embodiment can be sufficiently recovered to produce a commercially effective quality.

According to the light emitting device according to the embodiment, a void may be formed in the epi structure to improve light extraction through light scattering, thereby improving light intensity. For example, according to the embodiment, by improving the light extraction through light scattering by forming a void in the epi structure compared to the prior art, a light improvement of about 4% can be obtained.

Hereinafter, a process of forming the nitride semiconductor layer 107 including the voids V will be described in detail.

The superlattice nitride semiconductor layer is a low refractive index layer, and the AlGaN / GaN SLs layer is about 100pairs and the thickness is about 100 nm or more and 1 μm or less, and the nitride semiconductor layer 107 is grown at a temperature about 100 ° C. lower than the GaN growth temperature. An void may be formed and about 3.4% light enhancement may be obtained by light reflection and tube scattering.

When the superlattice nitride semiconductor layer is greater than about 1 μm, excessive crystallinity may be excessively bad, and defects may be generated to cause absorption.

In an embodiment, the void structure may be made by excessively doping Si in the first nitride semiconductor layer 107a in a state where the growth temperature is lowered, and thereafter, the second nitride semiconductor layer 107b is sufficiently increased by increasing the growth temperature. ) Can merge the void (V). For example, to form voids (V), the temperature is lowered from about 50 ° C. to 500 ° C. below the normal temperature, for example from about 1000 ° C. to 1100 ° C., and Si doping may require about 5E17 cm ⁻³ or more, but It is not limited.

Alternatively, voids may be formed by maintaining the usual temperature of the temperature in the embodiment, but with Si doping of about 1E19 cm ⁻³ or more.

Next, in the embodiment, after forming the lower void Va, the upper void Vb should be merged to fill the void. In this case, a growth condition for inducing lateral growth is required. To this end, it is necessary to increase the growth temperature by about 50 ° C. to 100 ° C. or more, or to lower the growth rate by about 20% or more than the normal GaN growth temperature.

For example, it is grown at about 1150 ℃ to 1200 ℃, the growth rate can be controlled to about 2 ㎛ / hr to 2.5 ㎛ / hr, but is not limited thereto.

In addition, in an embodiment, the refractive index of the superlattice nitride semiconductor layer may be determined by an average Al composition of Al _x In _y Ga _(1-xy) N / GaN. For example, the composition of Al may be about 5% to about 10% or less. When the composition of Al is more than 10%, the crystallinity may be excessively deteriorated and defects may be generated to cause absorption.

Thereafter, a first conductivity type semiconductor layer 112 is formed on the nitride semiconductor layer 107 including the voids V. Referring to FIG.

The first conductivity type semiconductor layer 112 may be implemented as a group III-V compound semiconductor doped with a first conductivity type dopant, and when the first conductivity type semiconductor layer 112 is an N-type semiconductor layer, The first conductive dopant may be an N-type dopant and may include Si, Ge, Sn, Se, or Te, but is not limited thereto.

The first conductive semiconductor layer 112 may include a semiconductor material having a composition formula of In _x Al _y Ga ₁ _-x- _y N (0? X? 1, 0? _Y? 1, 0? _X + .

The first conductive semiconductor layer 112 may be formed of any one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, InP.

The first conductive semiconductor layer 112 may form an N-type GaN layer using a chemical vapor deposition method (CVD), molecular beam epitaxy (MBE), or sputtering or hydroxide vapor phase epitaxy (HVPE). . In addition, the first conductive semiconductor layer 112 may include a silane containing n-type impurities such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and silicon (Si). The gas SiH ₄ may be injected and formed.

Next, the current diffusion layer 122 is formed on the first conductivity type semiconductor layer 112. The current diffusion layer 122 may be an undoped gallium nitride layer, but is not limited thereto. The current spreading layer 122 may have a thickness of 50 nm to 200 nm, but is not limited thereto.

Next, in an embodiment, the electron injection layer 124 may be formed on the current spreading layer 122. The electron injection layer 124 may be a first conductivity type gallium nitride layer. For example, the electron injection layer 124 can be efficiently injected by the n-type doping element is doped at a concentration of 6.0x10 ¹⁸ atoms / cm ³ ~ 8.0x10 ¹⁸ atoms / cm ³ . The electron injection layer 124 may be formed to a thickness of about 1000 μm or less, but is not limited thereto.

In addition, the embodiment may form a strain control layer (not shown) on the electron injection layer 124. For example, a strain control layer formed of In _y Al _x Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) / GaN may be formed on the electron injection layer 124.

The strain control layer can effectively alleviate the stress that is caused by the lattice mismatch between the first conductive semiconductor layer 112 and the active layer 114.

Further, as the strain control layer is repeatedly laminated in at least six cycles having compositions such as first In _x1 GaN and second In _x2 GaN, more electrons are collected at a low energy level of the active layer 114, The probability of recombination of holes is increased and the luminous efficiency can be improved.

Thereafter, an active layer 114 is formed on the strain control layer.

The active layer 114 has an energy band inherent in the active layer (light emitting layer) material because electrons injected through the first conductive semiconductor layer 112 and holes injected through the second conductive semiconductor layer 116 formed thereafter meet each other. It is a layer that emits light with energy determined by.

The active layer 114 may be formed of at least one of a single quantum well structure, a multi quantum well structure (MQW), a quantum-wire structure, or a quantum dot structure. For example, the active layer 114 may be formed with a multiple quantum well structure by injecting trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) But is not limited thereto.

The well layer / barrier layer of the active layer 114 is formed of one or more pair structures of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP. But it is not limited thereto. The well layer may be formed of a material having a lower band gap than the band gap of the barrier layer.

In an embodiment, the electron blocking layer 126 is formed on the active layer 114 to improve the luminous efficiency by acting as electron blocking and cladding of the active layer. For example, the electron blocking layer 126 may be formed of Al _x In _y Ga _(1-xy) N (0 ≦ _x ≦ 1,0 ≦ _y ≦ 1) based semiconductor, and may be formed of the active layer 114. It may have a higher energy band gap than the energy band gap, and may be formed to a thickness of about 100 kPa to about 600 kPa, but is not limited thereto.

In addition, the electron blocking layer 126 may be formed of a superlattice made of Al _z Ga _(1-z) N / GaN (0? _Z ? 1), but is not limited thereto.

The electron blocking layer 126 may efficiently block electrons overflowed by ion implantation into a p-type and increase hole injection efficiency. For example, the electron blocking layer 126 may efficiently block electrons that overflow due to ion implantation in a concentration range of about 10 ¹⁸ to 10 ²⁰ / cm ³ and increase the injection efficiency of holes.

The second conductive type semiconductor layer 116 is a second conductive type dopant is doped -5-group three-V compound semiconductor, for _{example, In x Al y Ga 1 -x-} y N (0≤x≤1, 0≤y And a semiconductor material having a composition formula of ≦ 1, 0 ≦ x + y ≦ 1). When the second conductive semiconductor layer 116 is a P-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, Ba, or the like as a P-type dopant.

The second conductivity type semiconductor layer 116 is a bicetyl cyclone containing p-type impurities such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and magnesium (Mg) in the chamber. Pentadienyl magnesium (EtCp ₂ Mg) {Mg (C ₂ H ₅ C ₅ H ₄ ) ₂ } may be injected to form a p-type GaN layer, but is not limited thereto.

In an exemplary embodiment, the first conductive semiconductor layer 112 may be an N-type semiconductor layer, and the second conductive semiconductor layer 116 may be a P-type semiconductor layer, but is not limited thereto. In addition, a semiconductor, for example, an N-type semiconductor layer (not shown) having a polarity opposite to that of the second conductive type may be formed on the second conductive type semiconductor layer 116. Accordingly, the light emitting structure 110 may be implemented as any one of an N-P junction structure, a P-N junction structure, an N-P-N junction structure, and a P-N-P junction structure.

Thereafter, a translucent ohmic layer 130 is formed on the second conductivity type semiconductor layer 116.

For example, the light-transmitting ohmic layer 130 may be included, and a single metal or a metal alloy, a metal oxide, or the like may be stacked in multiple layers so as to efficiently inject holes. For example, the light-transmitting ohmic layer 130 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO) , ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, It may be formed including at least one of Pt, Au, Hf, but is not limited to these materials.

Next, a portion of the light-transmitting ohmic layer 130, the light emitting structure 110, and the like is removed to expose the first conductive semiconductor layer 112.

Next, a second electrode 142 is formed on the transparent ohmic layer 130 and a first electrode 141 is formed on the exposed first conductive semiconductor layer 112.

8 is a view illustrating a light emitting device package in which a light emitting device is installed, according to embodiments.

The light emitting device package 200 according to the embodiment includes a package body 205, a third electrode layer 213 and a fourth electrode layer 214 provided on the package body 205, a package body 205, And a molding member 230 surrounding the light emitting device 100. The light emitting device 100 is electrically connected to the third electrode layer 213 and the fourth electrode layer 214,

The package body 205 may include a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the light emitting device 100.

The third electrode layer 213 and the fourth electrode layer 214 are electrically isolated from each other and provide power to the light emitting device 100. The third electrode layer 213 and the fourth electrode layer 214 may function to increase light efficiency by reflecting the light generated from the light emitting device 100, And may serve to discharge heat to the outside.

The light emitting device 100 may be a horizontal type light emitting device illustrated in FIG. 1, but is not limited thereto.

The light emitting device 100 may be installed on the package body 205 or on the third electrode layer 213 or the fourth electrode layer 214.

The light emitting device 100 may be electrically connected to the third electrode layer 213 and / or the fourth electrode layer 214 by a wire, flip chip, or die bonding method. In the embodiment, the light emitting device 100 is electrically illustrated through a wire with the third electrode layer 213 and the fourth electrode layer 214.

The molding member 230 surrounds the light emitting device 100 to protect the light emitting device 100. In addition, the molding member 230 may include a phosphor 232 to change the wavelength of light emitted from the light emitting device 100.

A light guide plate, a prism sheet, a diffusion sheet, a fluorescent sheet, and the like, which are optical members, may be disposed on a path of light emitted from the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit or function as a lighting unit. For example, the lighting system may include a backlight unit, a lighting unit, a pointing device, a lamp, and a streetlight.

9 is a perspective view 1100 of a lighting unit according to an embodiment. However, the lighting unit 1100 of FIG. 9 is an example of a lighting system, but is not limited thereto.

In the embodiment, the lighting unit 1100 is connected to the case body 1110, the light emitting module unit 1130 installed on the case body 1110, and the case body 1110 and receive power from an external power source. It may include a terminal 1120.

The case body 1110 may be formed of a material having good heat dissipation characteristics. For example, the case body 1110 may be formed of a metal material or a resin material.

The light emitting module unit 1130 may include a substrate 1132 and at least one light emitting device package 200 mounted on the substrate 1132.

The substrate 1132 may be a circuit pattern printed on an insulator, and for example, a general printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, and the like. It may include.

In addition, the substrate 1132 may be formed of a material that reflects light efficiently, or the surface may be formed of a color that reflects light efficiently, for example, white, silver, or the like.

The at least one light emitting device package 200 may be mounted on the substrate 1132. Each of the light emitting device packages 200 may include at least one light emitting diode (LED) 100. The light emitting diodes 100 may include colored light emitting diodes emitting red, green, blue, or white colored light, and UV light emitting diodes emitting ultraviolet (UV) light.

The light emitting module unit 1130 may be disposed to have a combination of various light emitting device packages 200 to obtain color and luminance. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be combined to secure high color rendering (CRI).

The connection terminal 1120 may be electrically connected to the light emitting module unit 1130 to supply power. In an embodiment, the connection terminal 1120 is coupled to the external power source by a socket, but is not limited thereto. For example, the connection terminal 1120 may be formed in a pin shape and inserted into an external power source, or may be connected to the external power source by a wire.

10 is an exploded perspective view 1200 of a backlight unit according to an embodiment. However, the backlight unit 1200 of FIG. 10 is an example of the illumination system and is not limited thereto.

The backlight unit 1200 according to the embodiment includes a light guide plate 1210, a light emitting module unit 1240 that provides light to the light guide plate 1210, a reflective member 1220 under the light guide plate 1210, and the light guide plate. 1210, a bottom cover 1230 for accommodating the light emitting module unit 1240 and the reflective member 1220, but is not limited thereto.

The light guide plate 1210 serves to diffuse light into a surface light source. The light guide plate 1210 may be made of a transparent material such as acrylic resin such as PMMA (polymethyl methacrylate), polyethylene terephthalate (PET), polycarbonate (PC), cycloolefin copolymer (COC), and polyethylene naphthalate Resin. &Lt; / RTI >

The light emitting module unit 1240 provides light to at least one side of the light guide plate 1210 and ultimately serves as a light source of a display device in which the backlight unit is installed.

The light emitting module 1240 may be in contact with the light guide plate 1210, but is not limited thereto. Specifically, the light emitting module 1240 includes a substrate 1242 and a plurality of light emitting device packages 200 mounted on the substrate 1242. The substrate 1242 is mounted on the light guide plate 1210, But is not limited to.

The substrate 1242 may be a printed circuit board (PCB) including a circuit pattern (not shown). However, the substrate 1242 may include not only a general PCB, but also a metal core PCB (MCPCB), a flexible PCB (FPCB), and the like.

The plurality of light emitting device packages 200 may be mounted on the substrate 1242 such that a light emitting surface on which the light is emitted is spaced apart from the light guiding plate 1210 by a predetermined distance.

The reflective member 1220 may be formed under the light guide plate 1210. The reflection member 1220 reflects the light incident on the lower surface of the light guide plate 1210 so as to face upward, thereby improving the brightness of the backlight unit. The reflective member 1220 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto.

The bottom cover 1230 may receive the light guide plate 1210, the light emitting module 1240, and the reflective member 1220. For this purpose, the bottom cover 1230 may be formed in a box shape having an opened upper surface, but the present invention is not limited thereto.

The bottom cover 1230 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Accordingly, the contents of such combinations and modifications should be construed as being included in the scope of the embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. It can be seen that the modification and application of branches are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that the present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics thereof.

100: light emitting element, 105: substrate
V: void, 107: nitride semiconductor layer
112: first conductive semiconductor layer, 114: active layer
116: second conductivity type semiconductor layer

Claims

Board;
The first conductive semiconductor layer, the active layer and the second conductive semiconductor layer on the substrate
Light emitting structure comprising; And
And a nitride semiconductor layer disposed between the substrate and the light emitting structure and including a void.
The nitride semiconductor layer includes a superlattice nitride semiconductor layer having Al _x In _y Ga _(1-xy) N / GaN (where 0 ≦ x ≦ 1 and 0 ≦ y ≦ 1).

The method according to claim 1,
The nitride semiconductor layer
A first nitride semiconductor layer and a second nitride semiconductor layer,
At least one of the first nitride semiconductor layer and the second nitride semiconductor layer includes the superlattice nitride semiconductor layer.

The method according to claim 1,
The substrate is a light emitting device comprising a light extraction pattern.

The method according to claim 1,
The void has a vertical cross section
And a lower region and an upper region, wherein the upper region has a predetermined angle.

The method according to claim 1,
The void
A light emitting device having a horizontal cross section diameter of 1 μm to 5 μm.

The method according to claim 1,
The void
A light emitting device formed in the nitride semiconductor layer region of the intermediate region or less based on the vertical thickness from the active layer to the substrate.

The method according to claim 1,
The void
The light emitting device is disposed on the nitride semiconductor layer spaced apart from the active layer in the direction of the substrate by at least 1 ㎛.

The method according to claim 1,
The superlattice nitride semiconductor layer has a thickness of 100nm to 1㎛ or less.

The method according to claim 1,
The composition of the Al of the superlattice nitride semiconductor layer is 5% to 10% or less.

The method according to claim 1,
And a vertical section of the void included in the nitride semiconductor layer has a diamond shape.

The method according to claim 1,
The light emitting device of claim 1, wherein the one end surface of the void included in the nitride semiconductor layer is hexagonal.