KR101814052B1 - Light emitting device - Google Patents

Abstract

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.
A light emitting device according to an embodiment includes a substrate; A first semiconductor layer including indium (In) on the substrate; And a light emitting structure on the first semiconductor layer, and a dislocation mode on the first semiconductor layer upper surface.

Description

[0001] LIGHT EMITTING DEVICE [0002]

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

Light emitting devices are compound semiconductors that convert electrical energy into light energy. By controlling the composition ratio of compound semiconductors, various colors can be realized.

When a forward voltage is applied to a light emitting device, the electrons in the n-layer and the holes in the p-layer are coupled to emit energy corresponding to the energy gap between the conduction band and the valance band. It emits mainly in the form of heat or light, and emits in the form of light.

For example, nitride semiconductors have received great interest in the development of optical devices and high power electronic devices due to their high thermal stability and wide bandgap energy. Particularly, blue light emitting devices, green light emitting devices, ultraviolet (UV) light emitting devices, and the like using nitride semiconductors have been commercialized and widely used.

The nitride semiconductor light emitting device includes a nitride semiconductor layer which is chemically deposited on a sapphire substrate which is a different substrate.

That is, since the nitride semiconductor layer is formed on a different substrate such as sapphire, SiC, or Si, dislocation density is increased due to lattice mismatch due to heterojunction, thereby adversely affecting the reliability and luminescence efficiency of the light emitting device.

Embodiments provide a light emitting device with improved reliability, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

Also, embodiments are directed to a light emitting device having improved light emitting efficiency, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

A light emitting device according to an embodiment includes a substrate; A first semiconductor layer including indium (In) on the substrate; And a light emitting structure on the first semiconductor layer, and a dislocation mode on the first semiconductor layer upper surface.

Further, the light emitting device according to the embodiment includes a substrate; A first conductive semiconductor layer on the substrate; An active layer on the first conductive semiconductor layer; And a second conductive semiconductor layer on the active layer, wherein a first semiconductor layer containing indium (In) is disposed between the first conductive semiconductor layer and the active layer, A dislocation mode can be formed.

Embodiments can provide a light emitting device with improved reliability, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

In addition, embodiments can provide a light emitting device with improved light emitting efficiency, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

1 is a sectional view of a light emitting device according to a first embodiment;
2 is a GaN template AFM image in a light emitting device according to an embodiment.
FIGS. 3 and 4 are AFM images for a potential mode in a light emitting device according to an embodiment. FIG.
5 is a sectional view of a light emitting device according to a second embodiment;
6 is a cross-sectional view of a light emitting device according to a third embodiment;
7 is a sectional view of a light emitting device package according to an embodiment.
8 is a perspective view of a lighting unit according to an embodiment;
9 is a perspective view of a backlight unit according to an embodiment.

In the description of the embodiments, it is to be understood that each layer (film), area, pattern or structure may be referred to as being "on" or "under" the substrate, each layer Quot; on "and" under "are intended to include both" directly "or" indirectly " do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

(Embodiment 1)

1 is a cross-sectional view of a light emitting device 100 according to a first embodiment.

The light emitting device 100 according to the embodiment includes a substrate 105, a first first semiconductor layer 115 containing indium (In) on the substrate 105, and a first semiconductor layer 115 including indium Lt; RTI ID = 0.0 > 115 < / RTI >

The first first semiconductor layer 115 including indium may have a superlattice structure of In _x Ga _{1 -x} N (0 <x ₁ ), In _x GaN _{1 -x} / GaN (0 <x 1) / GaN superlattice structure.

The first substrate 105 includes a conductive substrate or an insulating substrate such as sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ O ₃ . May be used. A concavo-convex structure may be formed on the substrate 105, but the present invention is not limited thereto. The first substrate 105 may be wet-cleaned to remove impurities on the surface.

A buffer layer 110 may be formed on the substrate 105. The buffer layer 110 may alleviate the lattice mismatch between the material of the light emitting structure and the substrate 105. The material of the buffer layer may be a group III-V compound semiconductor such as undoped GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.

A first semiconductor layer 115 containing indium may be formed on the buffer layer 110. For example, the first semiconductor layer 115 including indium may be formed of In _x Ga _{1 -x} N (0 <x ₁ ), In _x GaN _{1 -x} / GaN (0 <x 1) , And an InN / GaN superlattice structure.

An embodiment of the present invention is to provide a highly reliable light emitting device. To this end, a dislocation generated between the substrate and the nitride semiconductor layer is uniformly removed in a uniform manner from the bottom to improve reliability, To improve the performance of the device.

Pits are formed in the first conductive semiconductor layer 132 formed on the substrate 105 as the dislocation size increases due to the compressive stress.

As the pits begin to form, a carrier imbalance is formed around them, which lowers the resistance and acts as a leakage path. In order to suppress such unbalance, the first semiconductor layer 115 including indium is inserted below the first conductivity type semiconductor layer 132 to uniformly control the potential D, have.

In the embodiment, the first semiconductor layer 115 including indium may have a super lattice structure of In _x Ga _{1 -x} N (0 <x? ₁ ), In _x GaN _{1 -x} / GaN / GaN superlattice structure, and a relatively large size of indium (In) may cause a pit (P). In addition, the dislocations D can be uniformly arranged by the induced pits to prevent the potentials from being concentrated, thereby preventing failures of the devices.

Since the occurrence of dislocations is not limited to any particular position, the first semiconductor layer 115 including indium serving as a dislocation control layer in the embodiment is formed over the entire region of the substrate 105, Control function can be performed.

The first semiconductor layer 115 including indium may be formed as a single layer or a plurality of layers and may be formed of In _x GaN _{1 -x} / GaN (0 &lt; x? 1) superlattice structure, InN / GaN superlattice structure But the present invention is not limited thereto.

The first semiconductor layer 115 including indium may be formed to a thickness of about 30 Å to about 500 Å. If the thickness of the first semiconductor layer 115 including indium exceeds 500 Å, And the thickness of the single layer may have a thickness of about 30 angstroms, but is not limited thereto.

In the embodiment, the first semiconductor layer 115 containing indium contains a superlattice structure of In _x Ga _{1 -x} N (0 <x ₁ ) or In _x GaN _1-x / GaN (0 <x 1) , The composition (x) of indium may be set in the range of about 2% to about 5% (0.02? X? 0.05). When the composition of indium is less than 2%, pits may not be induced. When the composition of indium is more than 5%, indium will not be able to function due to aggregation of indium. When indium is formed in excess of 5% Volatilization of In may be a problem in the step of forming the first conductivity type semiconductor layer 132 formed in the first conductivity type semiconductor layer.

FIG. 2 is an AFM (Atomic Force Microscope) image of a GaN template in a light emitting device according to an embodiment. FIGS. 3 and 4 illustrate an AFM image for a potential mode in a light emitting device according to an embodiment. to be.

Embodiments may include a dislocation mode on the top surface of the first semiconductor layer 115 comprising indium.

For example, as a comparative example, when a GaN template AFM image in a light emitting device is as shown in FIG. 2, a dislocation mode (M1 or M2) is formed on a first semiconductor layer 115 including indium as shown in FIG. 3 or FIG. And the potential D can be uniformly controlled by the potential mode M1 or M2, thereby improving the reliability of the device.

Referring to FIG. 1 again, the first conductive semiconductor layer 132 may be formed of a Group 3-V compound semiconductor doped with a first conductive type dopant, and the first conductive semiconductor layer 132 may be formed of N Type semiconductor layer, the first conductive type dopant may include Si, Ge, Sn, Se, and Te as an N-type dopant, but the present invention is not limited thereto.

The first conductive semiconductor layer 132 may be formed of one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP and InP.

The embodiment may include a current diffusion layer 142 and an electron injection layer 144 on the first conductivity type semiconductor layer 132.

The current diffusion layer 142 may be formed of an undoped nitride semiconductor layer, but is not limited thereto. For example, the current diffusion layer 142 may be formed to a thickness of about 3000 to 5000 ANGSTROM at a temperature of about 1000 to 1100 DEG C and a pressure of about 150 to 250 torr.

Since the current diffusion layer 142 is grown at a temperature higher than the growth temperature of the first conductivity type semiconductor layer 132, the current diffusion layer 142 may fill the concave and convex portions and have a flat upper surface. Therefore, the subsequent layers formed on the current diffusion layer 142 can be formed with good crystallinity.

Thereafter, the electron injection layer 144 may be formed on the current diffusion layer 142. The electron injection layer 144 may be a first conductivity type gallium nitride semiconductor layer. For example, the electron injection layer 144 may be doped with an N-type doping element such as Si, and may be formed to a thickness of about 1000 Å or less, but the present invention is not limited thereto.

For example, the electron injection layer 144 may be an electron injection efficiently by being doped at a concentration of the n-type doping element ^{6.0x10 18 atoms / cm 3 ~ 8.0x10} 18 atoms / cm 3.

Thereafter, the active layer 134 is formed on the electron injection layer 144.

Electrons injected through the first conductivity type semiconductor layer 132 and holes injected through the second conductivity type semiconductor layer 136 which are formed later meet with each other to form an energy band unique to the active layer Which emits light having an energy determined by &lt; RTI ID = 0.0 &gt;

The active layer 134 may be formed of at least one of a single quantum well structure, a multi quantum well (MQW) structure, a quantum-wire structure, or a quantum dot structure.

The well layer / barrier layer of the active layer 134 may be formed of any one or more pairs of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP But is not limited thereto. The well layer may be formed of a material having a band gap lower than the band gap of the barrier layer.

An embodiment may include an electron blocking layer 146 on the active layer 134.

In the embodiment, the electron blocking layer 146 is formed on the active layer 134 to serve as electron blocking and cladding of the active layer, thereby improving the luminous efficiency. For example, the electron blocking layer 146 may be formed of a semiconductor of Al _x In _y Ga _(1-xy) N (0? _{X ? 1, 0? Y ? 1} ) And may have an energy band gap higher than the energy band gap, and may be formed to a thickness of about 100 A to about 600 A, but the present invention is not limited thereto.

In addition, the electron blocking layer 146 may be formed of a superlattice made of Al _z Ga _(1-z) N / GaN (0? _Z ? 1), but is not limited thereto.

The electron blocking layer 146 effectively blocks electrons that are ion-implanted into the p-type and overflows, thereby increasing the hole injection efficiency. For example, the electron blocking layer 146 may be formed by implanting Mg in a concentration range of about 10 ¹⁸ to 10 ²⁰ / cm ³ to efficiently block electrons that overflow and increase the hole injection efficiency.

A second conductive semiconductor layer 136 is formed on the electron blocking layer 146.

The second conductive semiconductor layer 136 may be a Group 3-Group-5 compound semiconductor doped with a second conductive dopant, such as In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y 1, 0? X + y? 1). When the second conductive semiconductor layer 136 is a P-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, and Ba as a P-type dopant.

The first conductive semiconductor layer 132 may be an N-type semiconductor layer and the second conductive semiconductor layer 136 may be a P-type semiconductor layer. However, the present invention is not limited thereto. On the second conductive semiconductor layer 136, a semiconductor layer, for example, an N-type semiconductor layer (not shown) having a polarity opposite to the second conductive type may be formed. Accordingly, the light emitting structure can be implemented by any one of an N-P junction structure, a P-N junction structure, an N-P-N junction structure, and a P-N-P junction structure.

Next, the ohmic layer 150 is disposed on the second conductive semiconductor layer 136.

For example, the ohmic layer 150 may be formed by laminating a single metal, a metal alloy, a metal oxide, or the like so as to efficiently perform carrier injection. For example, the ohmic layer 150 may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (ZnO), indium gallium tin oxide (AZO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON nitride, AGZO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Ni, IrOx / Au, and Ni / IrOx / , Au, and Hf, and is not limited to such a material.

Thereafter, a first electrode 161 is formed on the exposed first conductivity type semiconductor layer 132 after mesa etching so that a part of the first conductivity type semiconductor layer 132 is exposed, and the ohmic layer 150 is formed on the exposed first conductivity type semiconductor layer 132. [ The second electrode 162 may be formed on the second electrode 162.

Embodiments can provide a light emitting device with improved reliability, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

(Second Embodiment)

5 is a sectional view of the light emitting device 102 according to the second embodiment.

The light emitting device 102 according to the second embodiment can adopt the technical features of the light emitting device 100 according to the first embodiment.

The second embodiment includes an undoped semiconductor layer 122 including a protrusion B and a recess A on a first semiconductor layer 115 including indium (In), and an undoped semiconductor layer 122 The nitride semiconductor superlattice layer 124 may be formed on the nitride semiconductor superlattice layer 124.

When the amount of carrier injected by the first electrode 161 is increased, a flow of electrons carriers flows down to the lower portion, and a layer which blocks the flow in the downward direction is required. For example, the undoped semiconductor layer 122 and the nitride semiconductor superlattice layer 124 are appropriately used to provide a role of allowing the carrier to spread to a minimum extent.

Also, in the second embodiment, the concave portion A of the undoped semiconductor layer 122 and the nitride semiconductor superlattice layer 124 serves to control the potential again so that the electric power can be uniformly controlled without aggregation The reliability of the device can be improved.

In the second embodiment, a depressed depressed portion may be formed on the upper surface of the undoped semiconductor layer 122.

For example, a depressed portion of a wedge shape may be formed by controlling the temperature or the pressure during the growth of the undoped semiconductor layer 122.

For example, when the undoped semiconductor layer 122 is grown at a temperature of about 550 ° C. to about 940 ° C. and a pressure of about 100 torr to about 500 torr, a depressed depressed portion may be included on the upper surface.

The cross section of the concave portion A may have a triangular shape and may have a hexagonal shape when viewed from the top. For example, the recess A may have the shape of a hexagonal horn, but is not limited thereto.

Such concavo-convex portions can be selectively formed in the portion where the dislocations D are formed, and since the resistance of the concave portions in the concavo-convex portions is larger than the resistance of the protrusions, the resistance of the portion where the dislocations D are generated can be raised to form a high- have.

Therefore, when the static electricity is applied, the high resistance region blocks the current concentrated through the potential D, and reduces the leakage current due to the potential D, so that the ESD immunity of the light emitting element 100 can be improved. At this time, the electrons as the carriers can move through the region of the projected portion B having a low resistance and excellent crystallinity.

In the second embodiment, the nitride semiconductor superlattice layer 124 may be disposed on the protruding portion B of the undoped semiconductor layer 122. For example, an AlGaN / GaN superlattice layer 124 having a thickness of 10 to 1000 angstroms may be formed on the undoped semiconductor layer 122, and the AlGaN / GaN superlattice layer 124 may be formed of N Type doping element.

The nitride semiconductor superlattice layer 124 prevents or uniformly controls the potential D from being transmitted to the active layer 134 to improve the crystallinity of the active layer 134, The efficiency can be improved and the reliability can be improved.

According to the second embodiment, the supply of electrons is smooth and the luminous intensity can be improved in the region of the protruding portion B, and the region of the recessed portion A is a high-resistance region, which can block expansion of dislocations, it is possible to prevent leakage current and prevent an increase in the operating voltage.

(Third Embodiment)

6 is a cross-sectional view of a light emitting device 103 according to the third embodiment.

The third embodiment can adopt the technical features of the first embodiment or the second embodiment.

In the third embodiment, the first semiconductor layer 115 including indium may be formed on the first conductivity type semiconductor layer 132. In addition to the light emitting structure, in order to form the first electrode 161, A part of the first semiconductor layer 115 can also be removed.

According to the third embodiment, the first semiconductor layer 115 including indium functions as a current diffusion layer, so that concentration of carriers does not occur, and the luminous efficiency and reliability of the light emitting device can be improved by a uniform current flow.

Embodiments can provide a light emitting device with improved reliability, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

7 is a view illustrating a light emitting device package 200 having a light emitting device according to embodiments.

7, the light emitting device package according to the embodiment includes a package body 205, a third electrode layer 213 and a fourth electrode layer 214 provided on the package body 205, A light emitting device 100 disposed on the first electrode layer 205 and electrically connected to the third electrode layer 213 and the fourth electrode layer 214 and a molding member 230 surrounding the light emitting device 100.

The package body 205 may be formed of a silicon material, a synthetic resin material, or a metal material, and the inclined surface may be formed around the light emitting device 100.

The third electrode layer 213 and the fourth electrode layer 214 are electrically isolated from each other and provide power to the light emitting device 100. The third electrode layer 213 and the fourth electrode layer 214 may function to increase light efficiency by reflecting the light generated from the light emitting device 100, And may serve to discharge heat to the outside.

The light emitting device 100 may be a horizontal type light emitting device 100 illustrated in FIG. 1, but is not limited thereto. The light emitting device 100 according to the second embodiment, the light emitting device 100 according to the third embodiment, (103) or a flip chip light emitting device.

The light emitting device 100 may be mounted on the package body 205 or on the third electrode layer 213 or the fourth electrode layer 214.

The light emitting device 100 may be electrically connected to the third electrode layer 213 and / or the fourth electrode layer 214 by a wire, flip chip, or die bonding method. In the illustrated embodiment, the light emitting device 100 is electrically connected to the third electrode layer 213 and the fourth electrode layer 214 through wires. However, the present invention is not limited thereto.

The molding member 230 surrounds the light emitting device 100 to protect the light emitting device 100. In addition, the molding member 230 may include a phosphor 232 to change the wavelength of light emitted from the light emitting device 100.

A light guide plate, a prism sheet, a diffusion sheet, a fluorescent sheet, and the like, which are optical members, may be disposed on a path of light emitted from the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit or function as a lighting unit. For example, the lighting system may include a backlight unit, a lighting unit, a pointing device, a lamp, and a streetlight.

8 is a perspective view 1100 of a lighting unit according to an embodiment. However, the illumination unit 1100 of Fig. 8 is an example of the illumination system and is not limited thereto.

8, the lighting unit 1100 includes a case body 1110, a light emitting module unit 1130 installed in the case body 1110, and a power supply unit 1130 installed in the case body 1110 and powered by an external power source. And may include a connection terminal 1120 to be provided.

The case body 1110 is preferably formed of a material having a good heat dissipation property, and may be formed of, for example, a metal material or a resin material.

The light emitting module unit 1130 may include a substrate 1132 and at least one light emitting device package 200 mounted on the substrate 1132.

The substrate 1132 may be a circuit pattern printed on an insulator. For example, the PCB 1132 may be a printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB . &Lt; / RTI &gt;

Further, the substrate 1132 may be formed of a material that efficiently reflects light, or may be formed of a color whose surface is efficiently reflected, for example, white, silver, or the like.

The at least one light emitting device package 200 may be mounted on the substrate 1132. Each of the light emitting device packages 200 may include at least one light emitting diode (LED) 100. The light emitting diode 100 may include a colored light emitting diode that emits red, green, blue, or white colored light, and a UV light emitting diode that emits ultraviolet (UV) light.

The light emitting module unit 1130 may be arranged to have a combination of various light emitting device packages 200 to obtain color and brightness. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be arranged in combination in order to secure a high color rendering index (CRI).

The connection terminal 1120 may be electrically connected to the light emitting module 1130 to supply power. 8, the connection terminal 1120 is connected to the external power source by being inserted in a socket manner, but the present invention is not limited thereto. For example, the connection terminal 1120 may be formed in a pin shape and inserted into an external power source or may be connected to an external power source through a wiring.

9 is an exploded perspective view 1200 of a backlight unit according to an embodiment. However, the backlight unit 1200 of FIG. 9 is an example of the illumination system, and the present invention is not limited thereto.

The backlight unit 1200 according to the embodiment includes a light guide plate 1210, a light emitting module unit 1240 for providing light to the light guide plate 1210, a reflection member 1220 below the light guide plate 1210, But the present invention is not limited thereto, and may include a bottom cover 1230 for housing the light emitting module unit 1210, the light emitting module unit 1240, and the reflecting member 1220.

The light guide plate 1210 serves to diffuse light into a surface light source. The light guide plate 1210 may be made of a transparent material such as acrylic resin such as PMMA (polymethyl methacrylate), polyethylene terephthalate (PET), polycarbonate (PC), cycloolefin copolymer (COC), and polyethylene naphthalate Resin. &Lt; / RTI &gt;

The light emitting module part 1240 provides light to at least one side of the light guide plate 1210 and ultimately acts as a light source of a display device in which the backlight unit is installed.

The light emitting module 1240 may be in contact with the light guide plate 1210, but is not limited thereto. Specifically, the light emitting module 1240 includes a substrate 1242 and a plurality of light emitting device packages 200 mounted on the substrate 1242. The substrate 1242 is mounted on the light guide plate 1210, But is not limited to.

The substrate 1242 may be a printed circuit board (PCB) including a circuit pattern (not shown). However, the substrate 1242 may include not only a general PCB, but also a metal core PCB (MCPCB), a flexible PCB (FPCB), and the like.

The plurality of light emitting device packages 200 may be mounted on the substrate 1242 such that a light emitting surface on which the light is emitted is spaced apart from the light guiding plate 1210 by a predetermined distance.

The reflective member 1220 may be formed under the light guide plate 1210. The reflection member 1220 reflects the light incident on the lower surface of the light guide plate 1210 so as to face upward, thereby improving the brightness of the backlight unit. The reflective member 1220 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto.

The bottom cover 1230 may receive the light guide plate 1210, the light emitting module 1240, and the reflective member 1220. For this purpose, the bottom cover 1230 may be formed in a box shape having an opened upper surface, but the present invention is not limited thereto.

The bottom cover 1230 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding.

Embodiments provide a light emitting device with improved reliability, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

Also, embodiments are directed to a light emitting device having improved light emitting efficiency, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Accordingly, the contents of such combinations and modifications should be construed as being included in the scope of the embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. It can be seen that the modification and application of branches are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that the present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics thereof.

100: light emitting element, 105: substrate 105,
115: a semiconductor layer containing indium (In)
132: first conductivity type semiconductor layer, 134: active layer, 136: second conductivity type semiconductor layer
142: current diffusion layer, 144: electron injection layer, 146: electron blocking layer
150: ohmic layer, 161: first electrode, 162: second electrode

Claims (8)

Board;
A first semiconductor layer including indium (In) on the substrate;
An undoped semiconductor layer including a protrusion and a recess on the first semiconductor layer;
A nitride semiconductor superlattice layer on the undoped semiconductor layer; And
And a light emitting structure on the nitride semiconductor superlattice layer,
A dislocation mode on the top surface of the first semiconductor layer,
A depressed depressed portion is formed on the upper surface of the undoped semiconductor layer,
Wherein the interlocking portion of the interlocking type includes a concave-
And the resistance of the concave portion of the concavo-convex portion is larger than the resistance of the protruding portion of the concavo-convex portion. The method according to claim 1,
Wherein the first semiconductor layer comprises a first semiconductor layer,
Lattice structure of In _x Ga _{1 -x} N (0 <x? ₁ ), In _x GaN _{1 -x} / GaN (0 <x? 1), and InN / GaN superlattice structure. The method according to claim 1,
Wherein the nitride semiconductor superlattice layer has a thickness of 10 to 1000 ANGSTROM. The method of claim 3,
The first semiconductor layer has a thickness of 30 ANGSTROM to 500 ANGSTROM,
When the first semiconductor layer includes a super lattice structure of In _x Ga _1-x N (0 <x ₁ ) or In _x GaN _1-x / GaN (0 <x 1) 5%. The method according to claim 1,
The light-
A first conductive semiconductor layer;
An active layer on the first conductive semiconductor layer; And
And a second conductive semiconductor layer on the active layer,
A first electrode formed in a region where a part of the first conductive semiconductor layer is exposed; And
And a second electrode formed on the second conductive semiconductor layer. delete delete delete

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