KR20130061343A - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
KR20130061343A
KR20130061343A KR1020110127591A KR20110127591A KR20130061343A KR 20130061343 A KR20130061343 A KR 20130061343A KR 1020110127591 A KR1020110127591 A KR 1020110127591A KR 20110127591 A KR20110127591 A KR 20110127591A KR 20130061343 A KR20130061343 A KR 20130061343A
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South Korea
Prior art keywords
light emitting
layer
high crystal
buffer layer
substrate
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KR1020110127591A
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Korean (ko)
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정성이
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엘지이노텍 주식회사
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Priority to KR1020110127591A priority Critical patent/KR20130061343A/en
Publication of KR20130061343A publication Critical patent/KR20130061343A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/28Materials of the light emitting region containing only elements of group II and group VI of the periodic system
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials

Abstract

PURPOSE: A light emitting device is provided to save power consumption by preventing lattice mismatch due to the coefficient difference of thermal expansion. CONSTITUTION: A buffer layer(120) is arranged on a substrate. A light emitting structure(140) is formed on the buffer layer. The light emitting structure includes zinc oxide. A high crystal layer(130) is formed between the buffer layer and the light emitting structure. The high crystal layer includes aluminum indium nitride.

Description

[0001] LIGHT EMITTING DEVICE [0002]

An embodiment relates to a light emitting element.

BACKGROUND ART Light emitting devices such as a light emitting diode (LD) or a laser diode using semiconductor materials of Group 3-5 or 2-6 group semiconductors are widely used for various colors such as red, green, blue, and ultraviolet And it is possible to realize white light rays with high efficiency by using fluorescent materials or colors, and it is possible to realize low energy consumption, semi-permanent life time, quick response speed, safety and environment friendliness compared to conventional light sources such as fluorescent lamps and incandescent lamps .

Therefore, a transmission module of the optical communication means, a light emitting diode backlight replacing a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, a white light emitting element capable of replacing a fluorescent lamp or an incandescent lamp Diode lighting, automotive headlights, and traffic lights.

When such a light emitting diode is manufactured by growing an oxide semiconductor layer on a substrate, lattice mismatch occurs due to a difference in lattice constant and thermal expansion coefficient between the substrate and nitride oxide (ZnO), resulting in many crystal defects in the oxide semiconductor layer. .

These crystal defects increase the leakage current of the device and when the external static electricity enters, the active layer of the light emitting device having many crystal defects is destroyed by the strong field.

A buffer layer is generally used to match the lattice constants between the substrate and the oxide semiconductor layer. However, even when the buffer layer is used, there is still a problem in that there is a difference in lattice constant between the buffer layer and the oxide semiconductor layer, resulting in crystal defects.

The embodiment aims to increase the reliability of the light emitting device.

A light emitting device according to an embodiment includes a substrate; A buffer layer disposed on the substrate; A light emitting structure on the buffer layer and including zinc oxide (ZnO); And a high crystal layer positioned between the buffer layer and the light emitting structure and including aluminum indium nitride (Al x In y N, 0 <x <1, 0 <y <1, x + y = 1).

The indium content y of the high crystal layer may be 0 <y≤0.29.

The aluminum content x of the high crystal layer may be 0.71 ≦ x <1.00.

The indium content y of the high crystal layer may increase as it approaches the light emitting structure.

The indium content y of the high crystal layer may be 0.27 ≦ y ≦ 0.29 in contact with the light emitting structure.

The thickness of the high crystal layer may be 100 ~ 500nm.

The buffer layer may include aluminum nitride (AlN).

The dislocation density of the light emitting structure may be equal to the dislocation density of the buffer layer or at most 2.0% greater than the dislocation density of the buffer layer.

The substrate may include a sapphire substrate (Al 2 O 3 ), a zinc oxide substrate (ZnO), or a silicon substrate (Si).

The high crystal layer may include a plurality of layers, and the plurality of layers may include two or more adjacent layers having different indium contents.

The plurality of layers may have a higher indium content as they are closer to the light emitting structure.

The buffer layer may include a first layer in contact with the substrate and a second layer in contact with the high crystal layer.

According to the embodiment, since the lattice constant between the buffer layer and the light emitting structure is matched by the high crystal layer, generation of crystal defects is suppressed, thereby increasing reliability of the light emitting device.

1 is a cross-sectional view of a light emitting device according to an embodiment;
2 to 4 is a view showing a manufacturing method of a light emitting device according to the embodiment,
5 is a view showing an embodiment of a light emitting device package including a light emitting device according to the embodiment,
6 is a view illustrating an embodiment of a head lamp in which a light emitting device is disposed, according to an embodiment;
7 is a diagram illustrating an example of a display device in which a light emitting device package is disposed.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

1 is a cross-sectional view of a light emitting device according to an embodiment.

The light emitting device 100 according to the embodiment includes a substrate 110, a buffer layer 120 disposed on the substrate 110, and an aluminum indium nitride (AlInN) disposed on the buffer layer 120. A high crystal layer 130 and a light emitting structure 140 disposed on the high crystal layer 130 and including zinc oxide (ZnO).

The substrate 110 may be formed of a material suitable for growing a semiconductor material or a carrier wafer. In addition, it may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. The substrate 110 may use, for example, at least one of sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga 2 0 3 . An uneven structure may be formed on the substrate 110, but is not limited thereto. The substrate 110 may be wet-cleaned to remove impurities on the surface.

The light emitting structure 140 is grown on the substrate 110. When the light emitting structure 140 is directly grown on the substrate 110, the dislocation is caused by the lattice constant mismatch between the substrate and the light emitting structure and a difference in thermal expansion coefficient. Since a crystal defect, such as, occurs, the buffer layer 120 is formed between the substrate 110 and the light emitting structure 140.

The material of the buffer layer 120 may be formed of at least one of Group III-V compound semiconductors, for example, GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. An undoped semiconductor layer may be formed on the buffer layer, but the present invention is not limited thereto.

The light emitting structure 140 is formed on the buffer layer 120.

The light emitting structure 140 may be formed by sequentially growing the first conductivity type semiconductor layer 142, the active layer 144, and the second conductivity type semiconductor layer 146.

The light emitting structure 140 may include, for example, Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), and molecular beam growth. It may be formed using a method such as Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), but is not limited thereto.

In the light emitting structure 140, a photonic crystal structure may be formed to improve light extraction efficiency of the light emitting device.

The photonic crystal structure refers to a structure in which two or more dielectrics having different refractive indices are repeated infinitely in a periodic structure having a nano size. By using this periodic difference in refractive index, by forming and adjusting a photonic bandgap, a forbidden band in which the wavelength of light cannot propagate the medium, it converts the internal reflection path of the light to maximize the light extraction efficiency of the light emitting device. can do.

The first conductive semiconductor layer 142 may be formed of a semiconductor compound, for example, zinc oxide (ZnO) or zinc oxide (ZnO) to which at least one material of magnesium (Mg) and beryllium (Be) is added. It may include. In addition, the first conductivity type dopant may be doped. When the first conductivity type semiconductor layer 142 is an n type semiconductor layer, the first conductivity type dopant may include aluminum (Al), gallium (Ga), or indium (In) as an n type dopant. It is not limited. In addition, when the first conductivity type semiconductor layer 142 is a p-type semiconductor layer, the first conductivity type dopant is a p-type dopant such as nitrogen (N), phosphorus (P), tin (Sb) lithium (Li), It may include but is not limited to sodium (Na), potassium (K), cesium (Cs), lead (Pb) or arsenic (As).

In addition, the first conductivity-type semiconductor layer 142 may include a semiconductor material having a composition formula of Mg x Zn 1 - x O (0 ≦ x ≦ 1).

The active layer 144 is a layer where electrons and holes meet to emit light having energy determined by an energy band inherent in the active layer (light emitting layer) material.

The active layer 144 may be formed of at least one of a single well structure, a multi well structure, a quantum-wire structure, and a quantum dot structure.

The active layer 144 in this case have a single well structure or a multiple well structure, material used for the barrier layer (not shown) of the active layer is Mg x Cd y Zn 1 -x- y O (0≤x≤1, 0≤y ≤1, 0≤x + y≤1), Mg x Zn 1-x O (0≤x≤1), Be x Zn 1 - x O (0≤x≤1), Be x Mg y Zn 1- x at least one substance selected from y O (0 ≦ x, y ≦ 1, 0 ≦ x + y ≦ 1).

In addition, the material used for the well layer (not shown) of the active layer 144 is Mg x Cd y Zn 1 -x- y O (0≤x≤1, 0≤y≤1, 0≤x + y≤1) , Mg x Zn 1 - x O (0≤x≤1), Be x Zn 1 - x O (0≤x≤1), Be x Mg y Zn 1 -x- y O (0≤x, y≤1 , 0 ≦ x + y ≦ 1), Cd × Zn 1 x O (0 ≦ x ≦ 1), or ZnO.

If the materials used for the barrier layer (not shown) and the well layer (not shown) are the same, the band gap may increase or decrease according to the size of x or y, and thus the barrier layer (not shown) and the well layer (not shown) may be determined. .

In order to manufacture two-dimensional quantum structure, lateral growth must be well made and crystallinity must be secured. When cadmium (Cd) is used as a surfactant, lateral growth is good and zinc oxide of high quality multi-quantum well structure is well formed. The (ZnO) active layer 144 may be formed.

The active layer 144 controls the composition ratios of cadmium (Cd), zinc (Zn), and magnesium (Mg) as constituent materials, and thus, the magnesium oxide (MgO) from the long wavelength having a band gap (˜2.3 eV) of cadmium oxide (CdO). A device having a short wavelength light emission characteristic having a band gap (˜7.7 eV) can be manufactured.

The well layer (not shown) may be preferable to improve internal quantum efficiency by allowing carriers to collect in the well by narrowing the bandgap rather than the barrier layer (not shown). The well layer (not shown) is made of aluminum (Al), gallium (Ga), and indium (In) at any one of the well layer (not shown) and the barrier layer (not shown) in order to improve emission characteristics and lower the forward operating voltage. One or more materials may be doped.

A conductive cladding layer (not shown) may be formed on or under the active layer 144. The conductive clad layer may be formed of a semiconductor having a band gap wider than the band gap of the barrier layer of the active layer. In addition, the conductive clad layer may be doped with n-type or p-type.

The second conductivity type semiconductor layer 146 may be formed of a semiconductor compound, and the second conductivity type dopant may be doped. The second conductivity-type semiconductor layer 146 may include, for example, a semiconductor material having a compositional formula of Mg x Zn 1 - x O (0 ≦ x ≦ 1). When the second conductive semiconductor layer 146 is a p-type semiconductor layer, the second conductive dopant is a p-type dopant, and nitrogen (N), phosphorus (P), and tin (Sb) are p-type dopants. Lithium (Li), sodium (Na), potassium (K), cesium (Cs), lead (Pb) or arsenic (As) may include, but is not limited thereto. In addition, when the second conductive semiconductor layer 146 is an n-type semiconductor layer, the second conductive dopant may include aluminum (Al), gallium (Ga), or indium (In) as an n-type dopant. However, the present invention is not limited thereto.

Roughness or a pattern may be formed on the top surface of the second conductive semiconductor layer 146 to improve light extraction efficiency of the light emitting device.

In the present exemplary embodiment, the first conductive semiconductor layer 142 may be an n-type semiconductor layer, and the second conductive semiconductor layer 146 may be a p-type semiconductor layer. In addition, an n-type semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 146 when the semiconductor having a polarity opposite to that of the second conductive type, for example, the second conductive semiconductor layer is a p-type semiconductor layer. Can be. Accordingly, the light emitting structure may be implemented as any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

A high crystal layer 130 including aluminum indium nitride (AlInN) is disposed between the buffer layer 120 and the light emitting structure 140.

Even if the buffer layer 120 is disposed between the substrate 110 and the light emitting structure 140, since there is still a difference in the lattice constant between the buffer layer 120 and the light emitting structure 140, the light emitting structure ( Immediately growing 140 may result in crystal defects due to lattice mismatch.

The high crystal layer 130 may be disposed between the buffer layer 120 and the light emitting structure 140 to mitigate the difference in lattice constant between the buffer layer 120 and the light emitting structure 140.

The aluminum indium nitride of the high crystal layer 130 has a composition formula of Al x In y N (0 <x <1, 0 <y <1, x + y = 1), and the indium content y depends on the position. Can vary.

The size of the crystal lattice of the high crystal layer 130 may vary according to the content y of indium. In addition, the shape of the crystal lattice may vary depending on the growth temperature.

The high crystal layer 130 may achieve a lattice match between the high crystal layer 130 and the light emitting structure 140 by minimizing the difference in the lattice parameters within the high crystal layer 130 by gradually changing the indium content y. have.

The indium content y of the high crystal layer 130 may be 0 <y ≦ 0.29, and may increase as the light emitting structure 140 approaches. If the indium content of y is 0, it may be aluminum nitride (AlN), and if it is 0.29 or more, the lattice constant may be greater than that of zinc oxide (ZnO) included in the first conductivity-type semiconductor layer 142, and thus crystal defects may occur. have. When the indium content y is 0.27 ≦ y ≦ 0.29, lattice matching between the high crystal layer 130 and the first conductivity-type semiconductor layer 142 may be performed to suppress occurrence of crystal defects.

The aluminum content x of the high crystal layer 130 may be 0.71 ≦ x <1.00, and the aluminum content x may decrease because the indium content y increases closer to the light emitting structure 140. When the aluminum content x is 0.71 or less, a lattice constant may be greater than that of ZnO included in the first nitride semiconductor layer 142, and a crystal defect may occur.

The high crystal layer 130 may be formed at 700 ~ 800 ℃. When formed below 700 ° C, defects may occur due to differences in crystallinity and surface shape, and layer growth may be difficult at 800 ° C or higher. The high crystal layer 130 may have a lattice ordered more than when grown at 700 ° C. or less, and may have a smooth surface.

The high crystal layer 130 may be formed to 100 ~ 500nm. When the high crystal layer 130 is formed to 100 nm or less, the lattice constant may change rapidly within the high crystal layer, and crystal defects may occur. When the crystal layer 130 is formed thicker than 500 nm, light transmittance may be impaired and processability may be deteriorated.

The high crystal layer 130 may be formed of a plurality of layers, but is not limited thereto. The high crystal layer 130 having a plurality of layers may have a different indium content in each layer, and the closer to the light emitting structure 140, the higher the indium content may be.

By gradually changing the indium content in each layer, the lattice matching between the high crystal layer 130 and the light emitting structure 140 may be achieved by minimizing the difference in the lattice constants inside the high crystal layer 130.

The buffer layer 120 may have a multilayer structure including a low temperature buffer layer 120a in contact with the substrate 110 and a low temperature buffer layer 120b in contact with the high crystal layer 130, but is not limited thereto.

The low temperature buffer layer 120a may be formed at 500 to 600 ° C. The low temperature buffer layer 220 may include AlN, GaN, or the like, and may be formed of an AlInN / GaN stacked structure, an InGaN / GaN stacked structure, an AlInGaN / InGaN / GaN stacked structure, or the like.

The high temperature buffer layer 120b may be formed at 700 to 800 ° C., and may include AlN. The high temperature buffer layer 120b may match a lower surface of the high crystal layer 130 with a lattice constant to prevent crystal defects.

When the indium content y of the high crystal layer 130 is 0 and the aluminum content x is 1, the composition of the high crystal layer 130 may be AlN, which may serve as a high temperature buffer layer.

The dislocation density of the light emitting structure 140 may be equal to the dislocation density of the buffer layer 120 or at most 2.0% greater than the dislocation density of the buffer layer 120. Since the high crystal layer 130 is disposed between the buffer layer 120 and the light emitting structure 140 to gradually form a lattice match with the light emitting structure 140, the number of crystal defects caused by lattice mismatch can be minimized.

When the high crystal layer 130 is not present, since the difference in lattice constant between the buffer layer 120 including AlN and the light emitting structure 140 including ZnO is 2.0%, the high crystal layer 130 is present. In this case, the dislocation density in the light emitting structure 140 may be the same as the dislocation density in the buffer layer when the buffer layer and the light emitting structure are completely lattice matched by the high crystal layer, and even if not, than the dislocation density in the buffer layer 120. It can be as large as 2.4%.

The buffer layer 120 and the high crystal layer 130 may protect the light emitting structure 140 from external physical shocks received by the substrate 110.

2 to 4 are views showing a method of manufacturing a light emitting device according to the embodiment. Hereinafter, a manufacturing process of the light emitting device will be described with reference to FIGS. 2 to 4.

First, as shown in FIG. 2, after loading the substrate 110 in the growth equipment, the buffer layer 120 and the high crystal layer 130 are formed.

The substrate 110 may be formed of a material suitable for growing a semiconductor material or a carrier wafer. In addition, it may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. The substrate 110 may use, for example, at least one of sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga 2 0 3 . An uneven structure may be formed on the substrate 110, but is not limited thereto. The substrate 110 may be wet-cleaned to remove impurities on the surface.

The buffer layer 120 is for alleviating the difference in lattice mismatch and thermal expansion coefficient between the substrate 110 and the light emitting structure 140 to be formed later. The material of the buffer layer may be formed of at least one of Group III-V compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. An undoped semiconductor layer may be formed on the buffer layer, but the present invention is not limited thereto.

The buffer layer 120 may be formed of a single layer or a plurality of layers. When the buffer layer 120 is formed of a plurality of layers, the low temperature buffer layer 120a in contact with the substrate 110 and the high temperature buffer layer 120b in contact with the high crystal layer 130 may be formed. It may include. In addition, the temperature may be gradually changed so that the boundary between the high temperature buffer layer 120b and the low temperature buffer layer 120a may be removed, but is not limited thereto.

The low temperature buffer layer 120a may form a lattice match with the substrate 110, and the high temperature buffer layer 120b may form a lattice match with a lower surface of the high crystal layer 130.

The high crystal layer 130 is formed on the buffer layer 120.

The aluminum indium nitride of the high crystal layer 130 has a composition formula of Al x In y N (0 <x <1, 0 <y <1, x + y = 1), and the content of indium y varies depending on the position. Can be.

The indium content y of the high crystal layer 130 may be 0 <y ≦ 0.29, and may increase as the light emitting structure 140 approaches.

The high crystal layer 130 may be formed at 700 to 800 ° C., as shown in FIG. 3, while flowing TMA (Trimethyl Aluminum) gas, which is a precursor of Al, and NH 3 gas, which is a precursor of N, as a precursor of In. It may be formed by slowly increasing the amount of TMI (Trimethyl Indium) gas, but is not limited thereto.

The high crystal layer 130 may achieve a lattice match between the high crystal layer 130 and the light emitting structure 140 by minimizing the difference in the lattice parameters within the high crystal layer 130 by gradually changing the indium content y. have.

4A is a cross-sectional view of a horizontal light emitting device according to the embodiment.

Referring to FIG. 4A, a light emitting structure 140 including a first conductive semiconductor layer 142, an active layer 144, and a second conductive semiconductor layer 146 is grown on the high crystal layer 130.

The light emitting structure 140 may include, for example, Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), and molecular beam growth. It may be formed using a method such as Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), but is not limited thereto.

A portion of the second conductive semiconductor layer 146, the active layer 144, and the first conductive semiconductor layer 142 may be mesa-etched to expose the first electrode (1) on the exposed first conductive semiconductor layer 142. 150).

The first electrode 150 is molybdenum (Mo), chromium (Cr), nickel (Ni), gold (Au), aluminum (Al), titanium (Ti), platinum (Pt), vanadium (V), tungsten (W) ), Lead (Pd), copper (Cu), rhodium (Rh) or iridium (Ir) may be made of any one metal or an alloy of the metals.

The second electrode 160 is disposed on the second conductive semiconductor layer 146. An ohmic layer (not shown) may be formed between the second conductive semiconductor layer 146 and the second electrode 160. Since the second conductivity-type semiconductor layer 146 has a low impurity doping concentration and high contact resistance, and thus may not have good ohmic characteristics with the metal, the ohmic layer may be formed to improve such ohmic characteristics.

Since the ohmic layer is disposed between the light emitting structure 140 and the second electrode 160, the ohmic layer may be formed as a transparent electrode, or may be formed as a layer or a plurality of patterns.

As the ohmic layer, a light transmissive conductive layer and a metal may be selectively used. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAO), and IGZO may be used. (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir , Sn, In, Ru, Mg, Zn, Pt, Au, Hf may be formed, including, but not limited to such materials.

4B is a cross-sectional view of a vertical light emitting device according to the embodiment. The content overlapping with the horizontal light emitting device of FIG. 4A will not be described again.

In the vertical light emitting device, after the light emitting structure 140 is formed on the high crystal layer 130, the substrate 110 is separated by a laser lift off (LLO) method or a dry and wet etching method. . In this case, not only the substrate 110 but also the buffer layer 120 and the high crystal layer 130 may be separated together.

Thereafter, the support substrate 210 is disposed on the second conductive semiconductor layer 146 of the light emitting structure 140. In this case, the ohmic layer 230 and / or the reflective layer 220 may be disposed between the light emitting structure 140 and the support substrate 210.

Since the support substrate 210 may serve as a second electrode, a metal having excellent electrical conductivity may be used, and a metal having high thermal conductivity may be used because it must be able to sufficiently dissipate heat generated when the light emitting device is operated.

The support substrate 210 is made of a material selected from the group consisting of molybdenum (Mo), silicon (Si), tungsten (W), copper (Cu), silver (Ag), or aluminum (Al) or alloys thereof. Also, gold (Au), copper alloy (Cu Alloy), nickel (Ni), copper-tungsten (Cu-W), carrier wafers (e.g. GaN, Si, Ge, GaAs, ZnO, SiGe, SiC, SiGe, Ga 2 O 3, etc.) may be optionally included.

In addition, the support substrate 210 has a mechanical strength to be separated into a separate chip through a scribing process and a breaking process without bringing warpage to the light emitting structure including the nitride semiconductor. It can have

The ohmic layer 230 may selectively use a light-transmitting conductive layer and a metal, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide (AZO). ), Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON (IZO Nitride), AGZO (Al-Ga) ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, At least one of Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf may be formed, but is not limited thereto.

The reflective layer 220 is formed of, for example, a material consisting of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, or a combination thereof, or the metal material and IZO. , IZTO, IAZO, IGZO, IGTO, AZO, ATO and the like can be formed in a multi-layer using a transmissive conductive material. In addition, the reflective layer 160 may be laminated with IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni, or the like. In addition, when the reflective layer 220 is formed of a material in ohmic contact with the light emitting structure (eg, the second conductivity type semiconductor layer 146), the ohmic layer 230 may not be separately formed, but is not limited thereto. Do not.

The ohmic layer 230 and the reflective layer 220 may be formed by, for example, any one of electron beam (E-beam) deposition, sputtering, and plasma enhanced chemical vapor deposition (PECVD). It is not limited to.

In addition, the passivation layer 240 of the light emitting structure 140 may be formed.

The passivation layer 240 may be made of an insulating material, and the insulating material may be made of an oxide or nitride that is non-conductive. As an example, the passivation layer 240 may be formed of a silicon oxide (SiO 2 ) layer, an oxynitride layer, and an aluminum oxide layer.

5 is a view showing an embodiment of a light emitting device package including a light emitting device according to the embodiment.

The light emitting device package 300 according to the embodiment includes a body 310 having a cavity, a first lead frame 321 and a second lead frame 322 installed in the body 310, and the body 310. The light emitting device 100 according to the above-described embodiments is installed and electrically connected to the first lead frame 321 and the second lead frame 322, and a molding part 340 formed in the cavity.

The body 310 may be formed including a silicon material, a synthetic resin material, or a metal material. When the body 310 is made of a conductive material such as a metal material, although not shown, an insulating layer is coated on the surface of the body 310 to prevent an electrical short between the first and second lead frames 321 and 322. Can be.

The first lead frame 321 and the second lead frame 322 are electrically separated from each other, and supplies a current to the light emitting device 100. In addition, the first lead frame 321 and the second lead frame 322 may increase the light efficiency by reflecting the light generated by the light emitting device 100, heat generated by the light emitting device 100 Can be discharged to the outside.

The light emitting device 100 may be installed on the body 310 or may be installed on the first lead frame 321 or the second lead frame 322. In the present embodiment, the first lead frame 321 and the light emitting device 100 are directly energized, and the second lead frame 322 and the light emitting device 100 are connected through a wire 330. The light emitting device 100 may be connected to the lead frames 321 and 322 by a flip chip method or a die bonding method in addition to the wire bonding method.

The molding part 340 may surround and protect the light emitting device 100. In addition, a phosphor 350 is included on the molding part 340 to change the wavelength of light emitted from the light emitting device 100.

The phosphor 350 may include a garnet-based phosphor, a silicate-based phosphor, a nitride-based phosphor, or an oxynitride-based phosphor.

For example, the garnet-base phosphor is YAG (Y 3 Al 5 O 12 : Ce 3 +) or TAG: may be a (Tb 3 Al 5 O 12 Ce 3 +), wherein the silicate-based phosphor is (Sr, Ba, Mg, Ca) 2 SiO 4: Eu 2 + one can, the nitride-based fluorescent material is CaAlSiN 3 containing SiN: Eu 2 + one can, Si 6 of the oxynitride-based fluorescent material includes SiON - x Al x O x N 8 -x : Eu 2 + (0 <x <6).

Light in the first wavelength region emitted from the light emitting device 100 is excited by the phosphor 250 and converted into light in the second wavelength region, and the light in the second wavelength region passes through a lens (not shown). The light path can be changed.

Hereinafter, a head lamp and a backlight unit will be described as an embodiment of a lighting system in which the above-described light emitting device package is disposed.

6 is a diagram illustrating an embodiment of a head lamp in which a light emitting device is disposed according to an embodiment.

Referring to FIG. 6, after the light emitted from the light emitting module 710 in which the light emitting device is disposed is reflected by the reflector 720 and the shade 730, the light may pass through the lens 740 to face the vehicle body. have.

The light emitting device package included in the light emitting module 710 may include a plurality of light emitting devices, but is not limited thereto.

7 is a diagram illustrating an example of a display device in which a light emitting device package is disposed.

The display device 800 according to the embodiment displays the light source modules 830 and 835, the reflector 820 on the bottom cover 810, and the light emitted from the light source module in front of the reflector 820. A light guide plate 840 guiding in front of the device, a first prism sheet 850 and a second prism sheet 860 disposed in front of the light guide plate 840, and a front of the second prism sheet 860. And a color filter 880 disposed over the panel 870.

The light source module includes the above-described light emitting device package 835 on the circuit board 830. Here, the circuit board 830 may be a PCB and the like, and the light emitting device package 835 is as described in the above embodiments.

The bottom cover 810 may receive components in the display device 800. The reflective plate 820 may be provided as a separate component as shown in the figure, or may be provided in the form of a high reflective material on the rear surface of the light guide plate 840 or the front surface of the bottom cover 810. Do.

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 840 scatters light emitted from the light emitting device package module so that the light is uniformly distributed over the entire screen area of the LCD. Accordingly, the light guide plate 830 is made of a material having a good refractive index and transmittance. The light guide plate 830 may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), or polyethylene (PE). In addition, the light guide plate may be omitted, and thus an air guide method in which light is transmitted in the space on the reflective sheet 820 may be possible.

The first prism sheet 850 is formed of a translucent and elastic polymer material on one surface of the support film, and the polymer may have a prism layer in which a plurality of three-dimensional structures are repeatedly formed. Here, the plurality of patterns may be provided in the stripe type and the valley repeatedly as shown.

In the second prism sheet 860, the direction of the floor and the valley of one surface of the support film may be perpendicular to the direction of the floor and the valley of one surface of the support film in the first prism sheet 850. This is to evenly distribute the light transmitted from the light source module and the reflective sheet in all directions of the panel 870.

In the present embodiment, the first prism sheet 850 and the second prism sheet 860 form an optical sheet, which is composed of another combination, for example, a micro lens array or a diffusion sheet and a micro lens array. Or a combination of one prism sheet and a micro lens array.

The liquid crystal display panel (Liquid Crystal Display) may be disposed on the panel 870, in addition to the liquid crystal display panel 860 may be provided with other types of display devices that require a light source.

The panel 870 is a state in which the liquid crystal is located between the glass body and the polarizing plate is placed on both glass bodies in order to use the polarization of light. Here, the liquid crystal has an intermediate property between a liquid and a solid, and liquid crystals, which are organic molecules having fluidity like a liquid, are regularly arranged like crystals. The liquid crystal has a structure in which the molecular arrangement is changed by an external electric field And displays an image.

A liquid crystal display panel used in a display device is an active matrix type, and a transistor is used as a switch for controlling a voltage supplied to each pixel.

The front surface of the panel 870 is provided with a color filter 880 to transmit the light projected from the panel 870, only the red, green and blue light for each pixel can represent an image.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below but also by the equivalents of the claims.

100: light emitting device 110: substrate
120: buffer layer 130: high crystal layer
140: light emitting structure 142: first conductivity type semiconductor layer
144: active layer 146: second conductivity type semiconductor layer
150: first electrode 160: second electrode
210: support substrate 220: reflective layer
230: ohmic layer 240: passivation layer
310: package body 321, 322: first and second lead frames
330: wire 340: molding part
350: phosphor 710: light emitting module
720: Reflector 730: Shade
800: display device 810: bottom cover
820: reflector 840: light guide plate
850: first prism sheet 860: second prism sheet
870: panel 880: color filter

Claims (12)

Board;
A buffer layer disposed on the substrate;
A light emitting structure on the buffer layer and including zinc oxide (ZnO); And
A light emitting device disposed between the buffer layer and the light emitting structure and including a high crystal layer including aluminum indium nitride (Al x In y N, 0 <x <1, 0 <y <1, x + y = 1) .
The method of claim 1,
The indium content y of the high crystal layer is 0 <y ≤ 0.29.
The method of claim 1,
The aluminum content x of the high crystal layer is 0.71≤x <1.00.
The method of claim 1,
The indium content y of the high crystal layer increases as the closer to the light emitting structure.
The method of claim 1,
The indium content y of the high crystal layer is 0.27≤y≤0.29 in contact with the light emitting structure.
The method of claim 1,
The thickness of the high crystal layer is 100 ~ 500nm light emitting device.
The method of claim 1,
The buffer layer is a light emitting device containing aluminum nitride (AlN).
The method of claim 1,
The dislocation density of the light emitting structure is the same as the dislocation density of the buffer layer or at most 2.0% greater than the dislocation density of the buffer layer.
The method of claim 1,
The substrate includes a sapphire substrate (Al 2 O 3 ), a zinc oxide substrate (ZnO), or a silicon substrate (Si).
The method of claim 1,
The high crystal layer is composed of a plurality of layers, the plurality of layers comprises at least two adjacent layers of different indium content.
11. The method of claim 10,
The plurality of layers is a light emitting device having a higher indium content closer to the light emitting structure.
The method of claim 7, wherein
The buffer layer includes a first layer in contact with the substrate and a second layer in contact with the high crystal layer.
KR1020110127591A 2011-12-01 2011-12-01 Light emitting device KR20130061343A (en)

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Application Number Priority Date Filing Date Title
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Publication Number Publication Date
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