KR20120111956A - 정보 처리 장치, 정보 처리 방법 및 프로그램 - Google Patents

정보 처리 장치, 정보 처리 방법 및 프로그램 Download PDF

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Publication number
KR20120111956A
KR20120111956A KR1020117031546A KR20117031546A KR20120111956A KR 20120111956 A KR20120111956 A KR 20120111956A KR 1020117031546 A KR1020117031546 A KR 1020117031546A KR 20117031546 A KR20117031546 A KR 20117031546A KR 20120111956 A KR20120111956 A KR 20120111956A
Authority
KR
South Korea
Prior art keywords
mode
graphics chip
graphics
switching
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020117031546A
Other languages
English (en)
Korean (ko)
Inventor
마사루 가와따
시게노부 후꾸다
겐이찌로 데즈까
이뻬이 무로후시
Original Assignee
소니 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 소니 주식회사 filed Critical 소니 주식회사
Publication of KR20120111956A publication Critical patent/KR20120111956A/ko
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/54—Link editing before load time
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3265—Power saving in display device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Power Sources (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
  • Stored Programmes (AREA)
  • User Interface Of Digital Computer (AREA)
  • Controls And Circuits For Display Device (AREA)
KR1020117031546A 2010-01-07 2010-12-28 정보 처리 장치, 정보 처리 방법 및 프로그램 Withdrawn KR20120111956A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2010-001606 2010-01-07
JP2010001606A JP2011141707A (ja) 2010-01-07 2010-01-07 情報処理装置、情報処理方法及びプログラム

Publications (1)

Publication Number Publication Date
KR20120111956A true KR20120111956A (ko) 2012-10-11

Family

ID=44305305

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117031546A Withdrawn KR20120111956A (ko) 2010-01-07 2010-12-28 정보 처리 장치, 정보 처리 방법 및 프로그램

Country Status (8)

Country Link
US (1) US8689019B2 (enExample)
EP (1) EP2454663A4 (enExample)
JP (1) JP2011141707A (enExample)
KR (1) KR20120111956A (enExample)
CN (1) CN102473101B (enExample)
BR (1) BRPI1015051A2 (enExample)
RU (1) RU2011153285A (enExample)
WO (1) WO2011083561A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2013183112A1 (ja) * 2012-06-05 2016-01-21 三菱電機株式会社 表示装置
KR101952831B1 (ko) * 2012-12-03 2019-02-28 삼성전자주식회사 전자 장치, 외부 장치 및 그의 제어 방법
CN118051111A (zh) * 2019-11-28 2024-05-17 华为技术有限公司 一种高能效的显示处理方法及设备
JP7521065B1 (ja) * 2023-05-22 2024-07-23 レノボ・シンガポール・プライベート・リミテッド 情報処理装置および制御方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2193764A1 (en) * 1995-12-25 1997-06-25 Yasuyuki Mochizuki Selective call receiver
JP2776359B2 (ja) * 1996-01-26 1998-07-16 日本電気株式会社 １回の動作で切替えが可能な状態切り替えスイッチ
US6806893B1 (en) * 1997-08-04 2004-10-19 Parasoft Corporation System and method for displaying simulated three dimensional buttons in a graphical user interface
US6724389B1 (en) * 2001-03-30 2004-04-20 Intel Corporation Multiplexing digital video out on an accelerated graphics port interface
AU2002338475A1 (en) * 2001-04-23 2002-11-05 Quantum 3D, Inc. System and method for synchronization of video display outputs from multiple pc graphics subsystems
US6832269B2 (en) * 2002-01-04 2004-12-14 Silicon Integrated Systems Corp. Apparatus and method for supporting multiple graphics adapters in a computer system
US7256795B2 (en) * 2002-07-31 2007-08-14 Ati Technologies Inc. Extended power management via frame modulation control
US20050044437A1 (en) * 2003-08-19 2005-02-24 Dunstan Robert A. Power conservation in the absence of AC power
US7663633B1 (en) * 2004-06-25 2010-02-16 Nvidia Corporation Multiple GPU graphics system for implementing cooperative graphics instruction execution
US7730336B2 (en) 2006-05-30 2010-06-01 Ati Technologies Ulc Device having multiple graphics subsystems and reduced power consumption mode, software and methods
US20080143731A1 (en) 2005-05-24 2008-06-19 Jeffrey Cheng Video rendering across a high speed peripheral interconnect bus
US7034487B1 (en) * 2005-06-30 2006-04-25 Overhead Door Corporation Barrier operator controller with user settable control limits when entrapment device present
JP2007048219A (ja) * 2005-08-12 2007-02-22 Fujitsu Ltd 消費電力管理システム
JP5076317B2 (ja) 2005-12-27 2012-11-21 ソニー株式会社 情報処理装置、情報処理方法及びそのプログラム
US8384700B2 (en) * 2007-01-26 2013-02-26 Microsoft Corporation Linked shell
CN101118460A (zh) * 2006-05-10 2008-02-06 马维尔国际贸易有限公司 具有高功率和低功率处理器以及线程转移的系统
EP1855181A2 (en) * 2006-05-10 2007-11-14 Marvell World Trade Ltd. System with high power and low power processors and thread transfer
US8555099B2 (en) 2006-05-30 2013-10-08 Ati Technologies Ulc Device having multiple graphics subsystems and reduced power consumption mode, software and methods
US8487943B2 (en) * 2007-12-13 2013-07-16 Advanced Micro Devices, Inc. Driver architecture for computing device having multiple graphics subsystems, reduced power consumption modes, software and methods
JP2009151242A (ja) 2007-12-21 2009-07-09 Toshiba Corp 情報処理装置および表示制御方法
JP4748188B2 (ja) 2008-07-11 2011-08-17 ソニー株式会社 情報処理装置、情報処理方法及びそのプログラム
JP5446844B2 (ja) * 2009-12-24 2014-03-19 ソニー株式会社 情報処理装置及びスイッチ装置

Also Published As

Publication number Publication date
WO2011083561A1 (en) 2011-07-14
CN102473101B (zh) 2014-09-17
US20110261062A1 (en) 2011-10-27
RU2011153285A (ru) 2013-07-10
EP2454663A1 (en) 2012-05-23
EP2454663A4 (en) 2013-02-27
BRPI1015051A2 (pt) 2019-09-24
US8689019B2 (en) 2014-04-01
CN102473101A (zh) 2012-05-23
JP2011141707A (ja) 2011-07-21

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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20111229

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid