KR20110080137A - Light emitting device and method of fabricating the same - Google Patents

Abstract

PURPOSE: A light emitting device and a method manufacturing the same are provided to help current distribution in light emitting cells by forming a hole in a center area of a light emitting cell and to connect a connecting part to the first conductive semiconductor layer via the hole. CONSTITUTION: A light emitting device includes a substrate(151), the first light emitting cell(S1), the second light emitting cell(S2), an isolation recess(161), a connector(135), holes(130a), an ohmic contact layer(131), an insulation layer(133), an isolation insulting layer(137) and an adhesive layer(139). The light emitting cells are divided by the isolation recess. A side wall of the isolation recess is sloped, so the light emitting cells can have a pyramid shape. An active layer(127) is installed between an upper semiconductor layer(125) and a lower semiconductor layer(129). The holes penetrate the lower semiconductor layer and the active layer and expose the upper semiconductor layer. The holes are formed at a central area of the light emitting cells.

Description

LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME}

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly, to a light emitting device to which a substrate separation process is applied and a method of manufacturing the same.

A light emitting diode is a semiconductor device having a structure in which an N-type semiconductor and a P-type semiconductor are bonded to each other, and emit light by recombination of electrons and holes. Such light emitting diodes are widely used as display devices and backlights. In addition, the light emitting diode consumes less power and has a longer lifetime than conventional light bulbs or fluorescent lamps, thereby replacing its incandescent lamps and fluorescent lamps, thereby expanding its use area for general lighting applications.

Recently, AC light emitting diodes that emit light continuously by directly connecting the light emitting diodes to AC power have been commercialized. Light emitting diodes that can be used directly in connection with high voltage alternating current power supplies are described, for example, in Published International Publication No. WO 2004/023568 (Al), which are referred to as "light-emitting elements having light-emitting components". The title is disclosed by SAKAI et al.

According to WO 2004/023568 (Al), series LED arrays are formed two-dimensionally connected on an insulating substrate, such as a sapphire substrate. The LED arrays are connected in series to provide a light emitting device that can be driven at a high voltage. In addition, such LED arrays are connected in anti-parallel on the sapphire substrate to provide a single chip light emitting device that can be driven by an AC power supply.

Since the AC-LED forms light emitting cells on a substrate used as a growth substrate, for example, a sapphire substrate, there is a limitation in the structure of the light emitting cells, and there is a limit in improving light extraction efficiency. In order to solve this problem, a method of manufacturing an AC-LED by applying a substrate separation process has been disclosed in Korean Patent Publication No. 10-0599012 entitled "Light Emitting Diode Having a Thermally Conductive Substrate and a Method of Manufacturing The Same".

1 to 4 are cross-sectional views illustrating a method of manufacturing a light emitting device according to the prior art.

Referring to FIG. 1, semiconductor layers including a buffer layer 23, an N-type semiconductor layer 25, an active layer 27, and a P-type semiconductor layer 29 are formed on a sacrificial substrate 21. The first metal layer 31 is formed on the field, and the second metal layer 53 is formed on the substrate 51 separate from the sacrificial substrate 21. The first metal layer 31 may include a reflective metal layer. The second metal layer 53 is bonded to the first metal layer 31 so that the substrate 51 is bonded over the semiconductor layers.

Referring to FIG. 2, after the substrate 51 is bonded, the sacrificial substrate 21 is separated by using a laser lift-off process. In addition, after the sacrificial substrate 21 is separated, the remaining buffer layer 23 is removed, and the surface of the N-type semiconductor layer 25 is exposed.

Referring to FIG. 3, the semiconductor layers 25, 27, 29 and the metal layers 31, 53 are patterned and spaced apart from each other by using a photo and etching technique, and the metal patterns 40. Light emitting cells 30 are formed on a portion of the substrate. The light emitting cells 30 include a patterned P-type semiconductor layer 29a, an active layer 27a, and an N-type semiconductor layer 25a.

Referring to FIG. 4, metal wires 57 are formed to electrically connect the upper surface of the light emitting cells 30 and the metal patterns 40 adjacent thereto. The metal wires 57 connect the light emitting cells 30 to form a series array of light emitting cells. In order to connect the metal wires 57, an electrode pad 55 may be formed on the N-type semiconductor layer 25a, and an electrode pad may also be formed on the metal patterns 40. Two or more such arrays may be formed, and there is provided a light emitting diode in which these arrays are connected in parallel and driven under an AC power source.

According to the related art, the substrate 51 may be variously selected, thereby improving heat dissipation performance of the light emitting device, and treating the surface of the N-type semiconductor layer 25a to improve light extraction efficiency. In addition, since the first metal layer 31a reflects the light traveling from the light emitting cells 30 toward the substrate 51 including the reflective metal layer, the light emission efficiency may be further improved.

However, the prior art is that during the patterning of the semiconductor layers 25, 27, 29 and metal layers 31, 53, an etch by-product of a metal material adheres to sidewalls of the light emitting cell 30 so that an N-type semiconductor layer ( An electrical short may be caused between 25a) and the P-type semiconductor layer 29a. In addition, the surface of the first metal layer 31a exposed during the etching of the semiconductor layers 25, 27, and 29 may be easily damaged by plasma. This etching damage is further exacerbated when the first metal layer 31a includes a reflective metal layer such as Ag or Al. Damage to the surface of the metal layer 31a by the plasma degrades the adhesion of the wirings 57 or the electrode pads formed thereon, resulting in device defects.

Meanwhile, according to the related art, the first metal layer 31 may include a reflective metal layer, and thus reflects light traveling from the light emitting cells 30 to the substrate side again. However, it is difficult to expect the reflection of light by etching damage or oxidation of the reflective metal layer in the space between the light emitting cells 30. Further, since the substrate 51 is exposed in the region between the metal patterns 40, light may be absorbed and lost by the substrate 51.

Further, since the wirings 57 are connected on the upper surface of the N-type semiconductor layer 25a, that is, on the light emitting surface, the light generated in the active layer 25a is transferred to the wirings 57 and / or on the light emitting surface. Light loss may occur due to absorption of the electrode pads 55.

Patent Document 1. International Publication No. WO 2004/023568 (Al) Patent Document 2. Republic of Korea Patent Publication No. 10-0599012

SUMMARY OF THE INVENTION An object of the present invention is to provide a high voltage driving light emitting device capable of preventing an electrical short circuit in a light emitting cell by metal etching by-products and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device capable of reducing the loss of light traveling to the substrate side in a space between light emitting cells and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device capable of improving the light emitting efficiency by reducing the loss of light emitted from the light emitting surface and a method of manufacturing the same.

Another object of the present invention is to provide a high voltage driving light emitting device capable of assisting current dispersion in light emitting cells and a method of manufacturing the same.

A light emitting device according to one aspect of the present invention, a substrate; Each of the first conductive upper semiconductor layer, the active layer and the second conductive lower semiconductor layer, and the second conductive lower semiconductor layer and the active layer through the upper semiconductor layer of the first conductive type exposed A first light emitting cell and a second light emitting cell including a hole to make; And a connector positioned between the first and second light emitting cells and the substrate and electrically connecting the first and second light emitting cells to each other. In addition, the holes may be positioned in central regions of the first and second light emitting cells, respectively, and the connection part may be exposed in the lower semiconductor layer of the second conductivity type of the first light emitting cell and the hole of the second light emitting cell. The upper semiconductor layer of the first conductivity type is electrically connected.

Since the connection part is positioned between the substrate and the light emitting cells, it is possible to prevent the light emitted from the light emitting surface of the light emitting cells from being lost by the connection part. In addition, since the hole is located in the center area of the light emitting cells, the connection part may be connected to the first conductive upper semiconductor layer in the center area, thereby distributing the current over a wide area of the light emitting cell.

Further, the first and second light emitting cells may each have one hole for exposing the upper semiconductor layer of the first conductivity type, but is not limited thereto and may have a plurality of holes.

The light emitting device may further include a separation groove separating the light emitting cells and an insulating layer interposed between the separation groove and the connection portion. It is possible to prevent the connection part from being exposed by the insulating layer while etching the semiconductor layers to form the isolation groove, and thus prevent the connection part from being damaged by etching.

Furthermore, the insulating layer may include a DBR. Therefore, the light traveling toward the substrate in the region between the light emitting cells can be reflected, thereby further improving the light efficiency.

In addition, the separation groove may penetrate the upper semiconductor layer of the first conductivity type, the active layer, and the lower semiconductor layer of the second conductivity type. That is, the separation groove may be formed by etching semiconductor layers including the upper semiconductor layer of the first conductivity type, the active layer, and the lower semiconductor layer of the second conductivity type, thereby simplifying a process of forming light emitting cells. .

The light emitting device may further include an insulating layer covering sidewalls of the holes. The insulating layer prevents the first conductive upper semiconductor layer and the second conductive lower semiconductor layer from being short-circuited by the connecting portion. Furthermore, this insulating layer may comprise a DBR. Accordingly, it is possible to prevent the light generated in the light emitting cell from being absorbed and lost in the connecting portion in the hole.

In example embodiments, the light emitting device may further include an ohmic contact layer contacting the second conductive lower semiconductor layer of each of the light emitting cells. In this case, the connection part is connected to the ohmic contact layer of the first light emitting cell and is insulated from the ohmic contact layer of the second light emitting cell. For example, an insulating layer may be interposed between the ohmic contact layer of the second light emitting cell and the connection part, and the connection part may be insulated from the ohmic contact layer by the insulating layer.

In addition, a DBR may be interposed between the ohmic contact layer and the second conductive lower semiconductor layer. In this case, the DBR may have through holes, and the ohmic contact layer may be connected to the second conductive lower semiconductor layer through the through holes.

On the other hand, a separation insulating layer may be interposed between the connection portion and the substrate. The isolation insulating layer separates the bonding metal from the connection to prevent electrical short circuit.

According to another aspect of the present invention, a light emitting device includes: a substrate; And a top semiconductor layer of a first conductivity type, an active layer and a bottom semiconductor layer of a second conductivity type, and through the lower semiconductor layer and the active layer of the second conductivity type to expose the top semiconductor layer of the first conductivity type. A first light emitting cell including a hole; A first connection part electrically connected to the first conductive upper semiconductor layer through the hole; And a second connection part electrically connected to the second conductivity type lower semiconductor layer. The hole is positioned in a central area of the light emitting cell, and the first connection part is electrically insulated from the lower semiconductor layer of the second conductivity type. Accordingly, the first connection part and the second connection part may be disposed between the light emitting cells and the substrate to prevent light loss, and the second connection part may be connected to the central region of the light emitting cell to help distribute current in the light emitting cell. .

The first light emitting cell may include a plurality of holes exposing the upper semiconductor layer of the first conductivity type.

Meanwhile, an insulating layer may be formed on the sidewall of the hole. The insulating layer prevents the first conductive upper semiconductor layer and the second conductive lower semiconductor layer from being short-circuited by the second connection part. Furthermore, the insulating layer may include a DBR, thus preventing the light generated in the first light emitting cell from being lost by the second connector.

In addition, the ohmic contact layer may contact the second conductive lower semiconductor layer. The second connection part may be connected to the ohmic contact layer. Furthermore, the ohmic contact layer may include a reflective metal layer, and thus may reflect upwardly the light generated in the first light emitting cell and traveling toward the substrate.

In addition, an insulating layer may be interposed between the first connection portion and the ohmic contact layer. The ohmic contact layer and the first connection portion may be insulated by the insulating layer. In addition, the insulating layer may include a DBR.

The light emitting device may further include a second light emitting cell including an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type, and the second connection part may include the second light emitting cell. May be electrically connected to the first conductive upper semiconductor layer.

For example, the second light emitting cell may include a hole penetrating the second conductive lower semiconductor layer and the active layer to expose the first conductive upper semiconductor layer, and the second connection portion may be formed through the hole. It may be electrically connected to the first conductivity type upper semiconductor layer of the second light emitting cell.

The first and second light emitting cells may be separated from each other by a separation groove, and an insulating layer may be interposed between the separation groove and the second connection portion. Furthermore, this insulating layer may comprise a DBR.

A light emitting device according to another aspect of the present invention is a light emitting cell having a truncated pyramid shape and disposed on a substrate, the first nitride semiconductor layer comprising a roughened upper surface and a lower surface facing the upper surface; A second nitride semiconductor layer, an active layer positioned between the first nitride semiconductor layer and the second nitride semiconductor layer, and having a wide entrance and a narrow bottom, and penetrating the second nitride semiconductor layer and the active layer to form the first nitride semiconductor layer. A light emitting cell including a hole exposing a portion of a lower surface of the nitride semiconductor layer; A reflective layer disposed on a lower surface of the second nitride semiconductor layer; A first insulating layer disposed on the sidewalls of the holes and the reflective layer; A connector disposed on the first insulating layer and electrically connected to the exposed portion of the lower surface of the first nitride semiconductor layer; A second insulating layer disposed on the connection portion; An adhesive layer disposed on the second insulating layer; And a bonding metal layer positioned between the adhesive layer and the substrate.

A light emitting device according to another aspect of the present invention is a light emitting cell having a truncated pyramid shape and disposed on a substrate, the first nitride semiconductor layer comprising a roughened upper surface and a lower surface facing the upper surface; A second nitride semiconductor layer, an active layer positioned between the first nitride semiconductor layer and the second nitride semiconductor layer, and having a wide entrance and a narrow bottom, and penetrating the second nitride semiconductor layer and the active layer to form the first nitride semiconductor layer. A light emitting cell including a hole exposing a portion of a lower surface of the nitride semiconductor layer; A distributed Bragg reflector (DBR) disposed on a lower surface of the second nitride semiconductor layer and sidewalls of the holes; A reflective layer disposed on the DBR; A first insulating layer disposed on the reflective layer; A connector disposed on the first insulating layer and electrically connected to the exposed portion of the lower surface of the first nitride semiconductor layer; A second insulating layer disposed on the connection portion; An adhesive layer disposed on the second insulating layer; And a bonding metal layer positioned between the adhesive layer and the substrate.

According to the present invention, it is possible to provide a high voltage driving light emitting device capable of preventing an electrical short circuit in a light emitting cell by preventing generation of metal etching by-products. In addition, by adopting the insulating layer including the DBR, it is possible to reflect the light directed toward the substrate side, thereby improving the luminous efficiency. Further, by embedding the connecting portions connecting the light emitting cells inside the light emitting element, it is possible to prevent the light emitted from the light emitting surface from being lost by the connecting portions. Furthermore, by forming a hole in the central regions of the light emitting cells and connecting the connection portion to the first conductive upper semiconductor layer through the hole, it is possible to provide a high voltage driving light emitting device capable of assisting current dispersion in the light emitting cells. have.

1 to 4 are cross-sectional views illustrating a method of manufacturing an AC light emitting device according to the prior art.
5 is a schematic plan view illustrating a light emitting device according to an embodiment of the present invention.
6 is a cross-sectional view taken along the cutting line AA of FIG. 5 to illustrate a light emitting device according to an embodiment of the present invention.
7 to 12 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.
13 is a cross-sectional view illustrating a light emitting device according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

5 is a schematic plan view illustrating a light emitting device according to an embodiment of the present invention, and FIG. 6 is a cross-sectional view taken along the cutting line A-A of FIG. 5. In FIG. 5, buried components inside the light emitting device are indicated by dotted lines.

5 and 6, the light emitting device includes a substrate 151, first and second light emitting cells S1 and S2, an isolation trench 161, and connecting portions 135. In addition, the light emitting device may include holes 130a, an ohmic contact layer 131, an insulating layer 133, a separation insulating layer 137, an adhesive layer 139, and a bonding metal 141, and may also be protected. It may include an insulating layer.

The substrate 151 is separated from a growth substrate for growing the compound semiconductor layers and is a substrate attached to the compound semiconductor layers that have already been grown. The substrate 151 may be a sapphire substrate, but is not limited thereto, and may be another kind of insulating or conductive substrate. In particular, when the sapphire substrate is used as the growth substrate of the semiconductor layers, the substrate 151 is preferably a sapphire substrate because it has the same thermal expansion coefficient as that of the growth substrate.

The light emitting cells S1 and S2 are separated by separation grooves 161. As the sidewalls of the separation grooves 161 are formed to be inclined, the light emitting cells S1 and S2 may have a truncated pyramid shape. Each of the light emitting cells S1 and S2 includes a semiconductor stack 130 including an upper semiconductor layer 125 of a first conductivity type, an active layer 127, and a lower semiconductor layer 129 of a second conductivity type. The active layer 127 is interposed between the upper and lower semiconductor layers 125 and 129. Meanwhile, the light emitting cells S1 and S2 have holes 130a through the lower semiconductor layer 129 of the second conductivity type and the active layer 127 to expose the upper semiconductor layer 125 of the first conductivity type. . The holes 130a are positioned in the central regions of the light emitting cells S1 and S2, respectively. Each of the light emitting cells S1 and S2 may have one hole 130a, but is not limited thereto, and may have a plurality of holes 130a.

As illustrated in FIG. 6, the hole 130a may have a wide inlet and a narrow bottom. That is, the hole 130a may have a horn shape, for example, a truncated cone shape.

The active layer 127 and the upper and lower semiconductor layers 125 and 129 may be formed of a nitride semiconductor, that is, a III-N-based compound semiconductor, such as (Al, Ga, In) N semiconductor. The upper and lower semiconductor layers 125 and 129 may be a single layer or multiple layers, respectively. For example, the upper and / or lower semiconductor layers 125 and 129 may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 127 may have a single quantum well structure or a multiple quantum well structure. Preferably, the first conductivity type is n-type, and the second conductivity type is p-type. Since the upper semiconductor layers 125 may be formed of an n-type semiconductor layer having a relatively low resistance, the upper semiconductor layers 125 may have a relatively thick thickness. Therefore, it is easy to form the rough surface R on the upper surface of the upper semiconductor layer 125, the rough surface (R) improves the extraction efficiency of the light generated in the active layer 127.

Meanwhile, the separation groove 161 is formed through the first conductive upper semiconductor layer 125, the active layer 127, and the second conductive lower semiconductor layer 129. The inner wall is formed of the semiconductor stack 130. Since the separation grooves 161 may be formed to have the same depth, the etching process for forming the separation grooves 161 may be stabilized.

Meanwhile, the connection parts 135 are positioned between the light emitting cells S1 and S2 and the substrate 151 to electrically connect the light emitting cells S1 and S2. Two connection parts are connected to one light emitting cell S1 or S2, and the two connecting parts 135 are the first conductive upper semiconductor layer 125 and the second conductive lower semiconductor of the light emitting cell S1 or S2. Electrically connected to each of the layers 129. In addition, each connection unit 135 electrically connects adjacent light emitting cells. For example, the connection part 135 electrically connects the first conductive lower semiconductor layer 129 of the first light emitting cell S1 and the first conductive upper semiconductor layer 125 of the second light emitting cell S2. . In this case, the connection part 135 may be electrically connected to the first conductivity type upper semiconductor layer 125 exposed in the hole 130a of the second light emitting cell. The connection part 135 may include a horn-shaped protrusion extending through the hole 130a and connected to the first nitride semiconductor layer.

As such, a plurality of light emitting cells may be connected in series with each other by the connecting units 135 to provide a series array of light emitting cells, and thus a light emitting device capable of driving under high voltage may be provided. In addition, a plurality of series arrays may be provided, and an AC light emitting device capable of being driven under an AC power source by being connected in parallel with each other in series may be provided.

On the other hand, the ohmic contact layer 131 may contact the second conductivity type lower semiconductor layer 129. The ohmic contact layer 131 is formed over most of the second conductivity type lower semiconductor layer 129 to assist current dispersion in the light emitting cells S1 and S2. The ohmic contact layer 131 may include a reflective metal layer, and thus may reflect light generated in the light emitting cells S1 and S2 and traveling toward the substrate 151. In this case, the connection part 135 electrically connected to the second conductive lower semiconductor layer 129 of the first light emitting cell S1 may be connected to the ohmic contact layer 131. Meanwhile, the connection part 135 is electrically connected to the first conductive upper semiconductor layer 125 of the second light emitting cell S2, and the second conductive lower semiconductor layer 129 and the second light emitting cell ( It is electrically insulated from the ohmic contact layer 131 of S2).

Meanwhile, the insulating layer 133 is interposed between the separation groove 161 and the connection part 135 to prevent the connection part 135 from being exposed to the outside. Therefore, it is possible to prevent the connection parts 135 from being etched while the separation groove 161 is formed by etching.

Meanwhile, an insulating layer 133 is disposed on sidewalls of the holes 130a to prevent the upper semiconductor layer 125 and the lower semiconductor layer 127 from being short-circuited by the connecting portions 135. In addition, an insulating layer 133 is interposed between the ohmic contact layer 131 and the connection part 135.

In the present embodiment, the insulating layer in the holes 130a, the etching preventing insulating layer, and the insulating layers on the ohmic contact layer 131 may be formed as a single insulating layer 133, and the insulating layers may be distributed Bragg reflectors ( DBR). In other embodiments, the insulating layers may be formed by different processes.

Meanwhile, a bonding metal 141 may be interposed between the light emitting cells S1 and S2 and the substrate 151. The bonding metal 141 may be formed of Au / Sn as a metal material for bonding the substrate 151 on the light emitting cells S1 and S2. In addition, the isolation insulating layer 137 may be interposed between the light emitting cells S1 and S2 and the bonding metal 141 to electrically insulate the connecting portions 135 from the bonding metal 141. Meanwhile, an adhesion layer 139 such as Cr / Au may be formed under the isolation insulating layer 137 to improve the adhesion of the bonding metal 141.

Meanwhile, the first conductivity type upper semiconductor layer 125 may have a roughened surface (R). In addition, a protective insulating layer (not shown) may cover the light emitting cells S1 and S2 to protect the light emitting cells. The protective insulating layer may also fill the separation groove 161.

7 to 12 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.

Referring to FIG. 7, a semiconductor stack 130 of compound semiconductor layers is formed on a sacrificial substrate 121. The sacrificial substrate 121 may be a sapphire substrate, but is not limited thereto, and may be another hetero substrate. Meanwhile, the compound semiconductor layers include the first conductive semiconductor layer 125 and the second conductive semiconductor layer 129 and an active layer 129 interposed therebetween. The first conductivity type semiconductor layer 125 is located close to the sacrificial substrate 121. The first and second conductivity-type semiconductor layers 125 and 129 may be formed in a single layer or multiple layers, respectively. In addition, the active layer 127 may be formed in a single quantum well structure or a multiple quantum well structure.

The compound semiconductor layers may be formed of a III-N-based compound semiconductor, and may be grown on the sacrificial substrate 121 by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE). Can be.

Meanwhile, before forming the compound semiconductor layers, a buffer layer (not shown) may be formed. The buffer layer is adopted to mitigate lattice mismatch between the sacrificial substrate 121 and the compound semiconductor layers, and may be a gallium nitride-based material layer such as gallium nitride or aluminum nitride.

Holes 130 are formed to pattern the semiconductor stack 130 to expose the first conductivity-type semiconductor layer 125. The holes 130a are formed in the central region of the light emitting cell region and are formed to connect the connecting portions to the first conductivity type semiconductor layer 125. Meanwhile, side surfaces of the active layer 127 and the second conductivity-type semiconductor layer 129 are exposed on the inner walls of the holes 130a. The holes 130a may be formed to have an horn-shaped cone, such as a truncated cone, having a wide entrance and a narrow bottom.

To form the holes 130a, the compound semiconductor layers may be patterned using a photolithography and an etching process, which is generally similar to the mesa etching process. However, the mesa etching process is generally formed in a mesh shape to isolate the second conductivity-type semiconductor layers 129 of the light emitting cells from each other, but in the present invention, the holes 130a are separated from each other. Accordingly, the area of the holes 130a can be reduced, and therefore, it is advantageous to planarize the separation insulating layer and the bonding metal in the future, and as a result, the substrate 151 can be attached stably.

Referring to FIG. 8, an ohmic contact layer 131 may be formed on the second conductive semiconductor layer 129. The ohmic contact layer 131 contacts ohmic contact with the second conductive semiconductor layer 129. The ohmic contact layer 131 is formed on each light emitting cell region and has openings that expose the holes 130a. The ohmic contact layer 131 may include a reflective metal layer and may include a barrier layer for protecting the reflective metal layer.

Meanwhile, an insulating layer 133 is formed to cover sidewalls of the holes 130a and cover a portion of the ohmic contact layer 131. The insulating layer 133 also covers the second conductivity type semiconductor layer 129 positioned in the region between the light emitting cell regions. The insulating layer covering the sidewalls of the holes 130a, the insulating layer covering the ohmic contact layer 131, and the insulating layer positioned between the light emitting cell regions may all be formed of the same material by the same process, but is not limited thereto. Or, they may be formed by different processes, respectively.

The insulating layer 133 may be formed of, for example, SiO ₂ , SiN, MgO, TaO, TiO ₂ , or a polymer, and may also include a distributed Bragg reflector (DBR).

9, connection parts 135 are formed on the insulating layer 133. The connecting portions 135 electrically connect the first conductive semiconductor layer 125 exposed to the hole 130a and the second conductive semiconductor layer 129 of the light emitting cell region adjacent to each other. The connection part 135 electrically connected to the second conductivity type semiconductor layer 129 may be connected to the ohmic contact layer 131. Meanwhile, in some regions, the connection part 135 needs to be insulated from the ohmic contact layer 131 and the second conductive semiconductor layer 129. For this purpose, the connection part 135 and the ohmic contact layer 131 are required. The insulating layer 133 is interposed between them.

Referring to FIG. 10, a separation insulating layer 137 is formed on almost the entire surface of the sacrificial substrate 121 on which the connecting portions 135 are formed. The isolation insulating layer 137 covers the connection portions 135 and the insulating layer 133. The isolation insulating layer 137 may be formed of a silicon oxide film or a silicon nitride film. In addition, the isolation insulating layer 137 may be a distributed Bragg reflector periodically formed of SiO 2 / TiO 2. An adhesive layer 139 may be formed on the separation insulating layer 137, a bonding metal 141 may be formed on the adhesive layer 139, and the substrate 151 may be bonded. The bonding metal 147 may be formed of, for example, AuSn (80 / 20wt%). The substrate 151 is not particularly limited, but may be a substrate having the same thermal expansion coefficient as the sacrificial substrate 121, for example, a sapphire substrate.

Referring to FIG. 11, the sacrificial substrate 121 is subsequently removed and the first conductivity type semiconductor layer 125 is exposed. The sacrificial substrate 121 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. At this time, the buffer layer is also removed to expose the first conductivity-type semiconductor layer 125.

Referring to FIG. 12, separation grooves 161 are formed to separate the semiconductor stack 130 into light emitting cells S1 and S2. The isolation groove 161 is formed by etching the semiconductor stack 130 until the insulating layer 133 is exposed. In this case, the connection parts 135 may be prevented from being exposed by the insulating layer 133. Sidewalls of the isolation grooves 161 include the semiconductor stack 130, and side surfaces of the first conductivity type semiconductor layer 125, the active layer 127, and the second conductivity type semiconductor layer 129 are exposed in the isolation grooves. . Meanwhile, a roughened surface R may be formed on the first conductive semiconductor layer 125 by PEC (photoelectric chemistry) etching.

Meanwhile, a protective insulating layer (not shown) and electrode pads (not shown) are formed on the first conductivity-type semiconductor layer 125, and each light emitting device includes light emitting cells S1 and S2. The substrate 151 is separated to complete a single chip light emitting device.

13 is a cross-sectional view illustrating a light emitting device according to another embodiment of the present invention.

Referring to FIG. 13, the light emitting device according to the present embodiment is generally similar to the light emitting device described with reference to FIGS. 5 and 6, but there is a difference in that the DBR 170 is formed before the ohmic contact layer 171 is formed.

That is, the DBR 170 is interposed between the ohmic contact layer 171 and the second conductive lower semiconductor layer 129. In addition, the DBR may cover sidewalls of the holes 130a and may be interposed between the separation groove 161 and the connection part 175.

The DBR 170 may have through holes 170a between the ohmic contact layer 171 and the second conductive lower semiconductor layer 129, and the ohmic contact layer 171 may have through holes. It may be connected to the second conductivity type lower semiconductor layer 129 through 170a.

An insulating layer 173 is formed on some regions of the ohmic contact layer 171 to electrically insulate the ohmic contact layer 171 from the connection part 175.

According to the present exemplary embodiment, the DBR 170 is disposed between the sidewalls of the holes 130a, the region between the ohmic contact layer 171 and the second conductive lower semiconductor layer 129, and the separation groove 161 and the connection portion 175. As a result, the reflectance of the light generated in the light emitting cells S1 and S2 may be increased, thereby improving light emission efficiency.

Although the embodiments of the present invention have been described above by way of example, the present invention is not limited to the above-described embodiments and may be variously modified and changed by those skilled in the art without departing from the spirit of the present invention. . Such modifications and variations are included in the scope of the present invention as defined in the following claims.

Claims (21)

Board;
A first nitride semiconductor layer including a top surface having a roughness, a second nitride semiconductor layer, an active layer disposed between the first nitride semiconductor layer and the second nitride semiconductor layer, and the second nitride semiconductor layer and the active layer A light emitting cell including at least one hole exposing the first nitride semiconductor layer;
A first insulating layer disposed on the second nitride semiconductor layer;
A connection part disposed on the first insulating layer and in contact with a portion of the exposed first nitride semiconductor layer;
A second insulating layer disposed on the connection portion;
An adhesive layer disposed on the second insulating layer; And
A bonding metal layer disposed between the adhesive layer and the substrate,
And the light emitting cell includes a first side surface and a second side surface having a predetermined inclination, wherein the first side surface and the second side surface are symmetrical to each other. The method according to claim 1,
The first insulating layer is a light emitting device comprising a DBR. The method according to claim 2,
And the connection part connects the first nitride semiconductor layer to a second nitride semiconductor layer of an adjacent light emitting cell. The method according to claim 1,
And the light emitting cell includes a plurality of holes. The method according to claim 4,
And the connection part is electrically connected to the first nitride semiconductor layer through each of the holes. The light emitting device of claim 1, further comprising a plurality of light emitting cells, and a plurality of connection units connecting the plurality of light emitting cells in series. The method of claim 6,
And a corresponding connection part of the plurality of connection parts contacts an edge region of a second nitride semiconductor layer of the light emitting cell of the plurality of light emitting cells through a first through hole of the first insulating layer. The method of claim 6,
The connection part of the plurality of connection parts may contact the first nitride semiconductor layer of the light emitting cell through a second through hole of the first insulating layer disposed in a hole of the light emitting cell of the plurality of light emitting cells. Light emitting element. The method according to claim 1,
And the reflective layer, the first insulating layer, the connection part, the second insulating layer, the adhesive layer, and the bonding metal layer completely fill a space between the light emitting cell and the substrate. The light emitting device of claim 1, wherein the hole includes an inclined surface that is narrowed toward the first nitride semiconductor layer from the second nitride semiconductor layer. The method according to claim 10,
And the connection part includes a protrusion that becomes narrower from the second nitride semiconductor layer to the first nitride semiconductor layer, and the protrusion extends through the hole to contact the first nitride semiconductor layer. Board;
A first nitride semiconductor layer including a top surface having a roughness, a second nitride semiconductor layer, an active layer disposed between the first nitride semiconductor layer and the second nitride semiconductor layer, and the second nitride semiconductor layer and the active layer A light emitting cell including at least one hole exposing the first nitride semiconductor layer;
A distributed Bragg reflector (DBR) disposed on a lower surface of the second nitride semiconductor layer and sidewalls of the holes;
A reflective layer disposed on the DBR
A first insulating layer disposed on the reflective layer;
A connection part disposed on the first insulating layer and in contact with a portion of the exposed first nitride semiconductor layer;
A second insulating layer disposed on the connection portion;
An adhesive layer disposed on the second insulating layer; And
A bonding metal layer disposed between the adhesive layer and the substrate,
And the light emitting cell includes a first side surface and a second side surface having a predetermined inclination, wherein the first side surface and the second side surface are symmetrical to each other. The method of claim 12,
The reflective layer extends through the through holes of the DBR to be connected in parallel to the second nitride semiconductor layer. The method of claim 12,
A plurality of light emitting cells,
The first insulating layer,
A plurality of first through holes exposing a portion of the reflective layer; And
And a plurality of second through holes exposing holes of the plurality of light emitting cells. The method according to claim 14,
Including a plurality of connection parts,
Wherein each of the plurality of connecting portions contacts one of the exposed portions of the reflective layer and one of the exposed portions of the first nitride semiconductor layer such that the plurality of light emitting cells are connected in series. The method according to claim 14,
Wherein each of the plurality of light emitting cells includes a plurality of holes. The method of claim 12,
And the hole is located in a central area of the light emitting cell. The method of claim 12,
And the light emitting cell includes a plurality of holes. The method of claim 12,
The light emitting cell is characterized in that the truncated pyramidal shape. The light emitting device according to claim 12, wherein the hole includes an inclined surface that is narrowed toward the first nitride semiconductor layer from the second nitride semiconductor layer. The method of claim 20,
And the connection part includes a protrusion that becomes narrower from the second nitride semiconductor layer to the first nitride semiconductor layer, and the protrusion extends through the hole to contact the first nitride semiconductor layer.

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