KR101587539B1 - Light emitting device having plurality of light emitting cells and method of fabricating the same - Google Patents

Light emitting device having plurality of light emitting cells and method of fabricating the same Download PDF

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KR101587539B1
KR101587539B1 KR1020090027227A KR20090027227A KR101587539B1 KR 101587539 B1 KR101587539 B1 KR 101587539B1 KR 1020090027227 A KR1020090027227 A KR 1020090027227A KR 20090027227 A KR20090027227 A KR 20090027227A KR 101587539 B1 KR101587539 B1 KR 101587539B1
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South Korea
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light emitting
layer
emitting cells
electrodes
etch stop
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KR1020090027227A
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Korean (ko)
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KR20100108906A (en
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서원철
이준희
김창연
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서울반도체 주식회사
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Priority to KR1020090027227A priority Critical patent/KR101587539B1/en
Priority to US13/202,210 priority patent/US8937327B2/en
Priority to PCT/KR2010/001804 priority patent/WO2010114250A2/en
Publication of KR20100108906A publication Critical patent/KR20100108906A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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Abstract

A light emitting device having a plurality of light emitting cells and a method of manufacturing the same are disclosed. The light emitting device includes a plurality of light emitting cells spaced apart from each other on a support substrate. Each of the light emitting cells includes an upper semiconductor layer of a first conductive type, an active layer, and a lower semiconductor layer of a second conductive type. On the other hand, the electrodes are positioned between the substrate and the light emitting cells, and each of the electrodes has an extending portion extending toward the adjacent light emitting cells. Further, an interlayer insulating layer is interposed between the supporting substrate and the electrodes. This interlayer insulating layer has a relatively large thermal conductivity as compared with the silver paste. In addition, a bonding metal is interposed between the supporting substrate and the interlayer insulating layer.

A light emitting cell, a light emitting element, a reflective structure, a support substrate, a sacrificial substrate, an etch stop layer, a wiring, an electrode,

Description

FIELD OF THE INVENTION [0001] The present invention relates to a light emitting device having a plurality of light emitting cells and a method of manufacturing the same.

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly, to a light emitting device having a plurality of light emitting cells and a method of manufacturing the same.

Gallium nitride based light emitting diodes are widely used as display devices and backlights. In addition, the light emitting diode has a smaller consumed electric power and longer life than conventional light bulbs or fluorescent lamps, and has been widely used for general lighting purposes in place of incandescent lamps and fluorescent lamps.

Recently, light emitting diodes that emit light by directly connecting a light emitting diode to a high voltage direct current power source or a high voltage alternating current power source have been commercialized. A light emitting diode which can be used in connection with a high voltage direct current or an alternating current power source is disclosed in, for example, International Publication No. WO 2004/023568 (A1), entitled " LIGHT-EMITTING DEVICE HAVING LIGHT-EMITTING ELEMENTS "Quot;, by SAKAI et al.

According to WO 2004/023568 (A1), a series LED array is formed in which LEDs are two-dimensionally connected on an insulating substrate such as a sapphire substrate. These series LED arrays can be driven under a high voltage direct current power supply. In addition, these LED arrays are connected in antiparallel on the sapphire substrate, and a single chip light emitting element capable of being driven by a high voltage AC power source is provided.

Since the light emitting device forms light emitting cells on a substrate used as a growth substrate, for example, a sapphire substrate, there is a limit to the structure of the light emitting cells, and there is a limit to improve light extraction efficiency. A method of manufacturing a light emitting device having a plurality of light emitting cells by applying a substrate separating process to solve such a problem is disclosed in Korean Registered Patent Application No. 10-0599012 entitled " Light Emitting Diode Having a Thermally Conductive Substrate and Method for Producing It " Lt; / RTI >

1 to 4 are cross-sectional views illustrating a method of manufacturing a light emitting device according to the related art.

1, semiconductor layers including a buffer layer 23, an N-type semiconductor layer 25, an active layer 27, and a P-type semiconductor layer 29 are formed on a sacrificial substrate 21, And a second metal layer 53 is formed on the support substrate 51, which is separate from the sacrificial substrate 21. The first metal layer 31 is formed on the support substrate 51, The first metal layer 31 may comprise a reflective metal layer. The second metal layer 53 is bonded to the first metal layer 31 and the substrate 51 is bonded to the upper portions of the semiconductor layers.

Referring to FIG. 2, after the support substrate 51 is bonded, the sacrificial substrate 21 is separated using a laser lift-off process. After the sacrificial substrate 21 is separated, the remaining buffer layer 23 is removed, and the surface of the N-type semiconductor layer 25 is exposed.

Referring to FIG. 3, the semiconductor layers 25, 27 and 29 and the metal layers 31 and 53 are patterned using photolithography and etching techniques to form metal patterns 40 spaced apart from each other, The light emitting cells 30 are formed on a partial region of the light emitting cells 30. [ The light emitting cells 30 include a patterned P-type semiconductor layer 29a, an active layer 27a, and an N-type semiconductor layer 25a.

Referring to FIG. 4, metal wires 57 electrically connecting the upper surface of the light emitting cells 30 and the metal patterns 40 adjacent thereto are formed. The metal wires 57 connect the light emitting cells 30 to form a serial array of light emitting cells. An electrode pad 55 may be formed on the N-type semiconductor layer 25a to connect the metal wires 57 and an electrode pad may be formed on the metal patterns 40. [ Two or more such arrays may be formed, and light emitting diodes are provided in which these arrays are connected in antiparallel and can be driven under an AC power source.

According to the conventional technique, various support substrates 51 can be selected to improve the heat emission performance of the light emitting diode, and the surface of the N-type semiconductor layer 25a can be processed to improve the light extraction efficiency. In addition, since the first metal layer 31a includes the reflective metal layer and reflects light traveling from the light emitting cells 30 to the substrate 51 side, the light emitting efficiency can be further improved.

However, since the above-described conventional technique uses the metal layers 31 and 53 for bonding the supporting substrate to form the metal patterns 40, the semiconductor layers 25 and 27 and the metal layers 31 and 53 The etching by-product of the metal material sticks to the sidewall of the light emitting cell 30 to cause an electrical short between the N-type semiconductor layer 25a and the P-type semiconductor layer 29a. Also, the surface of the first metal layer 31a exposed during the etching of the semiconductor layers 25, 27 and 29 is liable to be damaged by the plasma. This etch damage is further exacerbated if the first metal layer 31a comprises a reflective metal layer such as Ag or Al. Damage to the surface of the metal layer 31a due to plasma deteriorates the adhesion of the wiring lines 57 or the electrode pads formed thereon, resulting in element failure.

Meanwhile, according to the prior art, the first metal layer 31 may include a reflective metal layer, thus reflecting light traveling from the light emitting cells 30 to the substrate side again. However, the reflective metal layer exposed in the space between the light emitting cells 30 is susceptible to etching damage as it is exposed to the outside. In particular, the oxidation of the exposed reflective metal layer is not limited to the exposed portion but proceeds to the region below the light emitting cells 30, thereby lowering the reflectance of the reflective metal layer.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a light emitting device having a plurality of light emitting cells capable of preventing an electrical short circuit in a light emitting cell caused by metal etching byproducts caused by patterning metal layers for bonding, .

Another object of the present invention is to provide a light emitting device having a plurality of light emitting cells capable of preventing an electrical short circuit in a light emitting cell due to metal etching byproducts without deteriorating the heat emission performance and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device and a method of manufacturing the same that can prevent the reflective metal layer from being deformed by etching or oxidation.

The present invention provides a light emitting device having a plurality of light emitting cells and a method of manufacturing the same. According to one aspect of the present invention, there is provided a light emitting device comprising: a support substrate; A plurality of light emitting cells disposed on the support substrate and spaced apart from each other, the light emitting cells including an upper semiconductor layer of a first conductive type, an active layer, and a lower semiconductor layer of a second conductive type; And electrodes extending between the supporting substrate and the light emitting cells, the electrodes being electrically connected to the corresponding lower semiconductor layers of the second conductive type and extending to neighboring light emitting cells, ; An interlayer insulating layer interposed between the supporting substrate and the electrodes, the interlayer insulating layer having a relatively large thermal conductivity as compared with the silver paste; And a bonding metal interposed between the supporting substrate and the interlayer insulating layer. Accordingly, it is not necessary to form the metal pattern using the bonding metal, and the interlayer insulating layer does not deteriorate the heat radiation performance because it has a relatively large thermal conductivity as compared with the silver paste conventionally used for chip mounting.

The silver paste used for light emitting diode chip mounting has a thermal conductivity of approximately 0.578 W / mK. Therefore, when using an interlayer insulating layer having a relatively large thermal conductivity as compared with such a silver paste, the heat emission performance of the light emitting device is not deteriorated by the interlayer insulating layer. The interlayer insulating layer may be formed of, for example, a silicon oxide film (SiO 2 ), a silicon nitride film (Si 3 N 4 ), an aluminum nitride film (AlN), or a polymer epoxy.

The electrodes may each include a reflective structure and a protective metal layer. The reflective structure reflects light emitted from the light emitting layer and traveling toward the support substrate. The reflective structure may be a single or multiple reflective metal layer formed of Ag, Al, Rh, Pt, or an alloy thereof, or may be a distributed Bragg reflector (DBR) structure.

Further, the reflective structure may be defined in a lower region of the lower semiconductor layer, and the protective metal layer may cover the side surfaces and the lower surface of the reflective structure. Therefore, the reflective structure can be prevented from being exposed to the outside.

On the other hand, an etch stop layer may be located between the light emitting cells and between the electrodes, and at least a part of the etch preventing layer may extend below the edges of neighboring light emitting cells. In addition, the etch stop layer may have an opening exposing the extension of the electrode. By employing the etch stop layer, it is possible to prevent the electrodes from being exposed during the formation of the light emitting cells, thereby preventing the generation of metal etch byproducts.

On the other hand, the side insulating layer may cover the side surfaces of the light emitting cells, and the wiring may be spaced from the side surfaces of the light emitting cells by the side insulating layer to electrically connect the light emitting cells. Each of the wirings may be electrically connected to the upper semiconductor layer of one light emitting cell and the other end of the wirings may be electrically connected to an electrode electrically connected to the lower semiconductor layer of the neighboring light emitting cell through the opening of the anti- .

On the other hand, the upper semiconductor layers may each have a roughened surface. The light extraction efficiency is increased by the roughened surface.

In addition, the substrate may be a sapphire substrate. In general, when a substrate separation process is used, a thermally conductive substrate different from sapphire is adopted as the bonded substrate, but the present invention is not particularly limited to the bonded substrate, but rather adopts a sapphire substrate as a preferable substrate. Therefore, by using the same substrate as the growth substrate of the semiconductor layers as the bonding substrate, the substrate separation process and the subsequent patterning processes can be performed more safely.

According to another aspect of the present invention, there is provided a method of manufacturing a light emitting device having a plurality of light emitting cells, including: forming a first conductive semiconductor layer, a second conductive semiconductor layer, and a first conductive semiconductor layer on a sacrificial substrate; Forming compound semiconductor layers including an interposed active layer, wherein the first conductive type semiconductor layer is disposed close to the sacrificial substrate; Forming electrodes on the compound semiconductor layers, the electrodes being spaced apart from each other; Forming an interlayer insulating layer on the electrodes, the interlayer insulating layer having a relatively higher thermal conductivity than silver paste; Bonding a supporting substrate on the interlayer insulating layer; Removing the sacrificial substrate to expose the first conductivity type semiconductor layer; And patterning the compound semiconductor layers to form a plurality of light emitting cells spaced from each other. Accordingly, it is not necessary to pattern the bonding metal, and the generation of etching by-products of the bonding metal can be fundamentally cut off. Further, since the interlayer insulating layer having a relatively large thermal conductivity compared to the silver paste is formed, the heat emission performance of the light emitting element is not deteriorated by the interlayer insulating layer during actual operation of the light emitting element.

On the other hand, forming the electrodes forms reflective structures spaced apart from each other,

And forming a protective metal layer covering the reflective structures.

In addition, the method may further include forming an anti-etching layer on the compound semiconductor layers. At this time, the etch stop layer has openings for exposing the second conductivity type semiconductor layer. Meanwhile, the reflective structures are formed in the openings of the etch stop layer.

More specifically, the method for manufacturing a light emitting device includes: forming a first conductive semiconductor layer on a sacrificial substrate, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers, Wherein the first conductivity type semiconductor layer is disposed close to the sacrificial substrate; Forming an anti-etching layer on the compound semiconductor layers, the anti-etching layer having openings exposing the second conductivity type semiconductor layer; Forming electrodes having an extension extending over the etch stop layer and filling the openings of the etch stop layer, the electrodes being spaced apart from each other; Forming an interlayer insulating layer on the electrodes, the interlayer insulating layer having a relatively higher thermal conductivity than silver paste; Bonding the substrate on the interlayer insulating layer; Removing the sacrificial substrate to expose the first conductivity type semiconductor layer; Patterning the compound semiconductor layers to expose the etch stop layer to form a plurality of light emitting cells spaced from each other; A side insulating layer covering the light emitting cells and exposing at least a part of the upper surface of the first conductive semiconductor layer, and patterning the etch stop layer to form openings for exposing the electrodes; And forming wirings connecting the first conductive type semiconductor layer and the exposed electrodes.

According to the above manufacturing method, when the plurality of light emitting cells are formed by patterning the compound semiconductor layers, the etch stop layer prevents the electrodes from being exposed. Therefore, it is possible to prevent the metal etching by-products from sticking to the side walls of the light emitting cells. The etch stop layer is formed of an insulating layer such as a silicon oxide film or a silicon nitride film.

The forming of the electrodes may include forming a reflective structure within the openings of the etch stop layer and forming a protective metal layer covering the reflective structure. Thus, the reflective structure can be prevented from being exposed to the outside.

In addition, a roughened surface can be formed on the exposed surface of the first conductive semiconductor layer.

According to the present invention, by adopting an interlayer insulating layer having a relatively large thermal conductivity and bonding the supporting substrate to the interlayer insulating layer, the heat radiation performance of the light emitting device is not deteriorated, Can be prevented. Further, according to the present invention, it is possible to prevent the reflective structure from being exposed to the etching process or the outside, and to prevent deformation of the metal reflection layer due to etching or oxidation.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, and the like of the components may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

5 is a cross-sectional view illustrating a light emitting device having a plurality of light emitting cells according to an embodiment of the present invention.

5, the light emitting device includes a support substrate 151, a plurality of light emitting cells LS1 and LS2, wirings 155, electrodes E1 and E2, an etch stop layer 131, An insulating layer 153, an interlayer insulating layer 137, and bonding metals 141 and 143.

The supporting substrate 151 is a bonded substrate bonded to the already grown compound semiconductor layers, which is separated from the growth substrate for growing the compound semiconductor layers. The supporting substrate 151 may be a sapphire substrate, but is not limited thereto, and may be another type of insulating or conductive substrate. Particularly, when a sapphire substrate is used as a growth substrate, it is preferable because it has the same thermal expansion coefficient as that of the growth substrate.

The plurality of light emitting cells LS1 and LS2 are spaced apart from each other on the upper surface of the supporting substrate 151. The upper semiconductor layer 125a and the active layer 127a of the first conductive type, Layer 129a. The active layer 127a is interposed between the upper and lower semiconductor layers 125a and 129a. Meanwhile, the lower semiconductor layer 129a and the upper semiconductor layer 125a may have the same area.

The active layer 127a and the upper and lower semiconductor layers 125a and 129a may be formed of a III-N compound semiconductor, for example, an (Al, Ga, In) N semiconductor. The upper and lower semiconductor layers 125a and 129a may be a single layer or a multi-layer, respectively. For example, the upper and / or lower semiconductor layers 125a and 129a may include a contact layer and a clad layer, and may also include a superlattice layer. Further, the active layer 127a may be a single quantum well structure or a multiple quantum well structure. Preferably, the first conductivity type is n-type and the second conductivity type is p-type. The upper semiconductor layers 125a can be formed of the n-type semiconductor layer having a relatively small resistance, so that the thickness of the upper semiconductor layers 125a can be relatively increased. Therefore, it is easy to form a rough surface R on the upper surface of the upper semiconductor layer 125a, and the rough surface R improves extraction efficiency of light generated in the active layer 127a.

The electrodes E1 and E2 are spaced apart from each other between the supporting substrate 151 and the light emitting cells LS1 and LS2. The electrode E1 is electrically connected to the lower semiconductor layer 129a of the light emitting cell LS1 and the electrode E2 is electrically connected to the lower semiconductor layer 129a of the light emitting cell LS2. On the other hand, each of the electrodes E1 and E2 has an extension extending toward the adjacent light emitting cell. That is, the electrode E1 has an extension extending toward the light emitting cell (not shown) adjacent to the electrode E1, and the electrode E2 has an extension extending toward the light emitting cell LS1.

The electrodes E1 and E2 may have reflective structures 133a and 133b and protective metal layers 135a and 135b. The reflective structures 133a and 133b may be formed of a single layer or multiple layers of a metal material having a high reflectance such as silver (Ag) or aluminum (Al), rhodium (Rh), platinum (Pt) . In addition, the reflective structures 133a and 133b may be formed in a multilayer structure of layers having different refractive indexes, for example, a distributed Bragg reflection (DBR) structure. In this case, the reflective structure may have through holes, and the protective metal layer may be connected to the light emitting cells through the through holes. The reflective structures 133a and 133b may be directly in contact with the lower semiconductor layers 129a of the light emitting cells LS1 and LS2 but other ohmic contact layers may be interposed between the reflective structure and the lower semiconductor layer. The protective metal layers 135a and 135b cover the reflective structure to prevent the reflective structure from being exposed to the outside. The protective metal layer may be formed of a single layer or a multilayer, and may be formed of, for example, Ni, Ti, Ta, Pt, W, Cr, Pd or the like. As shown, the protective metal layers 135a and 135b may extend outward to form an extended portion.

The etch stop layer 131 is located between the regions between the light emitting cells LS1 and LS2 and the electrodes E1 and E2. That is, the etch stop layer 131 is located at the bottom of the spaces generated as the light emitting cells LS1 and LS2 are separated. The etch stop layer 131 prevents the extensions of the electrodes E1 and E2 from being exposed in the separated region. The etch stop layer 131 extends under the edges of at least some neighboring light emitting cells LS1 and LS2. The etch stop layer 131 may be located below the bottom surface of the light emitting cells LS1 and LS2. Alternatively, a part of the etch stopping layer 131 may protrude into a region between the light emitting cells. The etch stop layer 131 is formed of an insulating layer such as a silicon oxide layer or a silicon nitride layer.

The extension of the electrodes extends below the etch stop layer 131 and the etch stop layer 131 has openings exposing the extensions of the electrodes E1 and E2. These openings provide a passage through which the wires 155 can be electrically connected to the electrodes E1 and E2.

On the other hand, the side insulating layer 153 covers the side surfaces of the light emitting cells LS1 and LS2 to prevent the wires 155 from shorting the upper semiconductor layer and the lower semiconductor layer of the light emitting cells. The side insulating layer 153 may cover a part of the upper surface of the light emitting cells and may extend to an upper portion of the etch stop layer 131. In this case, the side insulating layer 153 has openings for exposing the openings of the etch stop layer.

The wirings 155 electrically connect the light emitting cells LS1 and LS2 to form a serial array. Each of the wirings 155 is electrically connected to an electrode electrically connected to the upper semiconductor layer 125a of one light emitting cell at one end and electrically connected to the lower semiconductor layer 129a of the light emitting cell at the other end thereof, . One end of the wiring 155 is electrically connected to the upper semiconductor layer 125a of the light emitting cell LS1 and the other end of the wiring 155 is electrically connected to the electrode E2 through the opening of the etch stop layer 131. [ Pads (not shown) may be formed on the upper semiconductor layers 125a and the electrodes E1 and E2 to electrically connect the wirings 155. [ The wiring lines 155 are insulated from the side surfaces of the light emitting cells LS1 and LS2 by the side insulating layer 153. [

A serial array of light emitting cells is formed on the supporting substrate 151 by the wires 155. Accordingly, the serial array can be connected to a high voltage DC power source and driven. At least two series arrays may be formed on the support substrate 151 by the wires 155, and the arrays may be connected in antiparallel to each other to be driven by an AC power source. Alternatively, a series array may be formed by wires on a support substrate, and the series array may be driven by an AC power source by being connected to a bridge rectifier formed on the support substrate. The bridge rectifier may also be formed by connecting the light emitting cells by wires.

An interlayer insulating layer 137 is interposed between the electrodes E1 and E2 and the supporting substrate 151. Bonding metals 141 and 143 are interposed between the interlayer insulating layer 137 and the supporting substrate 151, . The interlayer insulating layer 137 prevents the electrodes E1 and E2 from being shorted to each other by the supporting substrate 151 or the bonding metals 141 and 143. [ The interlayer insulating layer has a relatively large thermal conductivity as compared with the thermal conductivity (~ 0.578 W / mK) of the silver paste used when the light emitting device (chip) is mounted in the package. For example, the interlayer insulating layer may be formed of a silicon oxide film, a silicon nitride film, an aluminum nitride film, or a polymer epoxy.

The bonding metals 141 and 143 improve adhesion between the interlayer insulating layer 137 and the supporting substrate 151 to prevent the supporting substrate 151 from being separated from the interlayer insulating layer 137.

In the prior art, electrodes are formed using bonding metals, but in the present invention, the bonding metal and the electrodes are separated from each other. Accordingly, it is not necessary to pattern the bonding metal, and thereby the occurrence of etching by-products due to the bonding metal patterning can be prevented.

6 to 11 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.

Referring to FIG. 6, compound semiconductor layers are formed on the sacrificial substrate 121. The sacrificial substrate 121 may be a sapphire substrate, but is not limited thereto, and may be another heterogeneous substrate. Meanwhile, the compound semiconductor layers include a first conductive semiconductor layer 125, a second conductive semiconductor layer 129, and an active layer 129 interposed therebetween. The first conductive semiconductor layer 125 is positioned close to the sacrificial substrate 121. The first and second conductive semiconductor layers 125 and 129 may be formed of a single layer or a multilayer. In addition, the active layer 127 may be formed of a single quantum well structure or a multiple quantum well structure.

The compound semiconductor layers may be formed of a III-N compound semiconductor and may be grown on the sacrificial substrate 121 by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) .

On the other hand, a buffer layer (not shown) may be formed before forming the compound semiconductor layers. The buffer layer is employed for relieving the lattice mismatch between the sacrificial substrate 121 and the compound semiconductor layers, and may be a layer of a gallium nitride based material such as gallium nitride or aluminum nitride.

Referring to FIG. 7, an anti-etching layer 131 is formed on the compound semiconductor layers, for example, the second conductive semiconductor layer 129. The etching prevention layer 131 has openings for exposing the second conductivity type semiconductor layer 129. The openings are formed corresponding to the respective light emitting cell regions on the light emitting cell regions, and are formed in a smaller area than the light emitting cell regions.

The etch stop layer 131 is formed by forming an insulating layer such as a silicon oxide layer or a silicon nitride layer on the second conductive type semiconductor layer 129 and patterning the insulating layer using a photolithography and etching process.

Reflective structures 133a and 133b are formed in the openings. The reflective structures 133a and 133b may be formed of a metal material having a high reflectivity, such as Ag, Al, or an alloy thereof. Alternatively, the reflective structures 133a and 133b may be formed by laminating layers having different refractive indices. When the reflective structure 131 is formed of a metal layer, it may be formed using a plating or deposition technique, for example, using a lift-off process. Meanwhile, an ohmic contact layer (not shown) may be formed on the second conductive semiconductor layer 129 before the reflective structures are formed. Also, the reflective structures may be formed first, and the etch stop layer 131 may be formed thereafter.

Referring to FIG. 8, protective metal layers 135a and 135b are formed to cover the reflective structures 133a and 133b. The protective metal layers 135a and 135b fill the openings of the etch stop layer 131 and extend to the top surface of the etch stop layer 131, respectively. The protective metal layers 135a and 135b are formed to be spaced apart from each other. The protective metal layers 135a and 135b may be formed of a single layer or a multilayer and may be formed of, for example, Ni, Ti, Ta, Pt, W, Cr, Pd or the like.

In the present embodiment, the reflective structures 133a and 133b and the protective metal layers 135a and 135b constitute electrodes E1 and E2. However, the electrodes E1 and E2 are not limited thereto and may be formed of a single metal layer. For example, the formation of the reflective structures may be omitted, and the protective metal layers 135a and 135b alone may constitute the electrodes.

Referring to FIG. 9, an interlayer insulating layer 137 having a relatively higher thermal conductivity than silver paste is formed on the electrodes E1 and E2. The interlayer insulating layer 137 covers the electrodes E1 and E2 and can fill gaps between the electrodes E1 and E2. The interlayer insulating layer may be formed of, for example, a silicon oxide film, a silicon nitride film, an aluminum nitride film, or a polymer epoxy.

Referring to FIG. 10, a bonding metal 141 is formed on the interlayer insulating layer 137, and a bonding metal 143 is formed on a separate support substrate 151. The bonding metal 141 may be formed of, for example, AuSn (80/20 wt%). The supporting substrate 151 is not particularly limited, but may be a substrate having the same thermal expansion coefficient as that of the sacrificial substrate 121, and may be, for example, a sapphire substrate.

Referring to FIG. 11, a supporting substrate 151 is bonded on the interlayer insulating layer 137 by bonding the bonding metals 141 and 143 to face each other. Then, the sacrificial substrate 121 is removed and the first conductive type semiconductor layer 125 is exposed. The sacrificial substrate 121 may be separated by a laser lift off (LLO) technique or other mechanical or chemical method. At this time, the buffer layer is also removed to expose the first conductivity type semiconductor layer 125. 12 is a view showing the first conductivity type semiconductor layer 125 facing upward after the sacrificial substrate 121 is removed.

Referring to FIG. 13, the compound semiconductor layers are patterned to form a plurality of light emitting cells LS1 and LS2. The light emitting cells LS1 and LS2 each include a patterned first conductive semiconductor layer 125a, a patterned active layer 127a, and a patterned second conductive semiconductor layer 129a. The compound semiconductor layers can be patterned using a photolithography and etching process, which process is commonly known as a mesa etching process. At this time, the compound semiconductor layers between the light emitting cells are removed by the etching process, and the etching preventing layer 131 is exposed. The etch stop layer 131 prevents the underlying electrodes E1 and E2 from being exposed during the etching process. To this end, etching is performed in a confined region above the etch stop layer 131.

Referring to FIG. 14, a side insulating layer 153 is formed to cover the side surfaces of the light emitting cells LS1 and LS2. The side insulating layer 153 may be formed by forming an insulating layer covering the light emitting cells and then patterning the insulating layer using a photolithography and etching process. The side insulating layer may be formed of, for example, SiO 2 , SiN, MgO, TaO, TiO 2 , or a polymer. The side insulating layer 153 covers the first conductivity type semiconductor layer 125a, the active layer 127a, and the second conductivity type semiconductor layer 129a exposed at the sides of the light emitting cells. The side insulating layer 153 can also cover a part of the upper surface of the light emitting cells LS1 and LS2, as shown in the figure. Further, the side insulating layer 153 may extend over the etch stop layer 131. Openings 131a for exposing the extensions of the electrodes E1 and E2 are formed in the etch stop layer 131 during or after the side insulating layer 153 is formed.

Referring to FIG. 15, wirings 155 for electrically connecting the light emitting cells LS1 and LS2 are formed. The wires 155 are electrically connected to the electrode E2 electrically connected to the first conductivity type semiconductor layer 125a of the light emitting cell LS1 and the second conductivity type semiconductor layer 129a of the light emitting cell LS2 do. That is, one end of the wiring 155 is electrically connected to the first conductivity type semiconductor layer 125a of the light emitting cell LS1 and the other end is electrically connected to the second conductivity type semiconductor layer 129a of the light emitting cell LS2. And is electrically connected to the electrically connected electrode E2.

Pads (not shown) are formed on the first conductivity type semiconductor layers 125a and / or the electrodes E1 and E2 to improve the adhesion or ohmic contact characteristics of the wirings before forming the wirings 155. [ Lt; / RTI >

On the other hand, a rough surface R may be formed on the first conductivity type semiconductor layers 125a on the light emitting cells by PEC (photoelectrochemical) etching or the like. The roughened surface R may be performed before forming the wirings. Thus, the light emitting element of Fig. 5 is completed.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. . Such variations and modifications are intended to be within the scope of the invention as defined in the following claims.

1 to 4 are cross-sectional views illustrating a method of manufacturing a light emitting device having a plurality of light emitting cells according to a related art.

5 is a cross-sectional view illustrating a light emitting device having a plurality of light emitting cells according to an embodiment of the present invention.

6 to 15 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.

Claims (14)

A support substrate; A plurality of light emitting cells disposed on the support substrate and spaced apart from each other, the light emitting cells including an upper semiconductor layer of a first conductive type, an active layer, and a lower semiconductor layer of a second conductive type; And electrodes extending between the supporting substrate and the light emitting cells, the electrodes being electrically connected to the corresponding lower semiconductor layers of the second conductive type and extending to neighboring light emitting cells, ; An interlayer insulating layer interposed between the supporting substrate and the electrodes, the interlayer insulating layer having a relatively large thermal conductivity as compared with the silver paste; A bonding metal interposed between the supporting substrate and the interlayer insulating layer; And And an etch stop layer located between the light emitting cells and between the electrodes and positioned lower than the lower surface of the light emitting cell, Wherein the etch stop layer extends at least partially below edges of neighboring light emitting cells and at least a portion of an extension of the electrodes is below the etch stop layer, Wherein the etch stop layer has a plurality of light emitting cells each having an opening exposing an extension of the electrode. The method according to claim 1, Wherein the interlayer insulating layer has a plurality of light emitting cells including at least one selected from the group consisting of a silicon oxide film, a silicon nitride film, an aluminum nitride film, and a polymer epoxy. The method according to claim 1, Wherein the electrodes have a plurality of light emitting cells each including a reflective structure and a protective metal layer. The method of claim 3, Wherein the reflective structure is defined in a lower region of the lower semiconductor layer, and the protective metal layer has a plurality of light emitting cells covering side and lower surfaces of the reflective structure. The method of claim 3, Wherein the reflective structure has a plurality of light emitting cells including at least one material layer selected from the group consisting of Ag, Al, Rh, Pt, and alloys thereof. The method of claim 3, Wherein the reflective structure has a plurality of light emitting cells that are distributed Bragg reflection (DBR) structures. The method according to claim 1, A side insulating layer covering a side surface of the light emitting cells; And And the other end of the wiring is electrically connected to the upper semiconductor layer of one light emitting cell and the other end of the wiring is electrically connected to the opening of the etch stop layer And a plurality of light emitting cells including wires electrically connected to an electrode electrically connected to a lower semiconductor layer of a neighboring light emitting cell. Forming a first conductive semiconductor layer, a second conductive semiconductor layer, and compound semiconductor layers including an active layer interposed between the first and second conductive semiconductor layers on the sacrificial substrate, A layer is disposed close to the sacrificial substrate, Forming electrodes on the compound semiconductor layers, wherein the electrodes are spaced apart from each other, An interlayer insulating layer having a relatively high thermal conductivity relative to silver paste is formed on the electrodes, Bonding a supporting substrate on the interlayer insulating layer, Removing the sacrificial substrate to expose the first conductivity type semiconductor layer, And patterning the compound semiconductor layers to form a plurality of light emitting cells spaced from each other, Further comprising forming an anti-etching layer on the compound semiconductor layers before patterning the compound semiconductor layers, wherein the anti-etching layer has openings for exposing the second conductivity type semiconductor layer, Each of the electrodes including an extension extending to a side of the adjacent light emitting cell, Wherein the etch stop layer extends at least partially over edges of neighboring light emitting cells and at least a portion of an extension of each of the electrodes is located on the etch stop layer, Wherein the etch stop layer has a plurality of light emitting cells having openings for exposing the extended portions of the electrodes. The method of claim 8, Wherein the interlayer insulating layer has a plurality of light emitting cells formed of a silicon oxide film, a silicon nitride film, an aluminum nitride film, or a polymer epoxy. The method of claim 8, Wherein the electrodes have a plurality of light emitting cells including a reflective structure and a protective metal layer. The method of claim 8, Forming the electrodes forms spaced-apart reflective structures, And forming a protective metal layer covering the reflective structures. The method of claim 11, Wherein the reflective structures have a plurality of light emitting cells formed in openings of the etch stop layer. The method of claim 11, A side insulating layer covering the light emitting cells and exposing at least a part of the upper surface of the first conductive semiconductor layer is formed, and the etch stop layer is patterned to form a plurality of light emitting cells, Forming exposed openings, And forming wiring lines connecting the first conductive semiconductor layer and the exposed electrodes. The method of claim 8, And forming a rough surface on the exposed first conductivity type semiconductor layer.
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KR101707118B1 (en) * 2010-10-19 2017-02-15 엘지이노텍 주식회사 Light emitting diode and method for fabricating the light emitting device
KR101240277B1 (en) * 2011-06-08 2013-03-11 영남대학교 산학협력단 Nitride-based thermoelectric semiconductor integrated light emitting diode and method of manufacturing thereof
KR101956016B1 (en) * 2011-11-04 2019-03-11 엘지이노텍 주식회사 Light emitting device, light emitting device package, and light unit
KR101956033B1 (en) * 2011-12-13 2019-03-11 엘지이노텍 주식회사 Light emitting device, light emitting device package, and light unit
KR101956043B1 (en) * 2012-01-02 2019-03-11 엘지이노텍 주식회사 Light emitting device, light emitting device package, and light unit
US9171826B2 (en) 2012-09-04 2015-10-27 Micron Technology, Inc. High voltage solid-state transducers and solid-state transducer arrays having electrical cross-connections and associated systems and methods
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KR102237152B1 (en) * 2015-02-23 2021-04-07 엘지이노텍 주식회사 Light emitting diode and lighting unit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008021785A (en) 2006-07-12 2008-01-31 Hitachi Cable Ltd Light emitting diode, epitaxial wafer therefor, and its manufacturing method
KR100856230B1 (en) 2007-03-21 2008-09-03 삼성전기주식회사 Light emitting device, method of manufacturing the same and monolithic light emitting diode array
JP2008545267A (en) 2005-06-29 2008-12-11 ソウル オプト デバイス カンパニー リミテッド Light emitting diode and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008545267A (en) 2005-06-29 2008-12-11 ソウル オプト デバイス カンパニー リミテッド Light emitting diode and manufacturing method thereof
JP2008021785A (en) 2006-07-12 2008-01-31 Hitachi Cable Ltd Light emitting diode, epitaxial wafer therefor, and its manufacturing method
KR100856230B1 (en) 2007-03-21 2008-09-03 삼성전기주식회사 Light emitting device, method of manufacturing the same and monolithic light emitting diode array

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