KR20110072434A - Method for fabricating liquid crystal display device - Google Patents

Abstract

PURPOSE: A method for fabricating a liquid crystal display device is provided to improve the opening ratio by forming the width of a common electrode narrower than the physical resolution of exposure equipment. CONSTITUTION: After forming a gate insulation film(102) and a semiconductor layer on a substrate(100) in which a pixel electrode(109) is formed, a channel layer(114) is formed on the upper part of a gate line(101) and a first sacrificial layer is formed on the upper part of the pixel electrode. Source/drain electrodes are formed on a channel layer area and a second sacrificial layer is formed on the upper part of the first sacrificial layer after forming source/drain metal films on the channel layer and a substrate in which the first sacrificial layer is formed.

Description

Method for fabricating liquid crystal display device

The present invention relates to a method for manufacturing a liquid crystal display device.

Liquid crystal displays have been attracting attention as an alternative means of overcoming the shortcomings of Cathode-Ray Tubes (CRTs) due to their advantages such as miniaturization, light weight, and low power consumption. Currently, almost all information requiring display devices is required. It is being installed in the processing equipment.

Such a liquid crystal display generally applies a voltage to a specific molecular array of a liquid crystal, converts it into a different molecular array, and converts a change in optical properties into a visual change, and is a display device using modulation of light by a liquid crystal cell.

The liquid crystal display device includes a process of manufacturing a panel upper substrate and a lower substrate accompanied with a process of forming a liquid crystal cell forming a pixel unit, forming and rubbing an alignment layer for liquid crystal alignment, and bonding the upper substrate and the lower substrate together. A process and a process of injecting and encapsulating liquid crystal between the bonded upper substrate and the lower substrate are completed through various processes.

In the lower substrate manufacturing process, a plurality of gate wirings and a data wiring are arranged to define a unit pixel region, and in each pixel region, a thin film transistor (TFT) and a pixel electrode, which are switching elements, are formed. do. The thin film transistor is turned on by a driving signal supplied through a gate wiring, and has a switching function of supplying a graphic signal supplied from the data wiring to a pixel electrode. The graphic signal supplied to the pixel electrode generates an electric field for rotating the liquid crystal to modulate external light or internal light to display an image.

The liquid crystal display device as described above represents a twisted nematic (TN) type liquid crystal display device that drives the nematic liquid crystal molecules in a direction perpendicular to the substrate, and the liquid crystal display device has a viewing angle of 90 degrees. The disadvantage is that it is narrow enough.

This is due to the refractive anisotropy of the liquid crystal molecules because the liquid crystal molecules oriented horizontally with the substrate are oriented almost perpendicular to the substrate when a voltage is applied to the liquid crystal display panel.

Accordingly, an in-plane switching (IPS) type liquid crystal display device having a liquid crystal molecule driven in a horizontal direction with respect to a substrate to improve the viewing angle to 170 degrees or more has been developed.

The transverse electric field type liquid crystal display device has a structure in which a pixel electrode and a common electrode are disposed on a lower substrate of the liquid crystal display device. In particular, the transverse electric field type liquid crystal display device has a disadvantage in that the aperture ratio is low because any one of the pixel electrode and the common electrode is used as the opaque metal.

In addition, the transverse electric field type liquid crystal display device forms a shield pattern formed of the same material as the common electrode with a passivation layer interposed therebetween. However, the distance between the shield pattern and the data wiring is so close that the parasitic capacitance is increased, resulting in cross talk failure.

In addition, in order to improve the aperture ratio of the transverse electric field type liquid crystal display device, a technology of forming a thin film transistor is developed. However, the channel layer of the thin film transistor is narrowed, which causes a problem in that device characteristics are inferior.

The present invention provides a method of manufacturing a liquid crystal display device having an improved aperture ratio by forming a width of a common electrode formed in a pixel area narrower than a physical resolution of an exposure apparatus.

In particular, the present invention provides a method for manufacturing a liquid crystal display device which improves crosstalk defects generated along the data line by reducing the parasitic capacitance by increasing the distance between the data line of the liquid crystal display and the shield pattern formed on the upper portion. have.

According to a method of manufacturing a liquid crystal display device according to a first exemplary embodiment of the present invention, a metal film is formed on a substrate and a mask process is performed to fabricate a gate wiring, a data wiring, a gate pad, and a data pad. Forming; Forming a transparent conductive material on the substrate on which the gate wiring is formed, and then forming a pixel electrode in the pixel region by performing a mask process; Forming a gate insulating film and a semiconductor layer on the substrate on which the pixel electrode is formed, and then forming a first sacrificial layer on the channel layer and the pixel electrode by performing a mask process; After forming a source / drain metal layer on the substrate on which the channel layer and the first sacrificial layer are formed, a mask process is performed to form a second sacrificial layer on the source / drain electrode and the first sacrificial layer in the channel layer forming region. Making; Forming a protective film on the substrate on which the source / drain electrodes are formed and performing a mask process to expose the stacked first and second sacrificial layers; Forming a transparent conductive material on the substrate on which the passivation layer is formed, and then performing a mask process to form an electrode pattern overlapping a portion of the first and second sacrificial layers, the other being formed on the gate insulating layer; And removing the electrode patterns overlapping the first and second sacrificial layers and the first and second sacrificial layers by performing a lift-off process on the substrate on which the electrode patterns are formed. Forming a step.

In addition, in the liquid crystal display device manufacturing method according to the second embodiment of the present invention, a transparent conductive material and a metal film are sequentially formed on a substrate, and then a mask process is performed to perform gate wiring, data wiring, gate pad, data pad, and the like. Forming a pixel electrode; Forming a gate insulating film and a semiconductor layer on the substrate on which the pixel electrode is formed, and then forming a first sacrificial layer on the channel layer and the pixel electrode by performing a mask process; After forming a source / drain metal layer on the substrate on which the channel layer and the first sacrificial layer are formed, a mask process is performed to form a second sacrificial layer on the source / drain electrode and the first sacrificial layer in the channel layer forming region. Making; Forming a protective film on the substrate on which the source / drain electrodes are formed and performing a mask process to expose the stacked first and second sacrificial layers; Forming a transparent conductive material on the substrate on which the passivation layer is formed, and then performing a mask process to form an electrode pattern overlapping a portion of the first and second sacrificial layers, the other being formed on the gate insulating layer; And removing the electrode patterns overlapping the first and second sacrificial layers and the first and second sacrificial layers by performing a lift-off process on the substrate on which the electrode patterns are formed. Forming a step.

The method of manufacturing the liquid crystal display device of the present invention has an effect of improving the pixel aperture ratio by forming the electrode width formed in the pixel region to be narrower than the width that can be formed by the exposure equipment.

In addition, the manufacturing method of the liquid crystal display device of the present invention has the effect of implementing a high opening ratio and a high transmittance liquid crystal display device by forming the electrode width formed in the pixel region in a fine pattern without the addition of equipment.

In addition, the manufacturing method of the liquid crystal display device of the present invention has the effect of eliminating the parasitic capacitance generated in the data wiring to eliminate the crosstalk failure generated along the data wiring.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

Referring to FIG. 1, a pixel region is defined by intersecting a gate line 101 and a data line 103, and a thin film transistor (hereinafter referred to as a TFT), which is a switching element, is disposed in the cross region. It is.

The pixel electrode 109 formed of the transparent conductive materials ITO, ITZO, and IZO is formed in the pixel region. The pixel electrode 109 may be formed in a plate structure disposed in the entire region of the pixel region.

A plurality of common electrodes 120 branched from a common wiring (not shown) are disposed on the pixel electrode 109. The common electrode 120 is formed in a slit shape having a width of 2 μm or less. In the present invention, the width of the common electrode 120 may be formed to be 0.5 μm to 1 μm by applying a lift-off process, thereby improving the aperture ratio.

The distance between the common electrodes 120 has 8 to 9.5 μm.

In addition, the distance between the common electrode 120 and the pixel electrode 109 is formed to be close to improve transmittance.

The common electrode 120 may be formed of a transparent conductive material or an opaque metal.

In addition, a shield pattern 121 branched from the common line is formed on the data line 103. The shield pattern 121 is formed to overlap the data line 103. The common wiring (not shown), the common electrode 120 and the shield pattern 121 are integrally formed.

The data wiring 103 in the present invention is formed on the same layer as the gate wiring 101. Therefore, in the region where the gate wiring 101 and the data wiring 103 cross each other, the data wiring 103 is connected through the source electrode of the TFT, the first contact portion C1, and the second contact portion C2. .

In addition, the drain electrode and the pixel electrode 109 of the TFT are connected through the third contact portion C3.

2A to 2G illustrate a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

2A to 2G, a metal film is formed on the transparent insulating substrate 100, and then a mask process is performed to form the gate wiring 101, the data wiring 103, the gate pad 110, and the data pad 103a. ).

In the present invention, since the TFT is formed on the gate wiring 101, the gate wiring 101 serves as a gate electrode of the TFT. The metal film may use any one of Cu, Al, Mo, Cr, or an alloy thereof. In addition, the metal film may be formed by stacking at least two or more of Cu, Al, Mo, and Cr.

When the gate wiring 10 or the like is formed on the insulating substrate 101 as described above, the transparent conductive material is formed, and then the pixel electrode 109 is formed in the pixel region by performing a mask process. The transparent conductive material uses one of ITO, ITZO, and IZO.

Thereafter, the gate insulating layer 102 and the semiconductor layer are formed on the insulating substrate 100. The semiconductor layer includes an amorphous silicon film and a doped (n + or p +) amorphous silicon film.

When the gate insulating layer 102 and the semiconductor layer are formed as described above, the channel layer 114 is formed on the gate wiring 101 on which the TFT is to be formed by using a diffraction mask or a halftone mask, and the semiconductor is formed in the pixel region. The first sacrificial layer 111 formed of a layer is formed.

In this case, a portion of the data line 103, the pixel electrode 109, the gate pad 110, and the data pad 103a are exposed.

As described above, when the channel layer 114 and the first sacrificial layer 111 are formed on the insulating substrate 100, as shown in FIG. 2D, a source / drain metal film is formed on the insulating substrate 100. .

The mask process is performed on the insulating substrate 100 on which the source / drain metal layer is formed, and thus the source / drain electrodes 117a and 117b, the gate pad connection part 135, the data pad connection part 125, and the second sacrificial layer 112 are formed. To form.

The second sacrificial layer 112 is formed on the first sacrificial layer 111 formed in the pixel area.

As described above, when the source / drain electrodes 117a and 117b and the second sacrificial layer 112 are formed, as shown in FIG. 2E, the passivation layer 119 is formed on the entire region of the insulating substrate 100.

When the passivation layer 119 is formed on the insulating substrate 100, a contact hole forming process for exposing the gate pad connector 135 and the data pad connector 125 to the outside is performed.

In this case, the passivation layer 119 formed in the pixel area is removed to expose the first and second sacrificial layers 111 and 112 to the outside.

As shown in FIG. 2F, a transparent conductive material is formed on the passivation layer 119 on which the contact hole process is completed, and a mask process is performed to form electrode patterns on both edges of the first and second sacrificial layers 111 and 112. 118). The gate pad electrode 140 and the data pad electrode 130 are formed on the gate pad connector 135 and the data pad connector 125.

In addition, a shield pattern 121 is formed on the passivation layer 119 on the data line 103.

The electrode pattern 118 is partially formed to overlap the first and second sacrificial layers 111 and 112, and the other part is formed on the exposed gate insulating layer 102. In the drawing, the electrode patterns 118 are formed on both sides of the stacked first and second sacrificial layers 111 and 112, respectively, but may be formed only in one region.

As described above, when the electrode pattern 118 is formed, as shown in FIG. 2G, the first and second sacrificial layers 111 and 112 and the first and second sacrificial layers 111 and 111 are performed by performing a lift-off process. A part of the electrode pattern 118 overlapping with the 112 is removed to form the common electrode 120.

A detailed method of forming the common electrode 120 by the lift-off process will be described with reference to FIGS. 4A to 4C.

In the present invention, the common electrode 120 is formed to have a narrower width than the electrode width that can be formed by the exposure equipment, thereby increasing the distance between the common electrodes 120.

For example, if the pattern width which can be formed by exposure apparatus is 3 micrometers, the width of the electrode pattern 118 formed on the 1st, 2nd sacrificial layers 111 and 112 will be 3 micrometers. Since the electrode patterns 118 overlapping the first and second sacrificial layers 111 and 112 of the electrode patterns 118 are removed by the lift-off process, the common electrode 120 having an electrode width of 1 μm or less is removed. Can be formed.

In the present invention, the pixel electrode 109 and the common electrode 120 are disposed with the gate insulating layer 102 interposed therebetween. As a result, the vertical distance between the pixel electrode 109 and the common electrode 120 is narrowed, thereby improving transmittance.

In the present invention, the data wiring 103 is formed on the insulating substrate 100 in the same manner as the gate wiring 101. For this reason, the gate insulating film 102 and the protective film 119 are disposed between the data wiring 103 and the shield pattern 121, and the vertical distance between the data wiring 103 and the shield pattern 121 is longer than before. Is formed. This reduces the parasitic capacitance generated between the data line 103 and the shield pattern 121 serves to remove cross talk.

As described above, in the present invention, the electrode width can be formed to 2 μm or 1 μm or less without additional exposure equipment, and thus a high opening ratio and a high transmittance liquid crystal display device can be manufactured.

3A to 3F illustrate a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

3A to 3F are similar to the process of FIGS. 2A to 2G, but differ in the first mask process of simultaneously forming the gate wiring and the pixel electrode. Hereinafter, the distinct parts will be described in detail, and the parts described with reference to FIGS. 2A to 2G will be schematically described.

3A through 3F, a transparent conductive material and a metal film are sequentially formed on the transparent insulating substrate 100, and then a mask process is performed to form the gate wiring 201, the data wiring 203, and the gate pad 210. ), The data pad 203a and the pixel electrode 109 are formed.

In the mask process, a diffraction mask or a halftone mask is used.

The transparent conductive material uses any one of ITO, ITZO, and IZO, and the metal film uses any one of Cu, Al, Mo, Cr, or an alloy thereof. In addition, the metal film may be formed by stacking at least two or more of Cu, Al, Mo, and Cr.

Accordingly, the gate wiring 201, the data wiring 203, the gate pad 210, and the data pad 203a each include a transparent conductive material layer formed under the gate wiring 201. That is, the gate wiring 201, the data wiring 203, the gate pad 210, and the data pad 203a have a multilayer structure including a transparent conductive material layer.

When the pixel electrode 109 is first etched using a diffraction mask or a halftone mask, the pixel electrode 109 etches the gate wiring 201, the data wiring 203, the gate pad 210, and the data pad 203a. The pixel region from which the halftone photoresist film is removed by an ashing process is formed by secondary etching. That is, the pixel electrode 109 is formed by a method of removing a metal layer stacked thereon while leaving only a transparent conductive material layer.

3B, the channel layer 114 is formed on the insulating substrate 100 and on the gate wiring 201 where the TFT is to be formed. In this case, a first sacrificial layer 111 made of a semiconductor layer is formed in the pixel region.

As shown in FIG. 3C, a source / drain metal layer is formed on the insulating substrate 100 and etched to form source / drain electrodes 117a and 117b, a gate pad connection part 135, a data pad connection part 125, and a second electrode. 2 sacrificial layer 112 is formed. The second sacrificial layer 112 is formed on the first sacrificial layer 111 formed in the pixel area.

As shown in FIG. 3D, the passivation layer 119 is formed over the entire area of the insulating substrate 100, and the contact hole forming process for exposing the gate pad connection part 135 and the data pad connection part 125 to the outside is performed. do. In this case, the passivation layer 119 formed in the pixel area is removed to expose the outside of the first sacrificial layer 111 and the second sacrificial layer 112.

As shown in FIG. 3E, a transparent conductive material is formed on the passivation layer 119 on which the contact hole process is completed, and a mask process is performed to form electrode patterns on both edges of the first and second sacrificial layers 111 and 112. 118). The gate pad electrode 140 and the data pad electrode 130 are formed on the gate pad connector 135 and the data pad connector 125. In addition, a shield pattern 121 is formed on the passivation layer 119 on the data line 203.

The electrode pattern 118 is partially formed to overlap the first and second sacrificial layers 111 and 112, and the other part is formed on the exposed gate insulating layer 102. In the drawing, the electrode patterns 118 are formed on both sides of the stacked first and second sacrificial layers 111 and 112, respectively, but may be formed only in one region.

As described above, when the electrode pattern 118 is formed, as shown in FIG. 3F, the first and second sacrificial layers 111 and 112 and the first and second sacrificial layers 111 and 111 are performed by performing a lift-off process. A part of the electrode pattern 118 overlapping with the 112 is removed to form the common electrode 120.

The structure and effect of the second embodiment of the present invention are the same as the structure and effect of the first embodiment.

4A to 4C are for explaining the lift off process used in the present invention.

4A to 4C, any one of a metal film, a semiconductor layer, and an insulating layer is formed on the substrate 300 and patterned to form a first sacrificial layer 310. One of a metal film, a semiconductor layer, and an insulating layer is formed on the first sacrificial layer 310 and patterned to form a second sacrificial layer 320.

Then, a transparent conductive material or a metal film is formed on the substrate 300, and then patterned to partially overlap one or both edges of the first and second sacrificial layers 310 and 320, and the rest on the substrate 300. An electrode pattern 330 is formed to be formed on the electrode pattern 330.

Then, when the first and second sacrificial layers 310 and 320 are sequentially removed by the lift-off process, the electrode patterns 330 overlapping the first and second sacrificial layers 310 and 320 are removed together to form a substrate. Only the electrode pattern formed on the 300 remains to form the electrode.

1 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

2A to 2G illustrate a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

3A to 3F illustrate a manufacturing process of a liquid crystal display according to a first embodiment of the present invention.

4A to 4C are for explaining the lift off process used in the present invention.

 (Explanation of reference numerals for the main parts of the drawings)

100: substrate 101: gate wiring

102 gate insulating film 114 channel layer

111: first sacrificial layer 103: data wiring

109: pixel electrode 112: second sacrificial layer

Claims (9)

Forming a metal film on the substrate, and then performing a mask process to form a gate wiring, a data wiring, a gate pad, and a data pad; Forming a transparent conductive material on the substrate on which the gate wiring is formed, and then forming a pixel electrode in the pixel region by performing a mask process; Forming a gate insulating film and a semiconductor layer on the substrate on which the pixel electrode is formed, and then forming a first sacrificial layer on the channel layer and the pixel electrode by performing a mask process; After forming a source / drain metal layer on the substrate on which the channel layer and the first sacrificial layer are formed, a mask process is performed to form a second sacrificial layer on the source / drain electrode and the first sacrificial layer in the channel layer forming region. Making; Forming a protective film on the substrate on which the source / drain electrodes are formed and performing a mask process to expose the stacked first and second sacrificial layers; Forming a transparent conductive material on the substrate on which the passivation layer is formed, and then performing a mask process to form an electrode pattern overlapping a portion of the first and second sacrificial layers, the other being formed on the gate insulating layer; And  The lift-off process is performed on the substrate on which the electrode pattern is formed to remove the electrode patterns overlapping the first and second sacrificial layers and the first and second sacrificial layers, thereby forming a common electrode on the gate insulating layer on the pixel electrode. Liquid crystal display device manufacturing method comprising the step of forming. The method of claim 1, wherein the forming of the electrode pattern comprises: And forming a shield pattern on the passivation layer so as to overlap the data line. The method of claim 1, wherein the common electrode in the pixel area formed by the lift-off process is smaller than a width of the electrode pattern. The method of claim 1, wherein the metal film is made of Cu, Al, Mo, Cr, or an alloy thereof. The method of claim 4, wherein the metal layer is formed by stacking at least two of Cu, Al, Mo, and Cr. The method of claim 1, wherein the common electrode has a width of 0.5 μm to 1 μm. The method of claim 1, wherein a distance between the common electrodes is about 8 μm to about 9.5 μm. Sequentially forming a transparent conductive material and a metal film on the substrate, and then performing a mask process to form a gate wiring, a data wiring, a gate pad, a data pad, and a pixel electrode; Forming a gate insulating film and a semiconductor layer on the substrate on which the pixel electrode is formed, and then forming a first sacrificial layer on the channel layer and the pixel electrode by performing a mask process; After forming a source / drain metal layer on the substrate on which the channel layer and the first sacrificial layer are formed, a mask process is performed to form a second sacrificial layer on the source / drain electrode and the first sacrificial layer in the channel layer forming region. Making; Forming a protective film on the substrate on which the source / drain electrodes are formed and performing a mask process to expose the stacked first and second sacrificial layers; Forming a transparent conductive material on the substrate on which the passivation layer is formed, and then performing a mask process to form an electrode pattern overlapping a portion of the first and second sacrificial layers, the other being formed on the gate insulating layer; And  The lift-off process is performed on the substrate on which the electrode pattern is formed to remove the electrode patterns overlapping the first and second sacrificial layers and the first and second sacrificial layers, thereby forming a common electrode on the gate insulating layer on the pixel electrode. Forming a liquid crystal display device comprising the step of forming. The method of manufacturing a liquid crystal display device according to claim 8, wherein a diffraction mask or a halftone mask is used in a mask process for forming the gate wirings.

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