KR20100021891A - Semiconductor chip package and manufacturing method thereof - Google Patents

Semiconductor chip package and manufacturing method thereof Download PDF

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Publication number
KR20100021891A
KR20100021891A KR1020080080550A KR20080080550A KR20100021891A KR 20100021891 A KR20100021891 A KR 20100021891A KR 1020080080550 A KR1020080080550 A KR 1020080080550A KR 20080080550 A KR20080080550 A KR 20080080550A KR 20100021891 A KR20100021891 A KR 20100021891A
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KR
South Korea
Prior art keywords
light emitting
cap structure
semiconductor light
chip package
semiconductor chip
Prior art date
Application number
KR1020080080550A
Other languages
Korean (ko)
Inventor
황석민
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020080080550A priority Critical patent/KR20100021891A/en
Publication of KR20100021891A publication Critical patent/KR20100021891A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92222—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92225—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

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  • Led Device Packages (AREA)

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip package and a method of manufacturing the same. The chip package can be implemented, and the shake of the color coordinate can be easily improved by forming the cap structure by adjusting the compounding ratio of the phosphors.

Description

Semiconductor chip package and manufacturing method therefor {SEMICONDUCTOR CHIP PACKAGE AND MANUFACTURING METHOD THEREOF}

The present invention relates to a semiconductor chip package and a method of manufacturing the same, and in particular, the present invention is capable of implementing a compact package while ensuring airtightness by packaging a semiconductor light emitting chip using a cap structure including a phosphor. A semiconductor chip package and a method of manufacturing the same.

Recently, an issue in the field of lighting modules (LM) relates to phosphor application for compact package implementation. Conventional phosphor coating methods include a dispensing method, a conformal coating method, a method of forming a phosphor film on a chip upper surface, and the like.

1 is a vertical cross-sectional view showing the structure of a semiconductor chip package coated with a phosphor by a general dispensing method.

As shown in FIG. 1, the semiconductor chip package is formed by flip bonding the patterned electrode pads 120a, 120b and 120c on the substrate 100 and the electrode pads 120a, 120b and 120c on the substrate 100. The semiconductor chip 110a, the passive element 110b, and the barrier ribs 140a, 140b, and 140c formed to mold the flip-bonded semiconductor chip 110 are formed, and between the barrier ribs (140a) with the resin material 130 (140a). , 140b) and (140b, 140c)) are molded. Thereafter, dicing is separated into individual package units.

In the case of using such a dispensing method, barrier ribs must be formed so that the resin material injected from the dispenser (not shown) does not overflow to the outside of the substrate, and space and height for forming such barrier ribs are required, thus limiting the formation of a compact package structure. There is. In addition, when molding the phosphor by the dispensing method, there is a problem that the color mixing is not good because the phosphor is unevenly distributed.

2 is a vertical cross-sectional view showing the structure of a semiconductor chip package coated with a phosphor by a method of forming a general phosphor film on an upper surface of a semiconductor chip.

As shown in FIG. 2, the semiconductor chip package is a semiconductor chip mounted by flip bonding on patterned electrode pads 220a, 220b and 220c and electrode pads 220a, 220b and 220c on the substrate 200. And a phosphor film 230 formed on the semiconductor chip 210a, the passive element 210b, and the electrode pads 220a, 220b, and 220c that are flip-bonded. Thereafter, dicing is separated into individual package units.

When the phosphor film is used, the phosphor film may be easily coated on the upper surface of the semiconductor chip 210a, but it is not easy to apply the phosphor film to the side surface of the semiconductor chip 210a.

In addition, in the case of a chip that does not have a sapphire that is structurally different from a thin film flip chip (TFFC), the coating on the upper surface of the chip is easy using the conformal coating method, but the coating on the side of the chip is not easy. There is this.

Therefore, the present invention has been proposed to solve the conventional problems as described above, and its object is to provide a compact package while simultaneously coating the phosphor on both the top and side surfaces of the semiconductor light emitting chip mounted on the substrate. SUMMARY A semiconductor chip package and a method of manufacturing the same are provided.

In order to achieve the above technical problem, a semiconductor chip package according to an embodiment of the present invention, a substrate having an electrode pad formed on the upper surface; A semiconductor light emitting chip and a passive element flip-bonded on an upper surface of the electrode pad, respectively; And a cap structure mounted on the substrate to surround the semiconductor light emitting chip and including a phosphor.

Preferably, the semiconductor chip package further includes a protection part coated with a coating material on the region in order to protect a region other than the semiconductor light emitting chip on which the cap structure is mounted.

Preferably, the cap structure is made of a resin containing phosphor, and the cap structure is mounted on the substrate by an adhesive. The adhesive may fill an internal space between the cap structure and the semiconductor light emitting chip, and the adhesive may be a transparent silicone resin or a transparent epoxy resin. In addition, the adhesive may further include a phosphor. The coating material may be a transparent silicone resin or a transparent epoxy resin.

On the other hand, the semiconductor chip package manufacturing method according to another embodiment of the present invention, comprising the steps of: preparing a substrate on which the electrode pad is formed; Flip bonding a semiconductor light emitting chip and a passive element on the electrode pad; And mounting a cap structure including phosphor on the substrate to surround the semiconductor light emitting chip.

Preferably, the method for manufacturing a semiconductor chip package further comprises the step of forming a protective part by applying a coating material to a region other than the semiconductor light emitting chip on which the cap structure is mounted, and the mounting of the cap structure may include: The flip bonded semiconductor light emitting chip and the cap structure are bonded to each other.

Preferably, the cap structure is a structure that is injection-molded with a mixture of phosphors, the adhesive may be a transparent silicone resin or a transparent epoxy resin. In addition, the adhesive may be further mixed with a phosphor.

Preferably, the adhesive fills an internal space between the cap structure and the semiconductor light emitting chip, and the coating material may be a transparent silicone resin or a transparent epoxy resin.

According to the present invention as described above, it is possible to implement a compact semiconductor chip package while ensuring the airtightness of the package by mounting the cap structure including the phosphor on the semiconductor light emitting chip to surround the upper surface and the side of the semiconductor light emitting chip for generating light In addition, by adjusting the compounding ratio of the phosphors to form the cap structure, it is possible to easily improve the shake of the color coordinates.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity.

3 is a vertical cross-sectional view of a semiconductor chip package according to an embodiment of the present invention.

As shown in FIG. 3, the semiconductor chip package according to the present invention may be flip-bonded to the upper surface of the substrate 300 and the electrode pads 320a, 320b and 320c having the electrode pads 320a, 320b and 320c formed thereon. A cap structure 330 mounted on the substrate 300 to surround the semiconductor light emitting chip 310a, the passive element 310b, and the semiconductor light emitting chip 310a, and the semiconductor light emitting chip 310a having the cap structure 330 mounted thereon. The protection member 350 protects the circuit patterns such as the electrode pads 320a, 320b, and 320c formed on the passive element 310b and the substrate 300 by a coating material applied to a region except for the above. Here, the cap structure 330 mounted on the substrate 300 is mounted by the adhesive 340 which is doped on the upper surface of the semiconductor light emitting chip 310a.

The substrate 300 is a flat conductive substrate, and the electrode pads 320a, 320b, and 320c may be formed on the substrate 300 by a method such as pattern printing. The cap structure 330 is a structure that is injection molded into a resin material, and the resin material includes a phosphor for converting light generated from the semiconductor light emitting chip 310a.

The adhesive 340 is a transparent silicone resin or a transparent epoxy resin, and phosphors may be further mixed. In the process of mounting the cap structure 330 on the semiconductor light emitting chip 310a, the adhesive 340 fills an internal space between the cap structure 330 and the semiconductor light emitting chip 310a. Thus, not only the top surface of the semiconductor light emitting chip 310 but also the side surface of the semiconductor light emitting chip 310a may be coated by the adhesive 340. The protection unit 350 may be a transparent silicone resin or a transparent epoxy resin as a coating material.

4A to 4E are cross-sectional views illustrating a process of manufacturing a semiconductor chip package according to an exemplary embodiment of the present invention illustrated in FIG. 3.

First, as shown in FIG. 4A, the method of manufacturing a semiconductor chip package according to the present disclosure begins with preparing a substrate 400 on which electrode pads 420a, 420b, and 420c are formed. The substrate 400 is a flat conductive substrate and is used as a substrate for flip bonding the semiconductor light emitting chips 410a in the form of individual chips. The electrode pads 420a, 420b, and 420c are formed on the upper surface of the substrate 400 by a method such as pattern printing. The electrode pads 420a, 420b, and 420c are formed to be directly connected to the substrate 400.

Next, the semiconductor light emitting chip and the passive element are flip-bonded on the electrode pads 420a, 420b, and 420c. As shown in FIG. 4B, the semiconductor light emitting chip 410a and the passive element 410b are flip-bonded in separate regions on the electrode pads 420a, 420b, and 420c formed on the upper surface of the substrate 400. .

Subsequently, a process of applying the adhesive 440 to the upper surface of the semiconductor light emitting chip 410a is performed. As shown in FIG. 4C, an adhesive 440 for attaching the cap structure 430 to the top surface of the flip-bonded semiconductor light emitting chip 410 is applied by a method such as dotting. The adhesive 440 is a transparent silicone resin or a transparent epoxy resin, and phosphors may be further mixed.

Subsequently, a process of mounting the cap structure 430 on the substrate 400 is performed. As shown in FIG. 4D, the cap structure 430 is bonded to the semiconductor light emitting chip 410a to surround the semiconductor light emitting chip 410a by the adhesive 440 applied by dotting, so that the substrate 400 is formed. Is mounted on.

The cap structure 430 is an injection molded structure of a resin material, and the resin material may further include a phosphor for converting light generated from the semiconductor light emitting chip 410a. The adhesive 440 flows down the side surface of the semiconductor light emitting chip 410a in the process of mounting the cap structure 430 on the substrate 400 to surround the semiconductor light emitting chip 410a. To fill the sides and bottom surface. That is, the internal space between the semiconductor light emitting chip 410a and the cap structure 430 is filled by the adhesive 440. As such, the cap structure 430 is mounted to surround the semiconductor light emitting chip 410a, so that the phosphor is uniformly coated on both the top and side surfaces of the semiconductor light emitting chip 410a.

Subsequently, a process of applying a coating material to a region other than the semiconductor light emitting chip 410a to which the cap structure 430 is bonded is performed. As shown in FIG. 4E, electrode pads 420a and 420b formed in a region other than the semiconductor light emitting chip 410a on which the cap structure 430 is mounted, that is, the passive element 410b and the substrate 400. A coating material is applied to form a protection part 450 for protecting circuit patterns such as 420c. The coating material of the protective part 450 may be a transparent silicone resin or a transparent epoxy resin.

5A to 5C are cross-sectional views illustrating a process of injection molding a cap structure used in a semiconductor chip package according to an exemplary embodiment of the present invention illustrated in FIG. 3.

As shown in Figure 5 (a), the resin is filled in the upper and lower molds 510, 500 for forming the cap structure. The resin may be a transparent silicone resin or a transparent epoxy resin, and may further include a phosphor. Then, as shown in (b) of Figure 5, after removing the lower mold 500, the injection molding 520 is diced and separated. Thus, as shown in FIG. 5C, a cap structure for finally mounting on the upper surface of the semiconductor light emitting chip is completed.

The above-described embodiments and the accompanying drawings are merely illustrative of preferred embodiments, and the present invention is intended to be limited by the appended claims. In addition, it will be apparent to those skilled in the art that the present invention may be substituted, modified, and changed in various forms without departing from the technical spirit of the present invention described in the claims.

1 is a vertical cross-sectional view showing the structure of a semiconductor chip package coated with a phosphor by a general dispensing method,

2 is a vertical cross-sectional view showing a structure of a semiconductor chip package coated with a phosphor by a method of forming a general phosphor film on an upper surface of a semiconductor chip,

3 is a vertical cross-sectional view showing the structure of a semiconductor chip package according to an embodiment of the present invention;

4A to 4E are cross-sectional views illustrating a manufacturing process of the semiconductor chip package illustrated in FIG. 3.

5A to 5C are cross-sectional views illustrating a process of injection molding a cap structure used in the semiconductor chip package illustrated in FIG. 3.

Claims (16)

A substrate on which electrode pads are formed; A semiconductor light emitting chip and a passive element flip-bonded on an upper surface of the electrode pad, respectively; And And a cap structure mounted on the substrate to surround the semiconductor light emitting chip and including a phosphor. The method of claim 1, And a protecting part coated with a coating material on the area to protect an area except the semiconductor light emitting chip on which the cap structure is mounted. The method of claim 1, The cap structure is a semiconductor chip package, characterized in that made of a resin containing a phosphor. The method of claim 1, And the cap structure is mounted on the substrate using an adhesive. The method of claim 4, wherein The adhesive is a semiconductor chip package, characterized in that for filling the internal space between the cap structure and the semiconductor light emitting chip. The method of claim 4, wherein The adhesive is a semiconductor chip package, characterized in that the transparent silicone resin or transparent epoxy resin. The method of claim 6, The adhesive is a semiconductor chip package, characterized in that the phosphor is further mixed. The method of claim 1, The coating material is a semiconductor chip package, characterized in that the transparent silicone resin or transparent epoxy resin. Preparing a substrate on which electrode pads are formed; Flip bonding a semiconductor light emitting chip and a passive element on the electrode pad; And And mounting a cap structure including phosphors on the substrate to surround the semiconductor light emitting chip. The method of claim 9, And forming a protective part by applying a coating material to a region other than the semiconductor light emitting chip having the cap structure mounted thereon. The method of claim 9, In the mounting of the cap structure, the flip chip bonded semiconductor light emitting chip and a cap structure are bonded by an adhesive. The method of claim 11, The cap structure is a semiconductor chip package manufacturing method, characterized in that the injection molding of the phosphor mixed resin material. The method of claim 11, The adhesive is a semiconductor chip package manufacturing method, characterized in that the transparent silicone resin or transparent epoxy resin. The method of claim 13, The adhesive is a semiconductor chip package manufacturing method characterized in that the phosphor is further mixed. The method of claim 11, The adhesive is a semiconductor chip package manufacturing method, characterized in that for filling the internal space between the cap structure and the semiconductor light emitting chip. The method of claim 7, wherein The coating material is a semiconductor chip package manufacturing method, characterized in that the transparent silicone resin or transparent epoxy resin.
KR1020080080550A 2008-08-18 2008-08-18 Semiconductor chip package and manufacturing method thereof KR20100021891A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120032780A (en) * 2010-09-29 2012-04-06 서울반도체 주식회사 Phosphor sheet, light-emitting device having the phosphor sheet and method of manufacturing the same
KR101288918B1 (en) * 2011-12-26 2013-07-24 루미마이크로 주식회사 Manufacturing method of light emitting device having wavelenth-converting layer and light emitting device produced by the same
US8785953B2 (en) 2011-03-25 2014-07-22 Samsung Electronics Co., Ltd. Light emitting diode, manufacturing method thereof, light emitting diode module, and manufacturing method thereof
US9236539B2 (en) 2012-12-10 2016-01-12 Samsung Display Co., Ltd. Light emitting diode package and manufacturing method thereof
WO2017065353A1 (en) * 2015-10-14 2017-04-20 (주)라이타이저코리아 Light-emitting device package and method for preparing same
WO2017069339A1 (en) * 2015-10-20 2017-04-27 (주)라이타이저코리아 Light-emitting device package and manufacturing method therefor
CN109791966A (en) * 2017-09-12 2019-05-21 Lg 伊诺特有限公司 Light emitting device package

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120032780A (en) * 2010-09-29 2012-04-06 서울반도체 주식회사 Phosphor sheet, light-emitting device having the phosphor sheet and method of manufacturing the same
US9705050B2 (en) 2010-09-29 2017-07-11 Seoul Semiconductor Co., Ltd. Phosphor sheet, light-emitting device having the phosphor sheet and method of manufacturing the same
US8785953B2 (en) 2011-03-25 2014-07-22 Samsung Electronics Co., Ltd. Light emitting diode, manufacturing method thereof, light emitting diode module, and manufacturing method thereof
US9153759B2 (en) 2011-03-25 2015-10-06 Samsung Electronics Co., Ltd. Light emitting diode, manufacturing method thereof, light emitting diode module, and manufacturing method thereof
EP2503606A3 (en) * 2011-03-25 2015-11-25 Samsung Electronics Co., Ltd. Light Emitting Diode, Manufacturing Method Thereof, Light Emitting Diode Module, and Manufacturing Method Thereof
KR101288918B1 (en) * 2011-12-26 2013-07-24 루미마이크로 주식회사 Manufacturing method of light emitting device having wavelenth-converting layer and light emitting device produced by the same
US9236539B2 (en) 2012-12-10 2016-01-12 Samsung Display Co., Ltd. Light emitting diode package and manufacturing method thereof
WO2017065353A1 (en) * 2015-10-14 2017-04-20 (주)라이타이저코리아 Light-emitting device package and method for preparing same
WO2017069339A1 (en) * 2015-10-20 2017-04-27 (주)라이타이저코리아 Light-emitting device package and manufacturing method therefor
CN109791966A (en) * 2017-09-12 2019-05-21 Lg 伊诺特有限公司 Light emitting device package
CN109791966B (en) * 2017-09-12 2023-08-08 苏州立琻半导体有限公司 Light emitting device package

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