KR20100002998A - Light emitting diode having electrostatic discharge protect device - Google Patents

Abstract

Board; A compound semiconductor layer including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on the substrate; First and second electrodes formed on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively; And a varistor layer interposed between the substrate and the first conductivity-type semiconductor layer.

Description

LIGHT EMITTING DIODE HAVING ELECTROSTATIC DISCHARGE PROTECT DEVICE}

The present invention relates to a light emitting diode equipped with an electrostatic discharge (ESD) protection device and a method of manufacturing the same.

A light emitting diode, which is a typical light emitting device, is a photoelectric conversion semiconductor device having a structure in which an N-type semiconductor and a P-type semiconductor are bonded to each other, and are configured to emit light by recombination of electrons and holes.

As such a light emitting diode, a GaN-based light emitting diode is known. GaN-based light emitting diodes are manufactured by sequentially stacking GaN-based N-type semiconductor layers, active layers (or light-emitting layers), and P-type semiconductor layers on a substrate made of a material such as sapphire or SiC.

Conventional general light emitting diodes do not have a means for protecting the light emitting diodes from overvoltage or ESD flowing from the outside, so that the light emitting diode may be easily damaged by overvoltage or ESD flowing from the outside.

Therefore, to solve the above problems, in order to protect the light emitting diode from overvoltage or ESD flowing from the outside, the ESD resistance of the light emitting diode is enhanced, or ESD protection devices such as zener diodes, chip varistors, and TVS diodes, which are ESD protection elements, are also used together. A configuration for mounting has been proposed.

However, ESD protection devices such as zener diodes, chip varistors, and TVS diodes, which are mounted together with light emitting diodes to protect the ESD, are generally mounted near the light emitting diodes, which causes a problem that the light emitting efficiency of the light emitting diodes is lowered.

Therefore, in recent years, methods for mounting zener diodes on the side of the lead frame away from around the light emitting diode have been devised. However, since zener diodes are mounted on the lead frame, they are subjected to cumbersome and complicated processes such as die attach and wire bonding. In this manufacturing process, defects are likely to occur, and as the processing time becomes longer, it causes problems of deterioration of workability and mass productivity in the manufacturing process of the LED package.

SUMMARY OF THE INVENTION An object of the present invention is to provide a light emitting diode equipped with an electrostatic protection element capable of electrically protecting the light emitting diode against static electricity, surge, and overvoltage, and a method of manufacturing the same.

In addition, there is another problem to make it possible to easily manufacture a light emitting diode equipped with an electrostatic protection element so that workability and mass productivity in the manufacturing process of the light emitting diode are not impaired.

According to an aspect of the present invention for solving this problem, the substrate; A compound semiconductor layer including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer formed on the substrate; First and second electrodes formed on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively; And a varistor layer interposed between the substrate and the first conductivity-type semiconductor layer.

Preferably, the substrate is an insulating substrate, the trench formed to expose the varistor layer in the lower portion of the substrate; The conductive layer may be formed on an outer surface of the trench and a lower surface of the substrate and electrically connect the varistor layer and the substrate.

Preferably, the varistor layer, the first conductive layer formed on the substrate; A ZnO based varistor compound layer formed on the first conductive layer; It may include a second conductive layer formed on the ZnO-based varistor compound layer.

Preferably, the first conductive layer and the second conductive layer may include at least one of TiN, Ti, Ru, Rh, Pd, Pt, and Os.

Preferably, the ZnO based varistor compound layer may include Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO.

Preferably, the ZnO based varistor compound layer may further include at least one of Cr ₂ O ₃ , TiO ₂ , SiO ₂ , and Sb ₂ O ₃ .

Preferably, the light emitting diode may further include a submount mounted with the substrate and electrically connected to the second electrode.

Preferably, the first conductivity type semiconductor layer may include a conductive material layer formed in a portion of an interior thereof to electrically connect the first electrode and the varistor layer.

According to another aspect of the invention, forming a varistor layer on a substrate; Forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on the varistor layer; And forming a first electrode and a second electrode on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively.

Preferably, the forming of the varistor layer comprises: forming a first conductive layer on the substrate; Forming a ZnO based varistor compound layer on the first conductive layer; And forming a second conductive layer on the ZnO based varistor compound layer.

Preferably, the first conductive layer and the second conductive layer may include at least one of TiN, Ti, Ru, Rh, Pd, Pt, and Os.

Preferably, the ZnO based varistor compound layer may include Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO.

Preferably, the ZnO based varistor compound layer may further include at least one of Cr ₂ O ₃ , TiO ₂ , SiO ₂ , and Sb ₂ O ₃ .

Preferably, the light emitting diode manufacturing method may further include forming a conductive material layer on a portion of an inner portion of the first conductive semiconductor layer to electrically connect the first electrode and the varistor layer.

According to an embodiment of the present invention, by forming a varistor layer between the substrate and the compound semiconductor layer, the varistor layer serves as an insulating material at a normal voltage, and the resistance is lowered above a certain voltage to act as a conductor to prevent static electricity and surge and overvoltage. It is possible to provide a light emitting diode that can be electrically protected against.

In addition, before the process of epitaxially growing the compound semiconductor layer on the substrate, the process of forming the varistor layer is carried out, so that the workability and mass production in the manufacturing process of the light emitting diode is provided so that the light emitting diode is provided with an electrostatic protection element. Can provide.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention, and FIG. 2 is a plan view of FIG. 1.

1 and 2, a light emitting diode according to an embodiment of the present invention includes an N-type semiconductor layer 55, an active layer 57, and a P-type semiconductor through a varistor layer 70 on a substrate 51. Compound semiconductor layers comprising layer 59 are located. The substrate 51 includes sapphire (Al ₂ O ₃ ), silicon carbide (SiC), zinc oxide (ZnO), silicon (Si), gallium arsenide (GaAs), gallium phosphorus (GaP), lithium-alumina (LiAl ₂ O _3). ), Boron nitride (BN), aluminum nitride (AlN) or gallium nitride (GaN) substrate, but is not limited thereto. A trench 51a is formed below the substrate 51, and a conductive film layer 51b is formed on the outer surface of the trench 51a and the bottom surface of the substrate. The substrate 51 is electrically connected to the submount substrate 10 through the conductive film layer 51b. The submount substrate 10 may be an insulating substrate on which a conductive substrate or a conductive layer is formed.

Meanwhile, the compound semiconductor layers are III-N series compound semiconductor layers. For example, it is a (Al, Ga, In) N semiconductor layer. The P electrode 83 is formed in the P-type semiconductor layer 59, and the N electrode 85 is formed in a portion of the upper portion of the N-type semiconductor layer 55. Therefore, light can be emitted by supplying current through the P electrode 83 and the N electrode 85.

A conductive material layer 60 is formed between a portion of the N-type semiconductor layer 55, that is, between the N electrode 85 and the varistor layer 70. The conductive material layer 60 may be formed by forming an open region from the N electrode 85 to the varistor layer 70 in a portion where the N electrode 85 is formed, and filling the open region with a conductive material. The N electrode 85 and the varistor layer 70 may be electrically connected through the conductive material layer 60. The conductive material layer 60 may be formed by filling a conductive material after forming a hole or a trench having a diameter of about 100 μm to about 200 μm in a portion where the N electrode 85 is located.

The varistor layer 70 includes a first conductive layer 71, a ZnO based varistor compound layer 72, and a second conductive layer 73. A varistor is an electrical device that exhibits electrical characteristics in which a resistance value of a varistor material varies according to a voltage applied between two conductive layers in a state in which a varistor material is interposed between two conductive layers. Here, the varistor layer 70 is a material layer having varistor characteristics between the first conductive layer 71 and the second conductive layer 73 and includes a ZnO-based varistor compound layer 72.

For example, TiN may be used for the first conductive layer 71 and the second conductive layer 73 in consideration of matching with the substrate 51 and lattice matching with the compound semiconductor layer 55. The first conductive layer 71 and the second conductive layer 73 are formed of TiN, for example, by a CVD or PVD method to a thickness of, for example, 10 nm to 1000 nm, at a temperature condition between room temperature and 300 ° C. Can be. In addition to TiN, the first conductive layer 71 and the second conductive layer 73 may be formed of a material having a melting point of about 1500 ° C. or more and a specific resistance of 1000 nΩm or less, for example, Ti, Ru, Rh, Pd, Pt, or Os. .

The ZnO-based varistor compound layer 72 includes oxides of Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO. For example, the first conductive layer 71 and the second conductive layer may be formed using a sputtering method. It can be formed between the layers (73). The ZnO-based varistor compound layer 72 may further include oxides such as Cr ₂ O ₃ , TiO ₂ , SiO ₂ , and Sb ₂ O _{3 in} addition to Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ oxides. At this time, in order to improve the characteristic of a varistor, thickness can be 100 nm-10 micrometers, and the addition rate of a trace amount oxide should just be 0.01-10 mol / o. The oxide added at this time can be various combinations. The breakdown voltage of the varistor can be adjusted by the combination and the addition amount of these oxides.

The first conductive layer 71 of the varistor layer 70 is electrically connected to the submount substrate 10 through the conductive film layer 51b of the substrate 51, and the second conductive layer of the varistor layer 70 is electrically connected. Layer 73 is connected to N electrode 85 via conductive material layer 60. In this case, the sub-mount substrate 10 is electrically connected to the P electrode 83, and the N electrode 85 is electrically connected to the lead frame 20. The varistor layer 70 has a high resistance value at a low voltage in which the voltage applied to the N electrode 85 or the P electrode 85 has a normal voltage range, and has a low resistance value at static electricity, surge, and overvoltage. Has

Accordingly, the ZnO-based varistor compound layer 72 of the varistor layer 70 when the power applied to the light emitting diode through the N electrode 85, the P electrode 83, and the sub-mount 10 maintains a normal voltage. ) Is in a state of interrupting current flow by maintaining a high resistance state. In other words, the ZnO based varistor compound layer 72 remains an insulator until the voltage applied to it reaches a certain value (breakdown voltage).

However, when a breakdown voltage is applied to one of the N electrode 85, the P electrode 83, and the sub-mount substrate 10 due to various causes, and a breakdown voltage is applied, the ZnO-based varistor compound layer 72 is applied. The resistance of the N-type semiconductor layer 55 and the active layer of the light emitting diode are rapidly reduced, i.e., the current caused by the overvoltage, surge and static electricity generated by the short state flows through the ZnO-based varistor compound layer 72. Reference numeral 57 prevents an overcurrent from flowing into the P-type semiconductor layer 59. The LED can be protected against generated overvoltage, surge and static electricity.

3 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 3, compound semiconductor layers are formed on a substrate 51. The substrate 51 may be a sapphire substrate, but is not limited thereto, and may be another hetero substrate. The compound semiconductor layers include an N-type semiconductor layer 55, an active layer 57, and a P-type semiconductor layer 59. The compound semiconductor layers are III-N-based compound semiconductor layers, and may be grown by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE).

The first conductive layer 71 is formed before the compound semiconductor layers are formed on the substrate 51. For example, TiN may be used for the first conductive layer 71 in consideration of matching with the substrate 51 and lattice matching with the compound semiconductor layer 55. The first conductive layer 71 may be formed at a temperature condition between room temperature and 300 ° C., for example, in a thickness of 10 nm to 1000 nm by TiN by CVD or PVD methods.

The ZnO based varistor compound layer 72 is formed on the first conductive layer 71. The ZnO-based varistor compound layer 72 includes oxides of Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO, and may be formed to have a thickness of 100 nm to 10 μm, for example, by using a sputtering method. have. The ZnO-based varistor compound layer 72 may further include oxides such as Cr ₂ O ₃ , TiO ₂ , SiO ₂ , and Sb ₂ O _{3 in} addition to Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ oxides.

The second conductive layer 73 is formed on the ZnO based varistor compound layer 72. The second conductive layer 73 may be formed at a temperature condition between room temperature and 300 ° C., for example, with a thickness of 10 nm to 1000 nm, for example, by TiN by CVD or PVD methods.

In addition to TiN, the first conductive layer 71 and the second conductive layer 73 may be formed of a material having a melting point of about 1500 ° C. or more and a specific resistance of 1000 nΩm or less, such as Ti, Ru, Rh, Pd, Pt, or Os. Can be.

Meanwhile, a buffer layer (not shown) may be formed on the second conductive layer 73 before the compound semiconductor layers are formed on the second conductive layer 73. The buffer layer is adopted to mitigate lattice mismatch between the second conductive layer 73 and the compound semiconductor layers, and may generally be a gallium nitride-based material layer. When the buffer layer is formed, the conductive material layer 60 to be described below may be formed from the top of the N-type semiconductor layer 55 to the second conductive layer 73 through the buffer layer.

Referring to FIG. 4, a portion of the N-type semiconductor layer 55 is exposed by mesa etching some regions of the compound semiconductor layers 55, 57, and 59.

Referring to FIG. 5, the second conductive layer 73 is formed from an upper portion of the N-type semiconductor layer 55 at a position where the N electrode 85 is to be formed in a portion of the N-type semiconductor layer 55 exposed through mesa etching. A trench 55a is formed. The trench 55a may be formed to have a diameter of, for example, 100 to 200 μm.

Referring to FIG. 6, a conductive material layer 60 is formed by filling a conductive material in the trench 55a formed in the N-type semiconductor layer 55. In this case, the conductive material has a relatively low resistivity and a higher reflectance regardless of physical properties. For example, Ti or TiN / Al or Au is preferable.

Referring to FIG. 7, after the conductive material layer 60 is formed in the N-type semiconductor layer 55, an N electrode 85 is formed on the conductive material layer 60, and a partial region of the P-type semiconductor layer 59 is formed. The P electrode 83 is formed.

Referring to FIG. 8, the lower portion of the substrate 51 is etched to form a trench 51a exposing the first conductive layer 71. At this time, the N-type semiconductor layer 55, the active layer 57, the P-type semiconductor layer 59, the N electrode 85, and the P electrode 83 are formed before the trench 51a is formed below the substrate 51. A protective layer may be formed by, for example, depositing a thickness of, for example, 100 nm to 1 μm with an insulating film such as SiO ₂ or SiN _x .

Referring to FIG. 9, the conductive film layer 51b is deposited on the outer surface of the trench 51a and the lower surface of the substrate 51 in a state where the trench 51a is formed below the substrate 51. Subsequently, the submount substrate 10 is bonded to the conductive film layer 51b of the substrate 51, the submount substrate 10 and the P electrode 83 are connected, and the N electrode 85 is connected to the lead frame 20. When connected to the LED, the light emitting diode shown in FIG. 1 is completed.

Although the present invention has been described in detail with reference to preferred embodiments, the scope of the present invention is not limited to the specific embodiments, it should be interpreted by the appended claims. In addition, those of ordinary skill in the art will understand that many modifications and variations are possible without departing from the scope of the present invention.

For example, in the exemplary embodiment of the present invention, the structure of the substrate, the N-type semiconductor layer, the active layer, and the P-type semiconductor layer has been described, but the present invention is not limited thereto. Applicable to the structure as well.

1 and 2 are a cross-sectional view and a plan view for explaining a light emitting diode according to an embodiment of the present invention.

3 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Claims (13)

Board; A compound semiconductor layer including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer formed on the substrate; First and second electrodes formed on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively; And And a varistor layer interposed between the substrate and the first conductive semiconductor layer. The method according to claim 1, wherein the substrate is an insulating substrate, A trench formed to expose the varistor layer in a lower portion of the substrate; And a conductive film layer formed on an outer surface of the trench and a lower surface of the substrate and electrically connecting the varistor layer and the substrate. The method according to claim 1, wherein the varistor layer, A first conductive layer formed on the substrate; A ZnO based varistor compound layer formed on the first conductive layer; A light emitting diode comprising a second conductive layer formed on the ZnO-based varistor compound layer. The method according to claim 3, wherein the first conductive layer and the second conductive layer, A light emitting diode comprising at least one of TiN, Ti, Ru, Rh, Pd, Pt, Os. The method according to claim 3, wherein the ZnO-based varistor compound layer, A light emitting diode comprising Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO. The method according to claim 5, wherein the ZnO-based varistor compound layer, A light emitting diode further comprising at least one of Cr ₂ O ₃ , TiO ₂ , SiO ₂ , and Sb ₂ O ₃ . The method according to claim 1, And a submount mounted on the substrate and electrically connected to the second electrode. The method according to claim 1, The first conductive semiconductor layer includes a conductive material layer formed in a portion of an interior thereof to electrically connect the first electrode and the varistor layer. Forming a varistor layer on the substrate; Forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on the varistor layer; And forming a first electrode and a second electrode on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively. The method of claim 9, wherein the forming of the varistor layer, Forming a first conductive layer on the substrate; Forming a ZnO based varistor compound layer on the first conductive layer; And And forming a second conductive layer on the ZnO-based varistor compound layer. The method according to claim 10, wherein the first conductive layer and the second conductive layer, A light emitting diode manufacturing method comprising at least one of TiN, Ti, Ru, Rh, Pd, Pt, Os. The method according to claim 10, wherein the ZnO-based varistor compound layer, A light emitting diode manufacturing method comprising Bi ₂ O ₃ , MnO ₂ , and Co ₂ O ₃ based on ZnO. The method according to claim 9, And forming a conductive material layer in a portion of an inner portion of the first conductive semiconductor layer to electrically connect the first electrode and the varistor layer.

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