KR20090008263A - 순환 중복 검사 코드의 구성 가능한 병렬 계산 - Google Patents

순환 중복 검사 코드의 구성 가능한 병렬 계산 Download PDF

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Publication number
KR20090008263A
KR20090008263A KR1020087025838A KR20087025838A KR20090008263A KR 20090008263 A KR20090008263 A KR 20090008263A KR 1020087025838 A KR1020087025838 A KR 1020087025838A KR 20087025838 A KR20087025838 A KR 20087025838A KR 20090008263 A KR20090008263 A KR 20090008263A
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KR
South Korea
Prior art keywords
error detection
data
crc error
configurable
detection code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020087025838A
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English (en)
Korean (ko)
Inventor
사키르 세제르
씨아란 토알
Original Assignee
더 퀸즈 유니버시티 오브 벨파스트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 더 퀸즈 유니버시티 오브 벨파스트 filed Critical 더 퀸즈 유니버시티 오브 벨파스트
Publication of KR20090008263A publication Critical patent/KR20090008263A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091—Parallel or block-wise CRC computation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6575—Implementations based on combinatorial logic, e.g. Boolean circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
KR1020087025838A 2006-04-22 2007-04-13 순환 중복 검사 코드의 구성 가능한 병렬 계산 Withdrawn KR20090008263A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0607976.8 2006-04-22
GBGB0607976.8A GB0607976D0 (en) 2006-04-22 2006-04-22 Apparatus and method for computing an error detection code

Publications (1)

Publication Number Publication Date
KR20090008263A true KR20090008263A (ko) 2009-01-21

Family

ID=36581070

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087025838A Withdrawn KR20090008263A (ko) 2006-04-22 2007-04-13 순환 중복 검사 코드의 구성 가능한 병렬 계산

Country Status (10)

Country Link
US (1) US8321751B2 (enExample)
EP (1) EP2013975B1 (enExample)
JP (1) JP2009534895A (enExample)
KR (1) KR20090008263A (enExample)
CN (1) CN101461140A (enExample)
AT (1) ATE531129T1 (enExample)
GB (1) GB0607976D0 (enExample)
IL (1) IL194807A0 (enExample)
RU (1) RU2008145087A (enExample)
WO (1) WO2007122384A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8161365B1 (en) * 2009-01-30 2012-04-17 Xilinx, Inc. Cyclic redundancy check generator
CN101702639B (zh) * 2009-11-23 2012-12-19 成都市华为赛门铁克科技有限公司 循环冗余校验的校验值计算方法及装置
CN101795175B (zh) * 2010-02-23 2014-03-19 中兴通讯股份有限公司 数据的校验处理方法及装置
CN101847999B (zh) * 2010-05-28 2012-10-10 清华大学 一种用循环冗余校验码进行并行校验的方法
CN102546089B (zh) * 2011-01-04 2014-07-16 中兴通讯股份有限公司 循环冗余校验crc码的实现方法及装置
CN102891685B (zh) * 2012-09-18 2018-06-22 国核自仪系统工程有限公司 基于fpga的并行循环冗余校验运算电路
CN105099466B (zh) * 2015-08-17 2018-04-17 中国航天科技集团公司第九研究院第七七一研究所 一种用于128位并行数据的crc校验矩阵生成方法
US10838799B2 (en) * 2018-08-20 2020-11-17 Micron Technology, Inc. Parallel error calculation
JP6807113B2 (ja) * 2019-06-07 2021-01-06 ソナス株式会社 通信システム、通信方法及び通信装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
JPH0795096A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd プログラマブル並列ｃｒｃ生成装置
JP3256517B2 (ja) * 1999-04-06 2002-02-12 インターナショナル・ビジネス・マシーンズ・コーポレーション 符号化回路、回路、パリティ生成方法及び記憶媒体
US6631488B1 (en) * 2000-06-30 2003-10-07 Agilent Technologies, Inc. Configurable error detection and correction engine that has a specialized instruction set tailored for error detection and correction tasks
US7171604B2 (en) * 2003-12-30 2007-01-30 Intel Corporation Method and apparatus for calculating cyclic redundancy check (CRC) on data using a programmable CRC engine

Also Published As

Publication number Publication date
WO2007122384A1 (en) 2007-11-01
US20100058154A1 (en) 2010-03-04
CN101461140A (zh) 2009-06-17
JP2009534895A (ja) 2009-09-24
GB0607976D0 (en) 2006-05-31
US8321751B2 (en) 2012-11-27
EP2013975A1 (en) 2009-01-14
ATE531129T1 (de) 2011-11-15
IL194807A0 (en) 2009-09-22
EP2013975B1 (en) 2011-10-26
RU2008145087A (ru) 2010-05-27

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Date Code Title Description
PA0105 International application

Patent event date: 20081022

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid