CN101461140A - 循环冗余校验码的可配置并行计算 - Google Patents

循环冗余校验码的可配置并行计算 Download PDF

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Publication number
CN101461140A
CN101461140A CNA2007800208084A CN200780020808A CN101461140A CN 101461140 A CN101461140 A CN 101461140A CN A2007800208084 A CNA2007800208084 A CN A2007800208084A CN 200780020808 A CN200780020808 A CN 200780020808A CN 101461140 A CN101461140 A CN 101461140A
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CN
China
Prior art keywords
data
error detection
crc error
detection code
configurable
Prior art date
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Pending
Application number
CNA2007800208084A
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English (en)
Chinese (zh)
Inventor
萨吉尔·塞泽尔
塞伦·托艾尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Queens University of Belfast
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Queens University of Belfast
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Queens University of Belfast filed Critical Queens University of Belfast
Publication of CN101461140A publication Critical patent/CN101461140A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091—Parallel or block-wise CRC computation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6575—Implementations based on combinatorial logic, e.g. Boolean circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
CNA2007800208084A 2006-04-22 2007-04-13 循环冗余校验码的可配置并行计算 Pending CN101461140A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0607976.8 2006-04-22
GBGB0607976.8A GB0607976D0 (en) 2006-04-22 2006-04-22 Apparatus and method for computing an error detection code

Publications (1)

Publication Number Publication Date
CN101461140A true CN101461140A (zh) 2009-06-17

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ID=36581070

Family Applications (1)

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CNA2007800208084A Pending CN101461140A (zh) 2006-04-22 2007-04-13 循环冗余校验码的可配置并行计算

Country Status (10)

Country Link
US (1) US8321751B2 (enExample)
EP (1) EP2013975B1 (enExample)
JP (1) JP2009534895A (enExample)
KR (1) KR20090008263A (enExample)
CN (1) CN101461140A (enExample)
AT (1) ATE531129T1 (enExample)
GB (1) GB0607976D0 (enExample)
IL (1) IL194807A0 (enExample)
RU (1) RU2008145087A (enExample)
WO (1) WO2007122384A1 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101847999A (zh) * 2010-05-28 2010-09-29 清华大学 一种用循环冗余校验码进行并行校验的方法
CN101702639B (zh) * 2009-11-23 2012-12-19 成都市华为赛门铁克科技有限公司 循环冗余校验的校验值计算方法及装置
CN102891685A (zh) * 2012-09-18 2013-01-23 国核自仪系统工程有限公司 基于fpga的并行循环冗余校验运算电路
CN105099466A (zh) * 2015-08-17 2015-11-25 中国航天科技集团公司第九研究院第七七一研究所 一种用于128位并行数据的crc校验矩阵生成方法
CN113994719A (zh) * 2019-06-07 2022-01-28 梭纳斯株式会社 通信系统、通信方法及通信装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8161365B1 (en) * 2009-01-30 2012-04-17 Xilinx, Inc. Cyclic redundancy check generator
CN101795175B (zh) * 2010-02-23 2014-03-19 中兴通讯股份有限公司 数据的校验处理方法及装置
CN102546089B (zh) * 2011-01-04 2014-07-16 中兴通讯股份有限公司 循环冗余校验crc码的实现方法及装置
US10838799B2 (en) * 2018-08-20 2020-11-17 Micron Technology, Inc. Parallel error calculation

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
JPH0795096A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd プログラマブル並列ｃｒｃ生成装置
JP3256517B2 (ja) * 1999-04-06 2002-02-12 インターナショナル・ビジネス・マシーンズ・コーポレーション 符号化回路、回路、パリティ生成方法及び記憶媒体
US6631488B1 (en) * 2000-06-30 2003-10-07 Agilent Technologies, Inc. Configurable error detection and correction engine that has a specialized instruction set tailored for error detection and correction tasks
US7171604B2 (en) 2003-12-30 2007-01-30 Intel Corporation Method and apparatus for calculating cyclic redundancy check (CRC) on data using a programmable CRC engine

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101702639B (zh) * 2009-11-23 2012-12-19 成都市华为赛门铁克科技有限公司 循环冗余校验的校验值计算方法及装置
CN101847999A (zh) * 2010-05-28 2010-09-29 清华大学 一种用循环冗余校验码进行并行校验的方法
CN101847999B (zh) * 2010-05-28 2012-10-10 清华大学 一种用循环冗余校验码进行并行校验的方法
CN102891685A (zh) * 2012-09-18 2013-01-23 国核自仪系统工程有限公司 基于fpga的并行循环冗余校验运算电路
CN102891685B (zh) * 2012-09-18 2018-06-22 国核自仪系统工程有限公司 基于fpga的并行循环冗余校验运算电路
CN105099466A (zh) * 2015-08-17 2015-11-25 中国航天科技集团公司第九研究院第七七一研究所 一种用于128位并行数据的crc校验矩阵生成方法
CN105099466B (zh) * 2015-08-17 2018-04-17 中国航天科技集团公司第九研究院第七七一研究所 一种用于128位并行数据的crc校验矩阵生成方法
CN113994719A (zh) * 2019-06-07 2022-01-28 梭纳斯株式会社 通信系统、通信方法及通信装置
CN113994719B (zh) * 2019-06-07 2024-04-02 梭纳斯株式会社 通信系统、通信方法及通信装置

Also Published As

Publication number Publication date
US8321751B2 (en) 2012-11-27
KR20090008263A (ko) 2009-01-21
EP2013975B1 (en) 2011-10-26
WO2007122384A1 (en) 2007-11-01
JP2009534895A (ja) 2009-09-24
IL194807A0 (en) 2009-09-22
EP2013975A1 (en) 2009-01-14
ATE531129T1 (de) 2011-11-15
GB0607976D0 (en) 2006-05-31
RU2008145087A (ru) 2010-05-27
US20100058154A1 (en) 2010-03-04

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Application publication date: 20090617