KR20080079826A - Array substrate for liquid crystal display device using liquid type organic semiconductor material and method of fabricating the same - Google Patents

Abstract

An array substrate for an LCD(Liquid Crystal Display) using liquid type organic semiconductor material and a manufacturing method thereof are provided to form an organic semiconductor layer by coating the liquid type organic semiconductor material onto an alignment layer, thereby improving crystallinity within the organic semiconductor layer. First and second alignment layers(103a,103b) are formed on a substrate(101). The surface of the first alignment layer is not rubbed. The surface of the second alignment layer is rubbed. In the second alignment layer, polymer chains of the surface are arranged in a predetermined direction. A data line is formed on the first alignment layer. A source electrode(110) is connected with the data line. A drain electrode(113) is spaced from the source electrode, and exposes the rubbed second alignment layer. A pixel electrode(117) is formed on the first alignment as being contacted with the drain electrode. An organic semiconductor layer(125) includes end parts of the source and drain electrode facing each other, and is formed on the second alignment layer exposed between the source and drain electrodes. A gate insulating layer(130) and a gate electrode(135) are sequentially formed on the organic semiconductor layer. A passivation layer(140) is formed on the gate electrode, and has a gate contact hole(143) and an open part(OP). The gate contact hole exposes the gate electrode. The open part exposes the pixel electrode. A gate line(150) defines a pixel area by crossing the data line, and is formed on the passivation layer as being contacted with the gate electrode through the gate contact hole.

Description

Array substrate for liquid crystal display device using liquid type organic semiconductor material and method of fabricating the same}

1 is an exploded perspective view of a general liquid crystal display device.

2A to 2H are manufacturing process diagrams illustrating a method of manufacturing an array substrate for a liquid crystal display device including an organic thin film transistor having an organic semiconductor layer according to a first embodiment of the present invention.

FIG. 3 is a view schematically illustrating an internal molecular structure of an organic semiconductor material layer formed on a rubbed alignment layer in an array substrate for a liquid crystal display including an organic thin film transistor having an organic semiconductor layer according to a first embodiment of the present invention. .

4A to 4F are manufacturing process drawings illustrating a method of manufacturing an array substrate for a liquid crystal display device including an organic thin film transistor having an organic semiconductor layer according to a second embodiment of the present invention.

5 is a cross-sectional view of one pixel area of an array substrate for a liquid crystal display device including an organic thin film transistor having an organic semiconductor layer according to a modification (third modification) of the second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: substrate 108: data wiring

110 source electrode 113 drain electrode

117: pixel electrode 190: rubbing roll

193: Loving Can

ax: virtual axis connecting source and drain electrodes

rd: rubbing direction

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using an organic semiconductor material and a method of manufacturing the same.

In recent years, as the society enters the information age, the display field that processes and displays a large amount of information has been rapidly developed, and recently, the thin film transistor (Thin) having excellent performance of thinning, light weight, and low power consumption has recently been developed. Film Transistor (TFT) type liquid crystal display (TFT-LCD) has been developed to replace the existing cathode ray tube (CRT).

The image realization principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. As is well known, the liquid crystal has a thin and long molecular structure and has an optical anisotropy having an orientation in the array and a molecular arrangement depending on its size when placed in an electric field. It is polar in nature with its changing direction. The liquid crystal display is an essential component of a liquid crystal panel formed by bonding an array substrate and a color filter substrate formed with pixel electrodes and common electrodes facing each other with the liquid crystal layer interposed therebetween. In addition, it is a non-light emitting device which artificially adjusts the arrangement direction of liquid crystal molecules through the electric field change between these electrodes and displays various images by using the light transmittance which is changed at this time.

Recently, the active matrix type, in which pixels, which are the basic units of image expression, are arranged in a matrix manner, and switching elements are arranged in each pixel, is controlled to have excellent attention in terms of resolution and video performance. In addition, thin film transistors (TFTs) are well known as TFT-LCDs (Thin Firm Transistor Liquid Crystal Display Devices).

In more detail, as shown in FIG. 1, which is an exploded perspective view of a general liquid crystal display device, the array substrate 10 and the color filter substrate 20 face each other with the liquid crystal layer 30 interposed therebetween. The array substrate 10 includes a plurality of gate lines 14 and data lines 16 arranged vertically and horizontally to the first transparent substrate 12 and upper surfaces thereof to define a plurality of pixel regions P. Thin film transistors T are provided at the intersections of the wirings 14 and 16 and are connected one-to-one with the pixel electrodes 18 provided in the pixel regions P. FIG.

In addition, the upper color filter substrate 20 facing the second transparent substrate 22 and its rear surface cover the non-display area of the gate line 14, the data line 16, the thin film transistor T, and the like. A grid-like black matrix 25 is formed that borders each pixel region P. The red, green, and blue color filter layers 26 are sequentially and repeatedly arranged to correspond to the pixel regions P in the grid. Is formed, and a transparent common electrode 28 is provided over the entire surface of the black matrix 25 and the red, green, and blue color filter layers 26.

Although not clearly shown in the drawings, these two substrates 10 and 20 are each sealed with a sealing agent or the like along the edges to prevent leakage of the liquid crystal layer 30 interposed therebetween. An upper and lower alignment layer is provided at the boundary between the substrates 10 and 20 and the liquid crystal layer 30 to provide reliability in the molecular alignment direction of the liquid crystal, and at least one outer surface of each of the substrates 10 and 20 has a polarizing plate. Attached.

In addition, a backlight is provided on the back of the liquid crystal panel to supply light. The on / off signal of the thin film transistor T is sequentially scanned and applied to the gate wiring 14. When the image signal of the data wiring 16 is transmitted to the pixel electrode 18 of the pixel region P, the liquid crystal molecules are driven by the vertical electric field therebetween, and various images are changed due to the change in the transmittance of light. I can display it.

Meanwhile, in the liquid crystal display device, glass substrates have been traditionally used for the first and second insulating substrates 12 and 22, which are the matrixes of the array substrate 10 and the color filter substrate 20. As small portable terminals such as personal digital assistants (PDAs) are widely used, liquid crystal panels using plastic substrates have been introduced that are lighter, lighter, and more flexible than glass so that they can be applied to them.

However, a liquid crystal panel using a plastic substrate has a high temperature process requiring a high temperature of 200 ° C. or higher, especially in the manufacture of an array substrate on which a thin film transistor, which is a switching element, is formed. Therefore, heat resistance and chemical resistance are inferior to that of a glass substrate. There is a difficulty in manufacturing the array substrate from a plastic substrate, so that only the color filter substrate constituting the upper substrate is manufactured from the plastic substrate, and the array substrate, the lower substrate, is used to manufacture a liquid crystal display device using a conventional glass substrate.

In order to solve this problem, a technique for manufacturing an array substrate, which is characterized by forming a thin film transistor by performing a low temperature process below 200 ° C. using an organic semiconductor material, has recently been proposed. The manufacturing of the array substrate by such a low temperature process uses a coating apparatus rather than manufacturing using expensive vacuum deposition equipment, and thus the initial equipment cost is very low, and as a result, a reduction in manufacturing cost can be achieved. Naturally, the present invention is not limited to the production using the organic substrate, but may be manufactured using the organic substrate.

Hereinafter, a method of manufacturing an array substrate using an organic semiconductor material undergoing a low temperature process of 200 ° C. or less will be described.

In forming a pixel including a thin film transistor at a low temperature process of 200 ° C. or less, the formation of a metal material, an insulating film, a protective layer, etc. forming an electrode and wiring may be performed by a low temperature deposition or coating method. It does not affect the characteristics very much. However, when a semiconductor layer forming a channel is deposited by using a low temperature process using amorphous silicon, which is a commonly used semiconductor material, the internal structure of the semiconductor layer is not dense and important characteristics such as mobility play a role as a switching device. There is a problem that can not be reduced.

Therefore, in order to overcome this, it is proposed to form an organic semiconductor layer using an organic material having semiconductor characteristics instead of a conventional semiconductor material such as amorphous silicon, and the like, and in particular, recently, a liquid type organic semiconductor material has been developed. Thereby, a liquid crystal display device including an organic thin film transistor, which is formed on a substrate by a method such as coating, has been proposed.

However, in the manufacture of a liquid crystal display device including an organic thin film transistor using such a liquid organic semiconductor material, when the liquid organic semiconductor material is coated and formed on a substrate in a low temperature atmosphere of 200 ℃ or less, Although the crystallinity of the semiconductor material is not good, the mobility characteristics of the thin film transistor having the semiconductor layer can serve as a switching element of the liquid crystal display device (0.1 cm 2 / V · s to 0.5 cm 2 / V · s). However, due to manufacturing errors in the manufacturing process, a thin film transistor having a value of less than 0.1 cm 2 / V · s having a mobility less than 0.1 cm 2 / V · s is formed, and thus the product cannot be processed as a liquid crystal display device. By this manufacture, the problem that a yield and productivity fall is occurring.

Accordingly, the present invention provides an array substrate for a liquid crystal display device including an organic thin film transistor using a liquid organic semiconductor material. In particular, an error in manufacturing process is improved by improving crystallinity inside the semiconductor layer when forming an organic semiconductor layer. To provide a method of manufacturing an array substrate for a liquid crystal display device comprising an organic thin film transistor having a mobility characteristic enough to perform a role as a switching element of the organic thin film transistor even if the Another object is to improve productivity through improved yields.

Method of manufacturing an array substrate for a liquid crystal display device having an organic semiconductor layer of the present invention for achieving the above object,

==> Attach the claim at the time of filing.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

<First Embodiment>

2A to 2H illustrate manufacturing of one pixel region including a switching element of an array substrate for a liquid crystal display device having an organic thin film transistor having an organic semiconductor layer using a liquid organic semiconductor material according to an embodiment of the present invention. Step by step process drawing. In this case, for convenience of description, an area in which the organic thin film transistor is formed is defined as a switching area.

First, as shown in FIG. 2A, a polymer material such as a polyimide-based oriented polymer material, an oriented polymer material having 3 or more carbon atoms in a side chain, on a front surface of a substrate 101 made of transparent glass or plastic, The alignment layer 103 is formed by coating one of self assembled monolayers (SAMs) on the entire surface.

In this case, the alignment polymer having 3 or more carbon atoms in the side chain is, for example, poly propyl ethylene or poly butenyl ethylene, and the self-assembled monolayer (SAM) is, for example, 20 to 20 carbon atoms in the alkyl chain. It is a thirty silane or thiol based material.

Next, a metal layer (not shown) is deposited on the alignment layer 103 by depositing a metal material selected from gold (Au), silver (Ag), copper (Cu), copper alloy, aluminum (Al), and an aluminum alloy. A predetermined unit process such as applying the metal layer (not shown), applying a photoresist, exposing with a mask, developing a photoresist, etching the metal layer (not shown), and stripping the photoresist. The data wiring (not shown) extending in one direction by performing a patterning process including a mask process and a pixel region (a region defined as a portion surrounded by the wiring and crossing the data wiring and a gate wiring formed later) are described above. A source electrode 110 connected to a data line (not shown) and a drain electrode 113 facing each other at a predetermined interval from the source electrode 110 are formed.

Next, as shown in FIG. 2B, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) is formed on the substrate 101 on which the source and drain electrodes 110 and 113 are formed. Is deposited on the entire surface and is patterned by the mask process described above to form the pixel electrode 117 in contact with the drain electrode 113 for each pixel region P. FIG.

In this case, the pixel electrode 117 is not formed in the switching region TrA in which the organic thin film transistor is formed in each pixel region P. Some alignment layers 103 are interposed between the source and drain electrodes 110 and 113. ) Will be exposed.

Next, as shown in FIG. 2C, after moving the substrate 101 on which the pixel electrode 117 is formed to a rubbing device (not shown), the alignment layer 103 exposed between the source and drain electrodes 110 and 113. The rubbing process is carried out for). In this case, portions covered by the source and drain electrodes 110 and 113, the data line 108, and the pixel electrode 117 (which are referred to as a first alignment layer (103a in FIG. 2D)) may be maintained as they are. The polymer chains on the surface of the source and drain electrodes 110 and 113, the pixel electrodes 117, and the data lines 108 may be aligned in one direction (rubbing direction). A rubbed second alignment layer (103b of FIG. 2D) is formed.

In this case, the rubbing process is performed by contacting the surface of the substrate 101 with a columnar rubbing roll 190 having a special cloth (called a rubbing cloth 193) including a portal on the surface thereof. The second exposed to the outside of the rubbing cloth 193, the source and drain electrodes 110 and 113, the pixel electrode 117, and the data line 108 by rotating and linearly moving in one direction. The alignment film (103b of FIG. 2D) is rubbed so that the polymer chain 104 formed on the surface of the second alignment film (10b3 of FIG. 2D) is aligned in one direction.

Meanwhile, a rubbing direction rd defined as a direction in which the rubbing roll 190 moves on a straight line on the substrate 101 may be a virtual axis connecting the source and drain electrodes 110 and 113 spaced apart from each other. The direction perpendicular to ax) is an important feature of the present invention.

 The liquid organic semiconductor material is formed on the second alignment layer (103b of FIG. 2D) that is subjected to the rubbing direction rd, that is, the direction perpendicular to the axis (ax) connecting the source and drain electrodes 110 and 113. When coated using a lattice, molecules and chains constituting the organic semiconductor material react with the polymer chain 104 on the surface of the second alignment layer (103b in FIG. 2D) to have a long axis d2 and a short axis d1. It is to be arranged to have a constant direction in the form. That is, the structure in which the short axis of the organic semiconductor material molecules are connected and arranged in the direction orthogonal to the rubbing direction (rd) (ax extension direction) and the long axis of the organic semiconductor material molecules are connected and arranged in the rubbing direction (rb). This is for forming the organic semiconductor material layer (124 of FIG. 2D).

In the case of the organic semiconductor (material) layer (124 of FIG. 2D) having such a structure, the electrical conductivity in the short axis direction of the semiconductor molecules has a superior characteristic compared to the electrical conductivity in the long axis direction, and thus, the source electrode 110 is In consideration of the characteristics of the thin film transistors through which current flows to the drain electrode 113, the mobility characteristics of the organic thin film transistors are improved by making the current flow direction in the organic semiconductor layer be a uniaxial arrangement direction between semiconductor molecules having excellent conductivity characteristics. It is to be made.

Next, as shown in FIG. 2D, the second alignment layer 103b exposed between the source and drain electrodes 110 and 113 and rubbed on the surface thereof, the source and drain electrodes 110 and 113, and the pixel are exposed. Liquid organic semiconductor material on the front of the electrode 117, for example, liquid pentacene, polythiophene-based polymer semiconductor material, polyphenylenevinylene-based polymer semiconductor material The organic semiconductor material layer is coated on the entire surface using an inkjet device, a nozzle coating device, a bar coating device, a slit coating device, a spin coating device or a printing device. 124).

In this case, the polythiophene-based polymer semiconductor material is, for example, poly (3-hexylthiophene), poly (2,5) -bis3-alkylthiophen-2-yl thieno [3,2-b] thiophene, poly (p-phenylenevinylene), poly (phenylene), poly (fluorene), poly (2-methoxy) -5- (2'-ethylhexyloxy) -1,4 phenylenevinylene.

In the case of the organic semiconductor material, the thin film formation process is mainly performed in the liquid state, and the evaporation rate of the solvent is the one which has the greatest influence on the crystallinity of the thin film. The slower the evaporation rate of the solvent, the more intermolecular In order to improve the degree of ordering, crystal growth is possible in a more efficient direction in the carrier conductivity due to the physicochemical orientation of the polymer chain 104 aligned in one direction on the surface of the rubbed second alignment layer 103b. Done.

That is, referring to FIG. 3, which shows an enlarged view of the structure of the second alignment layer 103b and the organic semiconductor material layer 124 disposed thereon, the organic semiconductor material layer 124 is particularly rubbed with the second alignment layer. For the upper part 103b, molecules and chains of the organic semiconductor material are affected by the polymer chains 104 that are well aligned in one direction on the surface thereof, thereby improving self-ordering effect. The intermolecular minor axis d1 is formed by connecting the minor axis d1 and the major axis d2 with the major axis d2, thereby improving the crystallinity of at least a portion corresponding to the upper portion of the rubbed second alignment layer 103b. Layer 124 is formed.

At this time, in the present invention, the rubbing direction rd is a direction perpendicular to the virtual axis ax connecting the source and drain electrodes to correspond to the rubbed second alignment layer 103b. The organic semiconductor material layer 124 having an internal structure in which the short axis d1 of the semiconductor material molecule is connected in a direction parallel to the imaginary axis ax connecting the drain electrode is formed.

Accordingly, the organic semiconductor material layer 124 corresponding to the second alignment layer 103b has a short axis d1 of semiconductor material molecules arranged in parallel with an imaginary axis ax connecting the source and drain electrodes. ) Does not constitute a second alignment film that is rubbed underneath, such as an array substrate comprising a conventional organic semiconductor layer, so that the long axis of the semiconductor material molecules is arranged side by side with the imaginary axis connecting the source and drain electrodes. The organic semiconductor material layer or the molecules of the organic semiconductor material have a higher mobility characteristic (0.13 cm 2 / V · s to 0.6 cm 2 / V · s) compared to the organic semiconductor material layer formed by disordered mixing of short and long axes. In addition, the electrical mobility of the carrier in the organic semiconductor layer is improved.

Next, as shown in FIG. 2E, the organic insulating material is continuously formed on the organic semiconductor material layer 124 having the orderly crystallinity of the molecules corresponding to the rubbed second alignment layer 103b. For example, the gate insulating material layer 129 is formed on the entire surface by applying photo acryl or polyvinyl alcohol (PVA).

Thereafter, the second metal layer 134 is formed by depositing a metal material, for example, molybdenum (Mo) or chromium (Cr), which is easily dry-etched on the gate insulating material layer 129.

Next, as shown in FIG. 2F, a photoresist pattern (not shown) is formed by applying photoresist onto the second metal layer (134 of FIG. 2E), exposing and developing the photoresist pattern (not shown). The second metal layer 134 of FIG. 2E and the gate insulating material layer 129 of FIG. 2E and the organic semiconductor exposed to the outside of the photoresist pattern (not shown) by performing dry etching using an etching mask are performed. The material layer 124 of FIG. 2E is simultaneously removed to form the gate electrode 135, the gate insulating layer 130, and the organic semiconductor layer 125 having the same pattern form sequentially from the top to the bottom.

In this case, the organic semiconductor layer 125 may have ends of the source and drain electrodes 110 and 113 facing each other with the rubbed second alignment layer 103b exposed to the separation regions of the source and drain electrodes 110 and 113. Cover and form.

The source and drain electrodes 110 and 113, the organic semiconductor layer 125, the gate insulating layer 130, and the gate electrode 135 which are sequentially stacked on the substrate 101 are formed of an organic thin film transistor Tr. ) Is achieved.

Next, as shown in FIG. 2G, the gate contact hole 143 and the pixel region P exposing the gate electrode 135 by applying an organic insulating material on the entire surface of the gate electrode 135 and patterning the same. A passivation layer 140 having an open part op to expose most pixel electrodes 117 therein is formed.

Next, as shown in FIG. 2H, a metal material having low resistance characteristics, such as gold (Au) and copper (Cu), may be formed on the passivation layer 140 having the gate contact hole 143 and the open part op. And depositing a copper alloy, aluminum (Al), and an aluminum alloy to form a third metal layer (not shown), and patterning the same, thereby contacting the gate electrode 135 through the gate contact hole 143, and the data line. The gate substrate 150 defining the pixel region P is formed to intersect with (not shown) to complete the array substrate 101 for a liquid crystal display device having the organic thin film transistor Tr according to the present invention.

In this case, the gate wiring 150 includes the overlapping gate wiring 150, the pixel electrode 117, and the protective layer 140 formed therebetween by forming the gate electrode 150 to overlap the pixel electrode 117. To achieve a storage capacitor (StgC).

Meanwhile, in the first exemplary embodiment of the present invention, a method of manufacturing an array substrate for a liquid crystal display device having an organic thin film transistor having a top gate structure, wherein the gate electrode is positioned above the source and drain electrodes, is presented. However, a method of manufacturing an array substrate for a liquid crystal display device having an organic thin film transistor having a bottom gate structure at which a gate electrode is disposed at the bottom thereof will be described in the second embodiment.

Second Embodiment

4A to 4F illustrate a method of manufacturing an array substrate for a liquid crystal display device using an organic semiconductor material according to a second exemplary embodiment of the present invention, and a cross-sectional view of each pixel region including an organic thin film transistor according to a manufacturing process to be.

As shown in FIG. 4A, the first metal material is sputtered on a insulating substrate 201 made of a transparent plastic or glass material in a low temperature process of 200 ° C. or lower, and deposited on the front surface to deposit a first metal layer (not shown). A gate wiring 203 extending in one direction and a gate electrode 205 branching from the gate wiring 203 by forming the first metal layer (not shown).

Next, a polymer material such as a polyimide-based oriented polymer material, an oriented polymer material having 3 or more carbon atoms in the side chain, on the substrate 201 on which the gate wiring 203 and the gate electrode 205 are formed, The alignment layer 210 serving as a gate insulating layer is formed by coating one of self assembled monolayers (SAMs) on the entire surface. In this case, the gate wiring and the alignment film 210 serving as the gate insulating film are formed to have a thickness of, for example, about 0.5 μm to 2 μm thicker than the thickness of the gate wiring 203 and the gate electrode 205. The electrodes 203 and 205 overcome the step formed with the substrate 201 to achieve a flat surface.

In this case, among the polymer materials constituting the alignment layer 210 serving as a gate insulating film, the alignment polymer material having 3 or more carbon atoms in the side chain is, for example, poly propyl ethylene or poly butenyl ethylene, and the self-aligned monolayer material (self). assembled monolayer (SAM) is, for example, a silane or thiol-based material having 20 to 30 carbon atoms in the alkyl chain.

On the other hand, although not shown in the drawings, as a first modification according to the second embodiment, an organic insulating material, for example, polyvinyl pyrrolidone (PVP), fluorine, is formed between the alignment layer serving as a gate insulating film, the gate wiring, and an electrode. The gate insulating film may be further formed by coating a material selected from a fluoropolymer and a polyvinyl alcohol (PVA) on the entire surface. In this case, the gate insulating film is formed as an organic insulating material. When the thickness of the gate insulating film is formed thicker than the thickness of the lower gate electrode, the surface of the gate insulating film is flat without being affected by the step difference between the gate wiring and the gate electrode. Will be. Therefore, in the modification of the second embodiment having such a configuration, the alignment layer is formed on the gate insulating film having a flat surface, so that the thickness is relatively thick (0.5 μm to 2 to overcome the step as in the second embodiment). It is not necessary to form thick so as to have a micrometer), and it is preferable to form so that it may have thickness of about 1000 micrometers-3000 micrometers.

Next, as shown in FIG. 4B, a second metal material such as gold (Au), silver (Ag), copper (Cu), a copper alloy, and aluminum (Al) is disposed on the alignment layer 210 serving as a gate insulating layer. A second metal layer is formed by depositing one of the aluminum alloys and patterning the second metal layer, thereby intersecting the gate wiring 203 to define a pixel region P, and a data wiring (not shown) within the pixel region P. A source electrode 220 connected to the data line (not shown) and a drain electrode 223 facing and spaced apart from the source electrode 220 are formed.

Next, as shown in FIG. 4C, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited on the source and drain electrodes 220 and 223, and The pixel electrode 230 in contact with one end of the drain electrode 223 is formed in the pixel region P by patterning.

Next, as shown in FIG. 4D, the source and drain electrodes 220 may be rubbed by performing some rubbing on some of the alignment layers 210 of FIG. 4C exposed between the pixel electrode 230 and the source and drain electrodes 220 and 223. The first alignment layer 210a of FIG. 4E and the source and drain electrodes 220 and 223 and the pixel electrode 230 and the data line that are not rubbed by the pixel electrode 230 and the data line 118. 118) Exposure to the outside causes the surface to be rubbed to form a second alignment film (210b in FIG. 4E) with side chains of the surface aligned in the rubbing direction.

At this time, the rubbing direction rd is a direction perpendicular to the virtual axis ax connecting the source and drain electrodes 220 and 223 as in the first embodiment. The reason why the rubbing is performed to have the rubbing direction rd has been omitted through the first embodiment.

 Next, as shown in FIG. 4E, a liquid organic semiconductor material, for example, a liquid pentacine, is formed on the entire surface of the rubbed second alignment layer 210b and the source and drain electrodes 220 and 223 and the pixel electrode 230. pentacene) or polythiophene-based polymer semiconductor materials such as poly (3-hexylthiophene), poly (2,5) -bis3-alkylthiophen-2-yl thieno [3,2-b] thiophene, poly ( p-phenylenevinylene), poly (phenylene), poly (fluorene), poly (2-methoxy) -5- (2'-ethylhexyloxy) -1,4 phenylenevinylene or polyphenylenevinylene The organic semiconductor material layer 235 is formed by coating the entire surface using an inkjet apparatus, a nozzle coating apparatus, a bar coating apparatus, a slit coating apparatus, a spin coating apparatus, or a printing apparatus. do.

Thereafter, the organic material, for example PVA (development pure water), has a photosensitive characteristic on the organic semiconductor material layer 235 and the developer does not affect the organic semiconductor material of the organic semiconductor material layer 235. ) Or photoacrylic (developing solution KOH) on the entire surface, and then patterned by performing a mask process including exposure and development steps, corresponding to a portion where an organic semiconductor layer should be formed in each pixel region P. 241). In this case, the organic semiconductor material layer 235 is exposed to pure water or KOH used as the developer when the protective pattern 241 is formed, but is not affected by them. Furthermore, the exposed part of the developer is further processed. It is not a problem as it is removed by.

Next, as shown in FIG. 4F, the organic semiconductor material layer 235 of FIG. 4E exposed to the outside of the protective pattern 241 may be removed by dry etching to face the mutual protection portion below the protective pattern 241. Liquid crystal comprising an organic semiconductor layer 236 according to a second embodiment of the present invention by forming an organic semiconductor layer 236 over the exposed rubbed second alignment layer 210b between the source and drain electrodes 220, 223. The array substrate 201 for a display device is completed.

In this case, the organic semiconductor layer 236 includes a rubbed second alignment layer 210b exposed between the source and drain electrodes 220 and 223, and a portion of an end portion of the source and drain electrodes 220 and 223 facing each other. Contact with and form.

Further, as a second modification according to the above-described second embodiment, an organic insulating material, for example, PVA or photo acryl, is further formed on the protective pattern 241 in the above-described state (see FIG. 4F). A protective layer (not shown) having an open portion (not shown) may be further formed by coating and patterning and removing the pattern corresponding to the portion where the pixel electrode 230 is formed. This is to prevent the wirings from being corroded by being exposed to air for a long time by covering the exposed data wirings (not shown).

The second modification according to the second embodiment may also be applied to the first modification according to the second embodiment.

Meanwhile, in the above-described second embodiment, a structure and a manufacturing method of an array substrate for a liquid crystal display device having an organic thin film transistor having a bottom gate structure, characterized in that an organic semiconductor layer is formed on the source and drain electrodes. However, as shown in FIG. 5 as a third modification according to the second embodiment, an organic semiconductor layer is formed before the source and drain electrodes, and contacts both ends of the organic semiconductor layer, and the source and drain electrodes are A bottom gate structure organic thin film transistor having a structured structure may be configured.

  In this case, the manufacturing method will be described. After the gate electrode 305 and the gate wiring 303 and the alignment film 310 having the flat surface are formed as in the second embodiment, the alignment film 310 is formed. The pixel electrode 330 is formed in the pixel region P by depositing and patterning a transparent conductive material. In this case, a portion of the pixel electrode 330 is formed to overlap the gate line 305 so that the overlapping pixel electrode 330 and the gate line 303 and the alignment layer 310 therebetween become a storage capacitor StgC. To achieve.

Thereafter, rubbing is performed on the alignment layer 310 exposed between the pixel electrodes 330, thereby being exposed to the outside of the first alignment layer 310a and the pixel electrode 330 that are not covered and rubbed by the pixel electrode 330. The surface is rubbed to form a second alignment layer 310b with side chains of the surface aligned in the rubbing direction.

Next, an organic semiconductor material layer (not shown) having improved crystallinity by the second alignment layer 310b in the switching region TrA by coating an organic semiconductor material on the pixel electrode 330 and the second alignment layer 310b. ) To the front. Thereafter, the organic semiconductor material layer (not shown) does not affect the organic semiconductor material constituting the organic semiconductor material layer (not shown) as in the second embodiment. (Developer pure) or photoacrylic (developing solution KOH) on the entire surface, and then patterned by performing a mask process including exposure and development steps to correspond to the portion where the organic semiconductor layer should be formed in each pixel region P A protective pattern 341 is formed. In this case, the protection pattern 341 is formed only in the switching region TrA so as not to overlap the pixel electrode 330.

Next, the organic semiconductor material layer (not shown) exposed to the outside of the protection pattern 341 is removed by dry etching to remove the protection pattern 341 below the protection pattern 341 in the switching region TrA. The organic semiconductor layer 336 having the same form as the above is formed. At this time, the side surfaces of the protective pattern 341 and the organic semiconductor layer 336 are exposed.

The metal material is deposited on the entire surface of the substrate 301 on which the organic semiconductor layer 336 is exposed to form a metal layer (not shown). In this case, the metal layer (not shown) is in contact with the side surface of the exposed protective pattern 341 and the organic semiconductor layer 336 and the pixel electrode 330.

Next, a photosensitive organic material is coated on the metal layer (not shown) and a mask process is performed to form an etch stop pattern (not shown), and the etching is performed by dry etching using the etch stop pattern (not shown). By removing the metal layer (not shown) exposed to the outside of the prevention pattern (not shown) as shown in the switching region (TrA), respectively contact with the side of the organic semiconductor layer and spaced apart from each other on the protective pattern 341 Source and drain electrodes 320 and 323, and at the same time, the gate wiring 303 is disposed on the second alignment layer 310b corresponding to the separation region between the pixel electrodes 330 except for the switching region TrA. Intersect with each other to form a data line (not shown) defining the pixel region (P). In this case, the source electrode 320 is connected to the data line (not shown), and the drain electrode 323 is formed to be in contact with the pixel electrode 330 so that the portion of the second embodiment of the present invention can be The array substrate 301 for a liquid crystal display device according to the third modification is completed.

In the third modified example, a gate insulating film may be further formed between the gate electrode and the gate wiring and the alignment layer as in the first modified example.

In manufacturing an array substrate for a liquid crystal display device comprising a coating using a liquid organic semiconductor material according to the present invention, the surface of the organic semiconductor material is further formed by coating a liquid organic semiconductor material thereon after further forming a rubbing treated alignment film By forming the layer, there is an effect of improving the crystallinity in the organic semiconductor layer and finally improving the mobility characteristics of the organic thin film transistor having the component.

In addition, even if the mobility characteristic of the organic thin film transistor decreases by a predetermined amount due to the process error during the manufacturing process, the manufacturing yield and productivity of the liquid crystal display device are improved by having a margin larger than the mobility characteristic value deteriorated by the process error. It is effective to let.

Claims (24)

A substrate; A first alignment layer formed on the substrate and whose surface is not rubbed, and a second alignment layer which is rubbed so that the polymer chains on the surface thereof are aligned in a predetermined direction; A drain electrode formed to expose a data line formed on the first alignment layer, a source electrode connected to the data line, and the second alignment layer that is rubbed apart from the source electrode; A pixel electrode formed on the first alignment layer in contact with the drain electrode; An organic semiconductor layer formed over the second alignment layer exposed between these two electrodes, including ends of the source and drain electrodes facing each other; A gate insulating film and a gate electrode sequentially formed on the organic semiconductor layer; A protective layer having a gate contact hole exposing the gate electrode over the gate electrode and an open portion exposing the pixel electrode; A gate line formed on the passivation layer to cross the data line to define a pixel area and contact the gate electrode through the gate contact hole; Array substrate for a liquid crystal display device comprising a. A substrate; A gate wiring formed on the substrate and a gate electrode connected to the gate wiring; A first alignment layer formed over the gate wiring and the gate electrode, the surface of which is not rubbed, and a second alignment layer in which the polymer chains on the surface are aligned in a predetermined direction; A drain electrode formed to expose a data line formed on the first alignment layer, a source electrode connected to the data line, and the second alignment layer that is rubbed apart from the source electrode; A pixel electrode formed on the first alignment layer in contact with the drain electrode; An organic semiconductor layer and a protective pattern sequentially formed on an upper end of the second alignment layer exposed between the source and drain electrodes and on one end of the source and drain electrodes facing each other; Array substrate for a liquid crystal display device comprising a. A substrate; A gate wiring formed on the substrate and a gate electrode connected to the gate wiring; A first alignment layer formed over the gate wiring and the gate electrode, the surface of which is not rubbed, and a second alignment layer in which the polymer chains on the surface are aligned in a predetermined direction; An organic semiconductor layer and a protective pattern, the side surfaces of which are sequentially exposed on the second alignment layer; A pixel electrode formed on the first alignment layer; A data line formed on the second alignment layer to cross the gate line; A source electrode in contact with the first side of the organic semiconductor layer and connected to the data line; A drain electrode formed to be spaced apart from the source electrode to be in contact with the second side surface of the organic semiconductor layer and to be in contact with the pixel electrode at the same time Array substrate for a liquid crystal display device comprising a. The method of claim 2 or 3, And a gate insulating film is further formed between the first and second alignment layers, the gate wiring and the electrode. The method of claim 1, wherein And the first and second alignment layers are flat on the surface thereof. Coating a polymer material on the substrate to form first and second alignment layers; Forming a data line on the first alignment layer, a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode to expose the second alignment layer; Forming a pixel electrode in contact with the drain electrode; Rubbing treatment of the second alignment layer exposed between the source and drain electrodes in one direction; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode over the rubbed second alignment layer including the ends of the source and drain electrodes facing each other; Forming a protective layer having a gate contact hole exposing the gate electrode over the gate electrode and an open portion exposing the pixel electrode; Forming a gate area on the passivation layer to cross the data line and define a pixel area and to contact the gate electrode through the gate contact hole; Method of manufacturing an array substrate for a liquid crystal display device comprising a. Forming a gate wiring and a gate electrode connected to the gate wiring on a substrate; Coating first and second alignment layers by coating a polymer material on the gate line and the gate electrode; Forming a data line over the first alignment layer and defining a pixel area crossing the gate line, the source and drain electrodes spaced apart from each other and exposing the second alignment layer; Forming a pixel electrode in contact with the drain electrode; Rubbing treatment of the second alignment layer exposed between the source and drain electrodes in one direction; Sequentially forming an organic semiconductor layer and a protective pattern on the rubbed second alignment layer and one end of the source and drain electrodes facing each other; Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 7, wherein And forming a protective layer having an open portion exposing the pixel electrode over the protective pattern. Forming a gate wiring and a gate electrode connected to the gate wiring on a substrate; Coating first and second alignment layers by coating a polymer material on the gate line and the gate electrode; Forming a pixel electrode on the first alignment layer; Rubbing the second alignment layer exposed to the outside of the pixel electrode in one direction; Sequentially forming a protective pattern and an organic semiconductor layer having exposed side surfaces thereof on the rubbed second alignment layer; Forming a data line over the second alignment layer to define a pixel area crossing the gate line, and a source and drain electrode spaced apart from each other on the protective pattern and in contact with side surfaces of the organic semiconductor layer, respectively; Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method according to any one of claims 6, 7, and 9, The polymer material may be a polyimide-based alignment polymer material, an alignment polymer material having 3 or more carbon atoms in a side chain, or a self-aligning monomer material. The method of claim 10, The alignment polymer material having 3 or more carbon atoms in the side chain is poly propyl ethylene or poly butenyl ethylene. The method of claim 10, The self-aligning monolayer material is a method of manufacturing an array substrate for a liquid crystal display device, characterized in that the silane or thiol-based material having 20 to 30 carbon atoms in the alkyl chain. The method according to any one of claims 6, 7, and 9, The organic semiconductor layer is a liquid crystal display device array, characterized in that one of the liquid pentacene (polyacephene), polythiophene-based polymer semiconductor material, polyphenylenevinylene-based polymer semiconductor material Method of manufacturing a substrate. The method of claim 13, The polythiophene-based organic semiconductor material is poly (3-hexylthiophene), poly (2,5) -bis3-alkylthiophen-2-yl thieno [3,2-b] thiophene, poly (p-phenylenevinylene ), poly (phenylene), poly (fluorene), poly (2-methoxy) -5- (2'-ethylhexyloxy) -1,4 phenylenevinylene characterized in that the manufacturing method of the array substrate for a liquid crystal display device. The method according to any one of claims 6, 7, and 9, And one direction of the rubbing process is a direction perpendicular to an imaginary axis connecting the source and drain electrodes facing each other and spaced apart from each other. A first alignment layer whose surface is not rubbed, and a second alignment layer which is rubbed and the polymer chains on the surface thereof are aligned in a constant direction; Source and drain electrodes formed on the first alignment layer to expose the second alignment layer that is spaced apart from each other, the rubbing treatment; An organic semiconductor layer formed over the rubbed second alignment layer exposed between the two electrodes, including ends of the source and drain electrodes facing each other; A gate insulating film and a gate electrode sequentially formed on the organic semiconductor layer Organic thin film transistor comprising a. A gate electrode; A first alignment layer which is formed on the gate electrode and whose surface is not rubbed, and a second alignment layer whose rubbing treatment is such that polymer chains on the surface thereof are aligned in a predetermined direction; A source and a drain electrode formed on the first alignment layer, the source and drain electrodes formed to expose the second alignment layer that is rubbed and spaced apart from each other; An organic semiconductor layer and a protective pattern sequentially formed on an upper end of the second alignment layer exposed between the source and drain electrodes and on one end of the source and drain electrodes facing each other; Organic thin film transistor comprising a. A gate electrode; A first alignment layer which is formed on the gate electrode and whose surface is not rubbed, and a second alignment layer whose rubbing treatment is such that polymer chains on the surface thereof are aligned in a predetermined direction; An organic semiconductor layer and a protective pattern sequentially stacked while exposing side surfaces of the second alignment layer; Source and drain electrodes spaced apart from each other on the protective pattern and in contact with side surfaces of the organic semiconductor layer, respectively. Organic thin film transistor comprising a. The method of claim 17 or 18, And a gate insulating film formed between the gate electrode and the first and second alignment layers. Coating a polymer material on the substrate to form first and second alignment layers; Forming a source and a drain electrode spaced apart from each other over the first alignment layer to expose the second alignment layer; Rubbing treatment of the second alignment layer exposed between the source and drain electrodes in one direction; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode over the rubbed second alignment layer including the ends of the source and drain electrodes facing each other; Method of manufacturing an organic thin film transistor comprising a. Forming a gate electrode on the substrate; Coating a polymer material on the gate electrode to form first and second alignment layers; Forming a source and a drain electrode spaced apart from each other on the first alignment layer to expose the second alignment layer; Rubbing the second alignment layer exposed between the source and drain electrodes in one direction; Sequentially forming an organic semiconductor layer and a protective pattern on the rubbed second alignment layer and one end of the source and drain electrodes facing each other; Method of manufacturing an organic thin film transistor comprising a. Forming a gate electrode on the substrate; Coating a polymer material on the gate electrode to form first and second alignment layers; Performing a rubbing treatment on the second alignment layer in one direction; Forming an organic semiconductor layer and a protective pattern, the surfaces of which are sequentially stacked on the rubbed second alignment layer and exposed at side surfaces thereof; Forming source and drain electrodes in contact with side surfaces of the organic semiconductor layer and spaced apart from each other on the protective pattern, respectively; Method of manufacturing an organic thin film transistor comprising a. The method according to any one of claims 20 to 22, One direction of the rubbing treatment is a method of manufacturing an organic thin film transistor, characterized in that the direction perpendicular to the virtual axis connecting the source and drain electrodes facing each other and spaced apart. The method according to any one of claims 20 to 22, And forming a gate insulating film between the gate electrode and the first and second alignment layers.

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