KR20060024061A - Method of fabricating the array substrate for flexible liquid crystal display device - Google Patents

Abstract

In manufacturing an array substrate for a flexible liquid crystal display device using a plastic substrate, due to the characteristics of the low molecular organic semiconductor material, patterning cannot be performed by photolithography using photoresist, and patterning is performed using a shadow mask having a low resolution of a pattern. have. Since the formation of the low molecular weight organic semiconductor layer pattern using the shadow mask has a size of 40 μm or more, there is a limitation in manufacturing a high resolution array substrate.

The present invention provides a method capable of patterning a low molecular organic semiconductor material, which is vulnerable to moisture, photoresist and stripping liquid, to several micrometers in forming a low molecular organic semiconductor material. Therefore, since the micropattern is possible, there is an effect of providing an array substrate for a liquid crystal display using a plastic substrate having a high opening ratio and high resolution.

Plastic substrate, low molecular organic semiconductor layer, fine pattern, shadow mask

Description

Method of fabricating the array substrate for flexible liquid crystal display device             

1 is an exploded perspective view of a general liquid crystal display device.

FIG. 2 is a view illustrating a semiconductor layer formed using a low molecular organic semiconductor material during a process of manufacturing a conventional flexible liquid crystal display array substrate. FIG.

3 to 12 are manufacturing cross-sectional view showing a method for manufacturing an array substrate for a liquid crystal display device using a plastic substrate according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: plastic substrate 105: gate electrode

108: gate insulating film 125: low molecular organic semiconductor layer

133a, 133b: source and drain electrodes

121b: second photoresist pattern

ch: channel section

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal panel using a plastic substrate and a manufacturing method thereof.

In recent years, as the society enters the information age, the display field that processes and displays a large amount of information has been rapidly developed, and recently, the thin film transistor (Thin) having excellent performance of thinning, light weight, and low power consumption has recently been developed. Film Transistor (TFT) type liquid crystal display (TFT-LCD) has been developed to replace the existing cathode ray tube (CRT).

The image realization principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. As is well known, the liquid crystal has a thin and long molecular structure and optical anisotropy having an orientation in an array, and when placed in an electric field, the liquid crystal has an orientation of molecular arrangement depending on its size. This change is polarized. The liquid crystal display is an essential component of a liquid crystal panel formed by bonding an array substrate and a color filter substrate formed with pixel electrodes and common electrodes facing each other with the liquid crystal layer interposed therebetween. In addition, it is a non-light emitting device which artificially adjusts the arrangement direction of liquid crystal molecules through the electric field change between these electrodes and displays various images by using the light transmittance which is changed at this time.

Recently, the active matrix type, in which pixels, which are the basic units of image expression, are arranged in a matrix manner and a switching element is arranged in each pixel, is independently controlled. One such thin-film transistor (TFT) is a thin-film transistor (Thin Firm Transistor Liquid Crystal Display Device).

As shown in FIG. 1, which is an exploded perspective view of a general liquid crystal display, the array substrate 10 and the color filter substrate 20 face to face with the liquid crystal layer 30 interposed therebetween. ) Includes a plurality of gate wires 14 and the data wires 16 arranged vertically and horizontally across the first transparent substrate 12 and its upper surface to define a plurality of pixel regions P. The two wires 14 And the thin film transistor T is provided at an intersection point of the pair 16 and is connected in one-to-one correspondence with the pixel electrode 18 provided in each pixel region P. FIG.

In addition, the upper color filter substrate 20 facing the second transparent substrate 22 and its rear surface cover the non-display area of the gate line 14, the data line 16, the thin film transistor T, and the like. A color filter layer consisting of a black matrix 25 having a lattice shape bordering each pixel region P and red, green, and blue color filters 26 sequentially and repeatedly arranged corresponding to each pixel region P in the lattice. And a transparent common electrode 28 provided over the entire surface thereof.

Although not clearly shown in the drawings, each of the two substrates 10 and 20 is sealed with a sealing agent or the like along the edges in order to prevent leakage of the liquid crystal layer 30 interposed therebetween. The upper and lower alignment layers which provide reliability in the molecular alignment direction of the liquid crystal are interposed between the boundary portion 20 and the liquid crystal layer 30, and polarizing plates are attached to at least one outer surface of each substrate 10 and 20.

In addition, a backlight is provided on the back of the liquid crystal panel to supply light. The on / off signal of the thin film transistor T is sequentially scanned and applied to the gate wiring 14 to select the pixel area P. When the image signal of the data wiring 16 is transmitted to the pixel electrode 18, the liquid crystal molecules therebetween are driven by the vertical electric field therebetween, and various images can be displayed by the change in the transmittance of light.

On the other hand, in the liquid crystal display device, the first and second transparent substrates 12 and 22, which are the matrixes of the array substrate 10 and the color filter substrate 20, have traditionally used glass substrates. As small portable terminals such as PDAs are widely used, liquid crystal panels using plastic substrates have been introduced, which are lighter, lighter, and more flexible than glass and have a low risk of damage.

However, a liquid crystal panel using a plastic substrate has a high temperature process requiring a high temperature of 200 ° C. or higher, particularly in the manufacture of an array substrate on which a thin film transistor as a switching element is formed. There is a difficulty in manufacturing the array substrate from a plastic substrate, so that only the color filter substrate constituting the upper substrate is manufactured from the plastic substrate, and the array substrate, the lower substrate, is used to manufacture a liquid crystal display device using a conventional glass substrate.

In order to solve this problem, a technique for manufacturing a flexible array substrate made of a plastic material has recently been proposed by performing a low temperature process below 200 ° C. using a low molecular organic material.

Hereinafter, a method of manufacturing a flexible array substrate using a plastic substrate undergoing a low temperature process of 200 ° C. or less will be described.

In forming a pixel including a thin film transistor at a low temperature process of 200 ° C. or less, the formation of a metal material, an insulating film, a protective layer, etc., which form an electrode and a wiring, may be performed by a low temperature deposition or coating method. Although it does not affect much, if the semiconductor layer forming the channel is formed by a low temperature process using silicon, which is a general semiconductor material, the durable structure is not dense, thereby causing problems such as deterioration of important characteristics such as electrical conductivity. Therefore, in order to overcome this, a semiconductor layer is formed using an organic material having semiconductor characteristics instead of a conventional semiconductor material such as silicon. Organic materials having such semiconductor characteristics are largely divided into high molecular semiconductor materials and low molecular semiconductor materials. Since the low molecular semiconductor materials have superior physical properties such as electrical conductivity, they are mainly used as semiconductor materials instead of silicon. It is very vulnerable to moisture, making it difficult to form a solution.

Hereinafter, a method of manufacturing a conventional flexible array substrate will be described with reference to the drawings.

FIG. 2 is a diagram illustrating the formation of a semiconductor layer using a low molecular organic semiconductor material during a process of manufacturing a conventional flexible liquid crystal display array substrate.                         

First, a metal material is deposited and patterned on the plastic substrate 50 to form a gate electrode 53 including a gate wiring (not shown), and successively over the gate wiring (not shown) and the gate electrode 53. The gate insulating layer 57 is formed on the entire surface by coating an organic insulating material on the entire surface.

Next, a separate semiconductor layer 60 is formed for each pixel so that the low molecular organic semiconductor material overlaps the gate electrode 53 by using an evaporation method using a shadow mask 70. . In the case of using a glass substrate, silicon is more precisely formed by depositing SiH ₄ using CVD (Chemical Vapor Deposition) method and patterning by using a mask. Is difficult to be deposited by the photolithography process in contact with water-containing photoresist or exposed to a developer or strip solution to develop or remove the photoresist. It is formed by an evaporation method using a patterned shadow mask 70 as shown as a problem that occurs.

However, the formation of the organic semiconductor material pattern by evaporation using the above-described shadow mask 70 has a limitation between the pattern spacing w2 and the size of the pattern itself. In more detail, in manufacturing the shadow mask 70 formed of a metal material, there is a problem that the width w1 or the length of the pattern should be at least 40 μm. That is, the opening of the shadow mask (70) is formed so that the width (w1) or length of at least 40㎛ or more, and also in the interval (w2) between the opening and the opening must be 120㎛ or more It is possible to manufacture a shadow mask 70. It is difficult to obtain a smaller pattern because the material cannot be blocked due to the property of evaporation even when a shadow mask having a smaller opening and a gap between the openings is manufactured. Accordingly, the low molecular organic semiconductor layer 60 formed on the substrate 50 using the shadow mask 70 having such a structure has a width or length of at least 40 μm. In the thin film transistor formed in the pixel, the size of the channel formed in the semiconductor layer is 10 μm or less, and in practice, reducing the volume or size of the semiconductor layer contributes to the improvement of the aperture ratio of the pixel except for such a channel region. In the case of active regions having the same size, the resolution increases as more pixels are formed in the same size, but as the resolution increases, the size of the pixel becomes smaller, and for example, the size of the thin film transistor formed inside the pixel should be smaller. In this case, it is obvious that the size of the channel is also reduced.

However, since the formation of the low molecular organic semiconductor layer pattern using the above-described shadow mask has a width or a length of 40 μm or more, there is a limitation in manufacturing a high resolution array substrate.

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a method of manufacturing an array substrate for a liquid crystal display device using a plastic substrate capable of forming a fine pattern that can control a small molecule organic semiconductor material to a few μm without using a shadow mask. The purpose is to provide.

According to an aspect of the present invention, there is provided a method of fabricating an array substrate for a flexible liquid crystal display device, the method including: forming a gate wiring and a gate electrode on the substrate; Forming a gate insulating film on the gate wiring and the gate electrode; Forming a low molecular organic semiconductor material layer over the gate insulating film; Forming a metal layer over the low molecular organic semiconductor material layer; Forming a photoresist layer over the metal layer; Exposing the photoresist layer using a mask including a slit region to extend the first photoresist pattern having a first thickness corresponding to a lower gate electrode and the first photoresist pattern, respectively, and extending left and right; Forming a second photoresist pattern of a second thickness thicker than the first photoresist pattern; Forming a semiconductor layer and a source drain metal layer by etching the metal layer exposed to the outside of the first and second photoresist patterns and the low molecular organic semiconductor material layer thereunder; Removing the first photoresist pattern on the source drain metal layer to expose the source drain metal layer corresponding to the gate electrode; Etching the exposed source drain metal layer to expose a portion of the lower semiconductor layer to form source and drain electrodes; Removing a second photoresist pattern on the source and drain electrodes; Forming a first passivation layer over the exposed source and drain electrodes; Patterning the first passivation layer to form a drain contact hole exposing a portion of the drain electrode; Forming a pixel electrode on the first passivation layer, the pixel electrode contacting the drain electrode through the drain contact hole.

In this case, the removing of the second photoresist pattern on the source and drain electrodes may include forming a second passivation layer on the entire surface including the exposed semiconductor layer and the second photoresist pattern; And removing the second photoresist pattern having the second passivation layer formed thereon by performing a strip off by a lift off method to expose the source and drain electrodes.

At this time, the second protective film is characterized in that the inorganic insulating material is formed by evaporation, the inorganic insulating material is preferably silicon oxide (SiO ₂ ).

In addition, the substrate is preferably made of plastic, and the method may further include attaching a rigid substrate having less warpage to the lower portion of the plastic substrate before forming the gate wiring and the gate electrode on the substrate. Do.

In addition, the gate insulating film is formed of an organic insulating material, the surface thereof is flat, and the organic low molecular weight semiconductor material layer is formed of pentacene.

In addition, the metal layer is preferably made of one material selected from gold (Au), silver (Ag), copper (Cu), molybdenum (Mo).

In addition, the first photoresist pattern is preferably removed by ashing, and the etching of the exposed source drain metal layer is characterized by a dry etching method.

In addition, the first passivation layer is preferably formed by depositing an inorganic insulating material or applying an organic insulating material.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

3 to 12 are cross-sectional views illustrating a method of manufacturing a flexible liquid crystal display array substrate using a plastic substrate according to an embodiment of the present invention.

Although not shown in the drawings, when the plastic substrate is used in the manufacture of the array substrate, since the warpage is severely generated during the conveyance process for the process progress due to its flexibility, it is attached to a rigid substrate having less warpage to prevent such occurrence. It is desirable to. At this time, the rigid substrate attached to the lower portion of the plastic substrate is not shown in the figure.

First, as shown in FIG. 3, the metal material is sputtered on the plastic substrate 101 in a low temperature process of 200 ° C. or lower to deposit the metal material on the entire surface to form a first metal layer (not shown). In this case, the first metal layer (not shown) is preferably formed of a metal material selected from gold (Au), silver (Ag), copper (Cu), and molybdenum (Mo). It is also possible to form a double layer by continuously depositing a metal material.

Next, a photoresist is applied over the deposited first metal layer (not shown), and a mask (not shown) having a transmissive region through which light passes and a blocking region through which light does not pass is exposed and exposed, and the exposure is performed. The developed photoresist is developed to form a photoresist pattern (not shown) in the portion where the gate wiring (not shown) and the gate electrode 105 should be formed. Thereafter, a gate material (not shown) and a gate electrode 105 are formed on the substrate 101 by etching the metal material exposed to the outside of the photoresist pattern (not shown). Although only one gate electrode is shown in the drawing only for the thin film transistor forming portion in one pixel region, the pixel region defined as the intersection of the gate wiring (not shown) and the data wiring (not shown) is formed on the array substrate. Many are formed. Thereafter, the photoresist pattern (not shown) remaining on the gate line (not shown) and the gate electrode 105 is removed by ashing or stripping.

Next, as shown in FIG. 4, an organic insulating material such as PVP (poly vinyl phenol), BCB (benzocyclobuten), or photoresist on the substrate 101 on which the gate wiring and the gate electrode 105 are formed. A gate insulating layer 108 is formed by coating a material selected from acryl on photoelectric surfaces. In this case, since the gate insulating layer 108 is formed as an organic insulating material, the surface of the gate insulating layer 108 is flat without being affected by the step difference between the lower gate wiring (not shown) and the gate electrode 105.

Next, a low molecular organic semiconductor material having excellent transmittance, for example, pentacene, is evaporated without a shadow mask on the front surface of the gate insulating layer 105 formed to have the flat surface in succession. A low molecular organic semiconductor layer 110 having a thickness is formed.

Next, the metal material selected from among gold (Au), silver (Ag), copper (Cu), and molybdenum (Mo), which are the same metal material as the gate electrode formed on the entire surface of the low molecular organic semiconductor layer 110, is 200. The second metal layer 115 is formed by depositing in a low temperature atmosphere of not more than ℃.

Next, as shown in FIG. 5, the photoresist layer 120 is formed on the entire surface of the second metal layer 115 to form a photoresist layer 120, and passes through the light transmitting area TA and the blocking area BA. A mask 170 having a slit region HTA capable of adjusting the amount of light is positioned so that the slit region HTA overlaps with the gate electrode and then performs diffraction exposure. In this case, the photoresist is preferably a positive (positive) having a characteristic that the portion to receive the light is removed during development.

The above-mentioned diffraction exposure means that the light passing between the slits is diffracted by adjusting the width and spacing of the slits forming the slit area HTA on the mask 70 so that the entire photoresist layer area corresponding to the semi-transmissive area HTA is diffracted. Although the light is irradiated to the light, the exposure method controls the reaction between the light and the photoresist by using a light that passes through the transmission region and is smaller than the intensity or amount of light irradiated to the photoresist layer. When the exposed photoresist is developed by diffraction exposure using a mask having a slit region HTA, a photoresist pattern having a different thickness can be formed.                     

Next, as shown in FIG. 6, the above-described diffraction exposure is performed on the photoresist layer 120 (FIG. 5), and then the development process of the exposed photoresist layer (120 of FIG. 5) is performed to perform the second metal layer ( 115, a first photoresist pattern 121a having a first thickness t1 is formed in a region corresponding to the lower gate electrode 105, and is in contact with the first photoresist pattern 121a at the same time. A second thickness t2 thicker than the thickness of the first photoresist pattern 212a having the first thickness is formed on the upper portion of the second metal layer 115 corresponding to the region extending to the left and right by the electrode 105. The second photoresist pattern 121b is formed.

Next, as shown in FIG. 7, in the substrate 101 on which the first and second photoresist patterns 121a and 121b having different thicknesses are formed, the outside of the first and second photoresist patterns 121a and 121b. 6 is removed by wet or dry etching to form the source drain metal layer 130 which is blocked by the first and second photoresist patterns and remains unetched. The low molecular organic semiconductor layer (110 of FIG. 6) exposed under the etched second metal layer (115 of FIG. 6) is removed by wet or dry etching to be blocked by the source drain metal layer 130 thereon. The low molecular organic semiconductor pattern 125 remaining without being etched is formed. In an embodiment of the present invention, pentacene is used as a low molecular organic semiconductor material. However, when wet etching, damage occurs in the durability structure due to moisture, but in the case of the present invention, the source is disposed on top of the source even when wet etching is performed. Since the drain metal layer 130 and the first and second photoresist patterns 121a and 121b are formed, in particular, the region ch forming the channel is not damaged by the etchant and only the side portions at both ends of the semiconductor pattern 125 are formed. Due to exposure to the etchant, the deterioration of characteristics of the semiconductor pattern 125 does not occur. However, it is more preferable to pattern the low molecular organic semiconductor layer (115 in FIG. 6) through dry etching using plasma rather than wet etching using an etching solution.

Next, as shown in FIG. 8, an ashing process is performed on the substrate 101 on which the low molecular organic semiconductor pattern 125 and the source drain metal layer 130 are formed to form a thin first photoresist pattern (FIG. 7). A portion of the source drain metal layer 130 below is exposed by removing 121a). In this case, the second photoresist pattern 121b connected to both ends of the first photoresist pattern 121a may also be ashed together with the thickness of the first photoresist pattern 121a of FIG. 7. (t2-t1) becomes thin.

Next, as shown in FIG. 9, the source drain metal layer 130 (FIG. 8) exposed between the second photoresist pattern 121b is etched to expose the channel forming portion ch of the lower molecular organic semiconductor pattern. . In this case, the source drain metal layer 130 (refer to FIG. 8) is separated by removing the exposed portions to form source and drain electrodes 133a and 133b, respectively. (Not shown). Etching the source drain metal layer 130 (in FIG. 8) exposed between the second photoresist pattern 121a may be performed by dipping the substrate 101 on which the source drain metal layer 130 (in FIG. 8) is formed into an etchant or the etching solution. Rather than the wet etching method of spraying the etchant on the surface of the substrate 101, it is preferable to proceed by removing the dry etching method using plasma or the like. This is because the low molecular organic semiconductor pattern 125, which forms the channel part ch, may come into contact with the etchant and be damaged by moisture.

Thereafter, the second photoresist pattern 121b remaining on the source and drain electrodes must be removed by ashing or stripping. However, in order to remove the second photoresist pattern 121b remaining on the source and drain electrodes 133a and 133b in the above-described state, that is, the semiconductor pattern 125 is exposed, an ashing or a strip ( When the strip process is performed, the semiconductor pattern 125, that is, the channel part ch, exposed between the source and drain electrodes 133a and 133b is damaged by ashing or is in contact with a strip liquid. Can be damaged. Therefore, the second photoresist pattern 121b is removed without damaging the semiconductor pattern 125 by proceeding as described below.

As shown in FIG. 10, an inorganic insulating material such as silicon oxide (SiO ₂ ) is formed on the entire surface of the substrate 101 including the exposed low molecular organic semiconductor pattern 125 on the substrate 101 on which the source and drain electrodes 133a and 133b are formed. E) is deposited to form the first passivation layer 140. In this case, the formation of the layer by the deposition method has a very low deposition rate on the side portion of the stepped portion due to the deposition characteristics, so that the thickness is formed very thin, or when the step is more than a certain threshold, the side of the flat portion and the stepped portion In this case, the breakage of the deposited material occurs. Accordingly, the first passivation layer 140 is formed on the entire surface of the substrate 101 as illustrated, and an inorganic insulating material is formed on side surfaces of the source and drain electrodes 133a and 133b including the second photoresist pattern 121b. It is characterized by not being deposited. The reason why the first passivation layer 140 is formed on the entire surface is because a strip process or ashing is performed to remove the second photoresist pattern 121b remaining on the substrate 101 in a later process. This is to prevent damaging the channel portion (ch) of the low molecular organic semiconductor pattern 125 exposed to the strip liquid.

Next, as shown in FIG. 11, the first passivation layer 140 has the second remaining on the source and drain electrodes 133a and 133b and the data line (not shown) in the substrate 101 formed on the entire surface. A strip process is performed to remove the photoresist pattern (121b of FIG. 10). In this case, the strip liquid is formed on the second photoresist pattern (121b of FIG. 10) in which the first passivation layer 140 is hardly formed and on the side surfaces of the source and drain electrodes 133a and 133b thereunder. 10 penetrates into the contact surface of the resist pattern (121b of FIG. 10), the source and drain electrodes 133a and 133b, and the data line (not shown), and melts the second photoresist pattern (121b of FIG. 10). The first protective layer 140 is separated from the 133a and 133b and the data line (not shown). This method is called a lift off method.

Next, as shown in FIG. 12, an organic insulating material or an inorganic insulating material is deposited on the entire surface of the substrate 101 including the exposed source and drain electrodes 133a and 133b and a data line (not shown). As a result, the second passivation layer 145 is formed, and the second passivation layer 145 is successively patterned to form a drain contact hole 150 exposing a part of the drain electrode 133b.

Next, the pixel electrode 155 is in contact with the drain electrode 133b through the drain contact hole 150 by depositing and patterning a transparent conductive material over the second passivation layer 145 on which the drain contact hole 150 is formed. The array substrate is completed by forming.

The method for manufacturing an array substrate for a liquid crystal display device using a plastic substrate according to the present invention provides a method capable of patterning a low molecular organic semiconductor material, which is vulnerable to moisture, photoresist, and strip liquid, to several micrometers in forming a low molecular organic semiconductor material. There is an effect of providing an array substrate for a liquid crystal display device using an aperture ratio and a high resolution plastic substrate.

Claims (12)

Forming a gate wiring and a gate electrode on the substrate; Forming a gate insulating film on the gate wiring and the gate electrode; Forming a low molecular organic semiconductor material layer over the gate insulating film; Forming a metal layer over the low molecular organic semiconductor material layer; Forming a photoresist layer over the metal layer; Exposing the photoresist layer using a mask including a slit region to extend the first photoresist pattern having a first thickness corresponding to a lower gate electrode and the first photoresist pattern, respectively, and extending left and right; Forming a second photoresist pattern of a second thickness thicker than the first photoresist pattern; Forming a semiconductor layer and a source drain metal layer by etching the metal layer exposed to the outside of the first and second photoresist patterns and the low molecular organic semiconductor material layer thereunder; Removing the first photoresist pattern on the source drain metal layer to expose the source drain metal layer corresponding to the gate electrode; Etching the exposed source drain metal layer to expose a portion of the lower semiconductor layer to form source and drain electrodes; Removing a second photoresist pattern on the source and drain electrodes; Forming a first passivation layer over the exposed source and drain electrodes; Patterning the first passivation layer to form a drain contact hole exposing a portion of the drain electrode; Forming a pixel electrode on the first passivation layer and in contact with the drain electrode through the drain contact hole Method for manufacturing a flexible array array substrate for a liquid crystal display device comprising a. The method of claim 1, Removing the second photoresist pattern on the source and drain electrodes may include forming a second passivation layer on an entire surface including the exposed semiconductor layer and the second photoresist pattern; Exposing the source and drain electrodes by removing the second photoresist pattern having the second passivation layer formed thereon by performing a strip off process by a lift off method. Method for manufacturing a flexible array array substrate for a liquid crystal display device comprising a. The method according to claim 1 or 2, The substrate is a plastic, the method of manufacturing an array substrate for a liquid crystal display device. The method of claim 3, wherein And attaching a rigid substrate having less warpage to the lower portion of the plastic substrate before forming the gate wiring and the gate electrode on the substrate. The method according to claim 1 or 2, The method of manufacturing an array substrate for a flexible liquid crystal display device, wherein the gate insulating film is formed of an organic insulating material. The method according to claim 1 or 2, The method of manufacturing an array substrate for a flexible liquid crystal display device, wherein the organic low molecular weight semiconductor material layer is formed of pentacene. The method according to claim 1 or 2, The metal layer is a manufacturing method of an array substrate for a flexible liquid crystal display device comprising a material selected from gold (Au), silver (Ag), copper (Cu), molybdenum (Mo). The method according to claim 1 or 2, The first photoresist pattern is removed by an ashing (ashing) method of manufacturing an array substrate for a flexible liquid crystal display device. The method according to claim 1 or 2, And etching the exposed source drain metal layer by a dry etching method. The method of claim 2, And the second passivation layer is formed of an inorganic insulating material by vapor deposition. The method of claim 10, The inorganic insulating material is silicon oxide (SiO ₂ ) A manufacturing method of an array substrate for a flexible liquid crystal display device. The method according to claim 1 or 2, The first protective film is a method of manufacturing an array substrate for a flexible liquid crystal display device formed by depositing an inorganic insulating material or applying an organic insulating material.

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