KR101377673B1 - Array substrate for liquid crystal display device and method of fabricating the same - Google Patents

Abstract

In the present invention, the source electrode and the drain electrode formed spaced apart from each other on the substrate; An organic semiconductor layer formed between the source electrode and the drain electrode; A gate insulating layer on the organic semiconductor layer and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; An organic thin film transistor including a gate electrode formed on the gate insulating layer is provided.

Description

ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME}

1 is an exploded perspective view of a general liquid crystal display device.

2 is a plan view of an array substrate for a liquid crystal display device including a top gate structure organic thin film transistor according to the present invention;

3 is a cross-sectional view taken along the line III-III of FIG. 2;

4A through 4F are cross-sectional views illustrating manufacturing steps of one pixel area including an organic thin film transistor and a storage capacitor of an array substrate for an LCD device having an organic semiconductor layer according to the present invention.

5 is a schematic cross-sectional view of an array substrate for a liquid crystal display device including a bottom gate structure organic thin film transistor according to an embodiment of the present invention.

6 is a schematic cross-sectional view of an array substrate for a liquid crystal display device including a bottom gate structure organic thin film transistor according to an embodiment of the present invention.

FIG. 7 illustrates a mobility graph and an S factor associated with Table 7 according to an embodiment of the present invention. FIG.

8 shows an on / off ratio graph associated with Table 7 in accordance with an embodiment of the present invention.

Description of the Related Art

101 substrate 113 source electrode

115: drain electrode 118: pixel electrode

121: organic semiconductor layer 125: gate insulating film

130: gate electrode 135: protective layer

137: gate contact hole 146: gate wiring

OP: Open part P: Pixel area

StgC: Storage Capacitor Tr: Organic Thin Film Transistor

TrA: switching area

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using an organic semiconductor material and a method of manufacturing the same.

In recent years, as the society enters the information age, the display field that processes and displays a large amount of information has been rapidly developed, and recently, the thin film transistor (Thin) having excellent performance of thinning, light weight, and low power consumption has recently been developed. Film Transistor (TFT) type liquid crystal display (TFT-LCD) has been developed to replace the existing cathode ray tube (CRT).

The image realization principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. As is well known, the liquid crystal has a thin and long molecular structure and optical anisotropy having an orientation in an array, and when placed in an electric field, the liquid crystal has an orientation of molecular arrangement depending on its size. This change is polarized. The liquid crystal display is an essential component of a liquid crystal panel formed by bonding an array substrate and a color filter substrate formed with pixel electrodes and common electrodes facing each other with the liquid crystal layer interposed therebetween. A non-light emitting device that artificially adjusts the arrangement direction of liquid crystal molecules by changing electric fields between these electrodes and displays various images by using the light transmittance that is changed at this time.

Recently, the active matrix type, in which pixels, which are the basic units of image expression, are arranged in a matrix manner, and switching elements are arranged in each pixel, is controlled to have excellent attention in terms of resolution and video performance. In addition, thin film transistors (TFTs) are well known as TFT-LCDs (Thin Firm Transistor Liquid Crystal Display devices).

In more detail, as shown in FIG. 1, which is an exploded perspective view of a general liquid crystal display device, the array substrate 10 and the color filter substrate 20 face each other with the liquid crystal layer 30 interposed therebetween. The array substrate 10 includes a plurality of gate wirings 14 and data wirings 16 vertically and horizontally arranged on the first transparent substrate 12 and an upper surface thereof to define a plurality of pixel regions P. The thin film transistor Tr is provided at the intersection of the two wires 14 and 16 and is connected one-to-one with the pixel electrode 18 provided in each pixel region P. FIG.

Also, the upper color filter substrate 20 facing the second transparent substrate 22 and the rear surface of the color filter substrate 20 cover the non-display area such as the gate line 14, the data line 16, and the thin film transistor Tr. A grid-like black matrix 25 is formed around each pixel region P, and the red, green, and blue sub color filters 26a, which are sequentially and repeatedly arranged in correspondence with the pixel region P, are formed in the grid. A color filter layer 26 including 26b and 26c is formed, and a transparent common electrode 28 is provided over the entire surface of the black matrix 25 and the red, green, and blue color filter layers 26.

Although not clearly shown in the drawings, these two substrates 10 and 20 are each sealed with a sealing agent or the like along the edges to prevent leakage of the liquid crystal layer 30 interposed therebetween. An upper and lower alignment layer is provided at the boundary between the substrates 10 and 20 and the liquid crystal layer 30 to provide reliability in the molecular alignment direction of the liquid crystal, and at least one outer surface of each of the substrates 10 and 20 has a polarizing plate. Attached.

In addition, a backlight is provided on the back of the liquid crystal panel to supply light. The on / off signal of the thin film transistor T is sequentially scanned and applied to the gate wiring 14. When the image signal of the data line 16 is transmitted to the pixel electrode 18 of the pixel region P, the liquid crystal molecules are driven by the vertical electric field therebetween, and various images are displayed due to the change in the transmittance of light. can do.

Meanwhile, in the liquid crystal display device, glass substrates have been traditionally used for the first and second insulating substrates 12 and 22, which are the matrixes of the array substrate 10 and the color filter substrate 20. As small portable terminals such as personal digital assistants (PDAs) are widely used, liquid crystal panels using plastic substrates have been introduced that are lighter, lighter, and more flexible than glass so that they can be applied to them.

However, a liquid crystal panel using a plastic substrate has a high temperature process requiring a high temperature of 200 ° C. or higher, especially in the manufacture of an array substrate on which a thin film transistor as a switching element is formed. There is a difficulty in manufacturing the array substrate from a plastic substrate.

In order to solve this problem, a technique for manufacturing an array substrate, which is characterized by forming a thin film transistor by performing a low temperature process below 200 ° C. using an organic semiconductor material, has recently been proposed. The manufacturing of the array substrate by the low temperature process mainly uses a coating apparatus, and thus, the initial equipment investment cost is very low than the manufacturing using expensive vacuum deposition equipment, resulting in a reduction in manufacturing cost. . Naturally, the present invention is not limited to manufacturing using a plastic substrate using such an organic semiconductor material, and can be manufactured using a glass substrate.

Hereinafter, a method of manufacturing an array substrate using an organic semiconductor material having a low temperature process of 200 ° C. or less will be briefly described.

In forming a pixel including a wiring and a thin film transistor at a low temperature process of 200 ° C. or lower, the characteristics of the thin film transistor may be formed even by forming a low temperature deposition or coating method such as forming a metal material and a protective layer. In the case of a semiconductor layer that forms a channel that serves as a carrier movement path therein, it is formed by depositing it in a low temperature process below 200 ° C. using amorphous silicon, which is a commonly used semiconductor material. Since the internal structure is not dense, important characteristics such as mobility sharply deteriorate.

Therefore, in order to overcome this, it is proposed to form an organic semiconductor layer using an organic material having semiconductor characteristics instead of a conventional semiconductor material such as amorphous silicon. However, the organic semiconductor material constituting the organic semiconductor layer, in particular, an organic semiconductor material having a property of being formed into a coating type is vulnerable to a developer or an etching solution, and the device properties may be degraded when exposed to it.

Recently, the organic semiconductor layer, the gate insulating film, and the gate electrode are simultaneously patterned in a form having a top gate structure different from a thin film transistor having a bottom gate structure formed on an array substrate for a liquid crystal display device using general amorphous silicon. Array substrates for liquid crystal displays have been proposed.

On the other hand, in the case of the bottom gate structure or the top gate structure organic thin film transistor, since the thickness of the gate insulating film in addition to the organic semiconductor layer greatly influences the characteristics of the thin film transistor, it is necessary to optimize the thickness. For example, when the gate insulating film is formed to be 1,000 Å or less, the gate insulating film may be ruptured at a later process, resulting in a problem of insulation breakdown. On the contrary, when the gate insulating film is formed too thick in consideration of such a phenomenon of the gate insulating film bursting, there is a problem in that device characteristics are degraded.

SUMMARY OF THE INVENTION An object of the present invention is to optimize the thickness of a gate insulating film made of an organic insulating material capable of improving device characteristics without breakdown in an array substrate for an liquid crystal display device having an organic thin film transistor using an organic semiconductor layer.

Accordingly, an object of the present invention is to provide an array substrate for a liquid crystal display device having a uniform device characteristic and having a more stable organic thin film transistor.

In order to achieve the above object, in a first aspect of the invention, a source electrode and a drain electrode formed spaced apart from each other on the substrate; An organic semiconductor layer formed between the source electrode and the drain electrode; A gate insulating layer on the organic semiconductor layer and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; An organic thin film transistor including a gate electrode formed on the gate insulating layer is provided.

The organic semiconductor layer has an end portion overlapping with the source and drain electrodes, respectively, and the gate insulating film has an end portion overlapping with the source and drain electrodes, respectively, and the gate electrode and the gate The insulating film and the organic semiconductor layer are characterized in that they have the same pattern.

The gate insulating film has a thickness of 2,000 angstroms to 2,500 angstroms, and the organic insulating material is fluoropolymer, polyvinyl alcohol (PVA), and polyvinylpyridine (PVP). Characterized by including one.

And a buffer layer positioned between the source electrode and the substrate and between the drain electrode and the substrate, wherein the buffer layer comprises silicon oxide (SiOx).

In a second aspect of the present invention, there is provided a semiconductor device comprising: a gate electrode formed on a substrate; A gate insulating layer on the gate electrode and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; An organic semiconductor layer formed on the gate insulating layer; An organic thin film transistor is provided in contact with the organic semiconductor layer and including a source and a drain electrode spaced apart from each other.

Further comprising a protective layer located on the organic semiconductor layer, characterized in that the protective layer and the organic semiconductor layer having the same pattern, the protective layer is made of a photosensitive material, the photosensitive material Is characterized in that it comprises one of polyvinyl alcohol (polyvinylalcohol (PVA), photoacryl) and benzocyclobutene (BCB).

The source and drain electrodes may be positioned on an upper surface of the passivation layer and on both sides of the passivation layer and the organic semiconductor layer. The source and drain electrodes may be located on an upper surface of the gate insulating layer. The gate insulating film has a thickness of 2,000 angstroms to 2,500 angstroms.

An end portion of the organic semiconductor layer is in contact with the source and drain electrodes.

In a third aspect of the invention, there is provided a method, comprising: forming a source electrode and a drain electrode spaced apart from each other on a substrate; Forming an organic semiconductor layer between the source electrode and the drain electrode; Forming a gate insulating layer on the organic semiconductor layer and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; It provides a method of manufacturing an organic thin film transistor comprising forming a gate electrode on the gate insulating film.

The method may further include forming a buffer layer between the source electrode and the substrate and between the drain electrode and the substrate. The forming of the organic semiconductor layer may include an ink-jet device and a nozzle coating. ), A bar coating apparatus, a slit coating apparatus, a spin coating apparatus, and a printing apparatus. The method may further include curing a material, further comprising forming a protective layer on the gate electrode, the gate insulating layer, and the organic semiconductor layer.

According to a fourth aspect of the present invention, a data line formed in a first direction on a substrate, a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed between the source electrode and the drain electrode; A gate insulating layer on the organic semiconductor layer and formed of an organic insulating material, the gate insulating layer having a thickness in a range of 1,800 angstroms to 2,500 angstroms; A gate electrode formed on the gate insulating film; A pixel electrode on the substrate and in contact with an end of the drain electrode; A protective layer on the gate electrode, the protective layer having an open portion exposing the pixel electrode and a contact hole exposing a portion of the gate electrode; An array substrate for a liquid crystal display device includes a gate line connected to the gate electrode through the contact hole and formed in a second direction crossing the first direction.

And another protective layer formed on the gate line, wherein the gate insulating layer has a thickness of 2,000 angstroms to 2,500 angstroms.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 2 is a plan view of an array substrate for a liquid crystal display device including a top gate structure organic thin film transistor according to the present invention, and FIG. 3 is a cross-sectional view taken along the cutting line III-III of FIG. Gate structure A cross-sectional view of an organic thin film transistor is shown. In this case, for convenience of description, a region in which the organic thin film transistor Tr is formed in the pixel region P is defined as a switching region TrA and a region in which the storage capacitor StgC is formed is a storage region StgA.

First, referring to FIG. 2, as illustrated, the gate wiring 146 extends in one direction on the substrate 101 and intersects with the gate wiring 146 to define the pixel region P. Referring to FIG. The wiring 110 is formed.

In addition, the source electrode 113 is formed at the intersection of the two wirings 146 and 110 in a form branched from the data wiring 110, and is spaced apart from the source electrode 113 and the drain electrode 115 is formed. The gate electrode 130 is formed to cover the spaced regions of the two electrodes 113 and 115 including the source electrode 113 and the drain electrode 115 and branch from the gate wiring 146. It is.

In this case, a semiconductor layer (not shown) and a gate insulating layer (not shown) made of an organic semiconductor material are formed below the gate electrode 130, and contact each end of the drain electrode 115 to form a pixel region ( Independent pixel electrodes 118 are formed for each P).

In this case, the pixel electrode 118 is partially overlapped with a portion of the gate wiring 146 at the front end, so that the overlapped pixel electrode and the gate wiring form first and second storage electrodes, respectively, and are formed between the two electrodes. A storage capacitor StgC is formed along with a protective layer (not shown).

Hereinafter, a cross-sectional structure of an array substrate for a liquid crystal display device according to the present invention will be described with reference to FIG. 3.

As illustrated, the data line 110 and the switching region TrA are positioned on the transparent insulating substrate 101 and are spaced apart from the source electrode 113 in a form branched from the data line 110. The drain electrode 115 is formed.

In the pixel region P, a pixel electrode 118 is formed on the substrate 101 to contact one end of the drain electrode 115 and is formed of a transparent conductive material. In the switching region TrA, An organic semiconductor layer 121 made of an organic semiconductor material is formed in contact with one end of each of the source and drain electrodes 113 and 115 facing each other, and corresponding to the spaced regions of the two electrodes 113 and 115. An organic insulating material having the same shape on the organic semiconductor layer 121 and not affecting each other when contacted with the organic semiconductor layer 121, for example, fluoropolymer and polyvinyl alcohol (PVA). ) And a gate insulating layer 125 made of any one of polyvinylpyridine (PVP).

In addition, a gate electrode 130 is formed on the gate insulating layer 125, and a protective layer 135 is formed on the gate electrode 130. The protective layer 135 may be made of a photosensitive material such as polyvinylalcohol (PVA), photoacryl, or benzocyclobutene (BCB).

In this case, the protective layer 135 includes a gate contact hole 137 exposing the gate electrode 130 in the switching region TrA. Most of the pixel electrodes 118 correspond to the pixel region P. An open part OP for exposing the light is provided.

In addition, a gate wiring 146 is formed on the passivation layer 135 having the gate contact hole 137 and the open part OP to contact the gate electrode 130 through the gate contact hole 137. As a result, the array substrate 101 for the liquid crystal display device having the organic thin film transistor Tr according to the present invention is completed.

Although not shown through FIG. 3, as shown in FIG. 2, the gate line 146 is disposed to cross the data line 110.

Although not shown in the drawings, before the organic thin film transistor is formed on the substrate, the organic semiconductor layer 121 contacts the substrate 101 with an inorganic insulating material such as silicon oxide (SiOx) over the entire surface of the substrate 101. A buffer layer (not shown) may be further formed in order to improve contact characteristics thereof with the second protection layer, and a second protective layer may be formed on the gate wiring 146 to prevent corrosion of the gate wiring 146. It may be.

In the array substrate 101 for a liquid crystal display device having such a structure, the gate insulating film 125 is formed as a thickness (t = 4,500 kV) of about 4,500 kV, as in a thin film transistor using general amorphous silicon as a semiconductor layer. In one case (comparative example), as shown in Table 1 below, it can be seen that the electric field formation characteristics are poor according to the gate voltage.

Table 1 shows the result of measuring the characteristics of the thin film transistor Tr when the gate insulating film 125 made of an organic material formed on the organic semiconductor layer 121 is formed to a thickness of 4,500 Å. The samples 1, 2, 3, and 4 are distinguished from those measured by different organic thin film transistors on one substrate.

In Table 1, mobility indicates an average carrier moving speed in the organic semiconductor layer 121, and a sub-threshold swing (S-factor) shows drain current characteristics with respect to a gate voltage. In the graph, an inverse value of the slope in a section used as a switching element, i.e., a section (active region) in which the magnitude of the drain current increases in proportion to the applied gate voltage, is on and off. ) Ratio represents the value of the on current I _{on versus the} off current I _off , indicating the switching capability. In the case of mobility, the larger the value, the smaller the value in the case of the S-factor, the larger the on / off ratio, the better the characteristics as the switching element.

In this case, as in the comparative example, when the thickness (t) of the gate insulating film 125 is formed to about 4500 kPa as in the thin film transistor using general amorphous silicon as a semiconductor layer, the average mobility is 0.16 cm 2 / V. sec, the S-factor is 2.59, and the on / off ratio is 8.86E + 04. Device characteristics of the organic thin film transistor having the structure as described above including the organic semiconductor layer, for example, mobility, sub-threshold swing (S-factor) and on / off ratio characteristics This is substantially falling compared to the thin film transistor having a semiconductor layer of amorphous silicon through a high temperature process, it can be seen that it is necessary to further improve the device characteristics while having an organic semiconductor layer.

Therefore, in the present invention, in order to improve the characteristics of the organic thin film transistor (Tr) serving as a switching element, the thickness t of the gate insulating film 125 is formed to be 1,800 kPa to 2,500 kPa. .

In this case, when formed with an organic insulating material, fluoropolymer (fluoropolymer), polyvinylalcohol (PVA) and polyvinylpyridine (PVP) to a thickness of less than 1,000Å, experimental frequent insulation Fracture occurred and resulted in shortening the lifespan of the device, and when formed to a thickness of more than 2,500 소자 it was found that the device characteristics are reduced.

Tables 2 and 3 show the characteristic values of the organic thin film transistor Tr in the array substrate 101 having the organic thin film transistor according to the present invention. The thickness of the gate insulating film 125 is 2,500Å and 1,800Å, respectively. Tables 2 to 6 show the critical meanings of about 1,800, to about 2,500 Å thickness of the gate insulating film 125, and show 3,000 Å, 2,500 Å, 2,000 Å, 1,800 Å, The mobility, the factor and the on / off ratio of the gate insulating film having a thickness of 1,000 mW were measured and the values are as shown in Tables 2 to 6 below. (Table 2: 3,000 Hz, Table 3: 2500 Hz, Table 4: 2,000 Hz, Table 5: 1,800 Hz, Table 6: 1,000 Hz)

For example, when the gate insulating film 125 made of the organic insulating material is formed to have a thickness of 2,500 kW (t = 2,500 kW), the thin film transistor Tr has an average mobility of 0.2 cm 2 / Vsec and S. It can be seen that the S-factor has a characteristic value of 1.70 and an on / off ratio of 3.38E + 05, and the gate insulating film 125 has a thickness of 1,800 ((t = 1,800 Å). Thin film transistor (Tr) has an average mobility of 0.2 cm2 / Vsec, an S-factor of 1.40, and an on / off ratio of 1.08E + 05. It can be seen that

The characteristic value of the organic thin film transistor (Tr) according to the present invention and the characteristic value of the conventional organic thin film transistor which forms a thickness of the gate insulating film of about 4,500 kPa (mobility: 1.6 cm 2 / Vsec, S-factor 2.59, Compared to the on / off ratio of 8.86E + 04), the mobility of both of the present inventions was about 0.14 cm 2 / Vsec faster, and the S-factor was 0.99, respectively. , 1.19 can be seen that the smaller. In addition, in the on / off ratio, it was a value having an order of about 10 ^{4 in the} prior art, but it can be seen that the present invention has an order of about 10 ⁵ .

Table 7 contains the respective average values of mobility, factor, and on / off ratio at respective thicknesses of 4,500 Hz, 3,000 Hz, 2,500 Hz, 2,000 Hz, 1,800 Hz, and 1,000 Hz. In this regard, FIGS. 7 and 8 illustrate the critical range of the thickness of the gate insulating film according to the present invention, in which FIG. 7 shows a mobility graph and an S factor graph associated with Table 7, and FIG. 8 is associated with Table 7. Display on / off graph.

Considering the characteristics of the gate insulating film and Tables 1 to 7 and FIGS. 7 and 8, the critical range of the gate insulating film thickness is preferably about 1,800 kPa to about 2,500 kPa, and more preferably 2,000 kPa to 2,500 Å.

Therefore, in the case of a switching device, the faster the mobility, the smaller the S-factor and the larger the on / off ratio, the better the device characteristics. It can be seen that the characteristics of the organic thin film transistor have been greatly improved.

In the organic thin film transistor Tr having such a structure, the thickness of the other components except for the gate insulating layer 125 is not mentioned. Only the gate insulating layer 125 changes the characteristics of the thin film transistor Tr with respect to the thickness change. This is because the thickness of the gate electrode 130, the source and drain electrodes 113 and 115, and the protective layer 135 are not changed, but the characteristics of the thin film transistor Tr are not affected.

Hereinafter, a method of manufacturing an array substrate for a liquid crystal display device including an organic thin film transistor having such a structure will be briefly described.

4A to 4F are cross-sectional views illustrating manufacturing steps of one pixel area including a switching device of an array substrate for a liquid crystal display device having an organic semiconductor layer using a liquid organic semiconductor material according to an exemplary embodiment of the present invention.

First, as shown in FIG. 4A, a metal layer (not shown) is formed by depositing a low-resistance metal material such as gold (Au) on the transparent insulating substrate 101, and applying the photoresist and using a mask. A data line (not shown) extending in one direction by patterning by performing a mask process including predetermined steps such as exposure, development of photoresist, etching of the metal layer (not shown), and stripping of photoresist; A source electrode 113 connected to the data line (not shown) and a drain electrode 115 having a shape spaced apart from the source electrode 113 and facing each other are formed for each region.

Next, as shown in FIG. 4B, a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc- is formed over the spaced source and drain electrodes 113 and 115 and the data line (not shown). By depositing oxide (IZO) on the entire surface and patterning the oxide (IZO), a pixel electrode 118 is formed in contact with the drain electrode 115 for each pixel region P.

Next, as shown in FIG. 4C, a liquid organic semiconductor material, for example, a liquid pentacin, is disposed on the data line (not shown), the source and drain electrodes 113 and 115, and the pixel electrode 117. pentacene, polythiophene, or P3HT (poly-3-hexylthiophene) into inkjet device, nozzle coating device, bar coating device, slit coating device, spin coating device Alternatively, the organic semiconductor material layer 120 may be formed by coating the entire surface using a printing device, and the organic insulating material such as fluoropolymer, polyvinyl alcohol, etc. may be continuously formed on the organic semiconductor material layer 120. Any one of polyvinylalcohol (PVA) and polyvinylpyridine (PVP) may be used in the above-described inkjet apparatus, nozzle coating apparatus, bar coating apparatus, slit coating apparatus, spin coating apparatus or Using a printing device By putting a gate insulating material layer 124. At this time, the gate insulating material layer 124 is finally formed so that the thickness (t) is 1,800Å to 2,500Å. In this case, the thickness of the gate insulating material layer 124 in the first coated state may be substantially thicker than 1,800 kPa to 2,500 kPa described above, but it is typically 10-20 when drying and curing the organic material layer made of organic material. Since a thickness reduction of% occurs, the coating layer of the organic insulating material may be formed to have a final thickness of 1,800 kPa to 2,500 kPa when it is dried and cured in consideration of the thickness decrease.

Next, a metal material such as molybdenum (Mo) or the like that is easily etched on the gate insulating material layer 124 having a thickness (t) of 1,800 kPa to 2,500 kPa on the front surface of the organic semiconductor material layer 120. The second metal layer 129 is formed by depositing chromium (Cr). Next, as shown in FIG. 4D, a photoresist pattern (not shown) is formed by applying photoresist onto the second metal layer (129 of FIG. 4C), exposing and developing the photoresist pattern (not shown). The second metal layer 129 of FIG. 4C, the gate insulating material layer 124 of FIG. 4C, and the organic semiconductor material layer exposed to the outside of the photoresist pattern (not shown) by performing dry etching using an etching mask is performed. By simultaneously removing 120 of FIG. 4C, an island-shaped gate electrode 130 is formed in the switching region TrA, and at the same time, a thickness of 1,800 Å to 2,500 갖는 having the same pattern shape under the gate electrode 130 is obtained. The gate insulating film 125 and the organic semiconductor layer 121 are formed.

Next, as shown in FIG. 4E, the gate contact hole 137 and the pixel region exposing a portion of the gate electrode 130 are coated by applying an organic insulating material on the entire surface of the gate electrode 130 and patterning it. A protective layer 135 having an open part OP exposing most of the pixel electrodes 118 in P is formed. Next, as shown in FIG. 4F, a low resistance metal material such as gold (Au) is deposited on the passivation layer 135 having the gate contact hole 137 and the open part OP to form a third metal layer. And patterning the mask by proceeding the mask process to form a gate wiring 146 in contact with the gate electrode 130 through the gate contact hole 137 and intersecting with the data wiring (not shown). The array substrate 101 for liquid crystal display device having the thin film transistor Tr is completed. In this case, the gate wiring 146 is formed to overlap the pixel electrode 118 and a part thereof to include the overlapping gate wiring 146 and the pixel electrode 118 and the protective layer 135 formed therebetween. Make a storage capacitor (StgC). Although not shown in the drawings, an organic insulating material, for example, polyvinylalcohol (PVA), photo acryl, and benzocyclobutene (BCB) may be coated on the gate wiring 146 to protect the second. Layers (not shown) may be further formed.

FIG. 5 is a schematic cross-sectional view of an array substrate for a liquid crystal display device including a bottom gate structure organic thin film transistor according to an exemplary embodiment of the present invention, and illustrated with an organic thin film transistor structure.

As illustrated, a gate electrode 202 is formed on the substrate 200, and a gate insulating film 204 having a predetermined thickness range is formed in an area covering the gate electrode 202, and the gate insulating film 204 is formed. The source and drain electrodes 206 and 208 are disposed on the upper portion of the upper portion). In this case, a spaced region between the source and drain electrodes 206 and 208 corresponds to a region corresponding to the center of the gate electrode 202. The organic semiconductor layer 210 and the protective layer 212 are sequentially formed at positions corresponding to the center of the gate electrode 202 in the spaced apart region between the source and drain electrodes 206 and 208. The pixel electrode 216 is formed in direct contact with the drain electrode 210.

The gate electrode 202, the source and drain electrodes 206 and 208, and the organic semiconductor layer 210 form an organic thin film transistor Tr.

That is, in the present embodiment, a structure in which the source and drain electrodes 208 and 210 are formed before the organic semiconductor layer 212 and the protective layer 214 is described.

Next, the structure in which the organic semiconductor layer 212 and the protective layer 214 are formed before the source and drain electrodes 208 and 210 will be described. In addition, another passivation layer may be formed over the entire region except for the pixel electrode 216 region.

6 is a schematic cross-sectional view of an array substrate for a liquid crystal display device including a bottom gate structure organic thin film transistor according to an exemplary embodiment of the present invention.

As illustrated, a gate electrode 302 is formed on the substrate 300, a gate insulating film 304 is formed in an area covering the gate electrode 302, and a gate electrode (or an upper portion of the gate insulating film 304). The organic semiconductor layer 306 and the protective layer 308 are sequentially stacked at positions corresponding to the 302. The organic semiconductor layer 306 and the protective layer 308 have a pattern structure corresponding to each other, and the pixel electrode 310 is formed to be spaced apart from the organic semiconductor layer 306 and the protective layer 308 to some extent. have.

The gate electrode 202, the source and drain electrodes 206 and 208, and the organic semiconductor layer 210 form an organic thin film transistor Tr.

In addition, source and drain electrodes 312 and 314 are formed along the upper side surfaces, the side surfaces, and the surface of the gate insulating layer 304 of the organic semiconductor layer 306 and the protective layer 308, and in particular, the drain electrode. One end of the 314 is formed in direct contact with the pixel electrode 310. In addition, another passivation layer may be formed over the entire region except for the pixel electrode 310 region.

In the bottom gate structured organic thin film transistors shown in FIGS. 5 and 6, the material forming each component may be applied in the same manner as the bottom gate structured organic thin film transistor. In particular, the predetermined thickness range of the gate insulating film may be selected from 1,800 kW to 2,500 kW, which is a range capable of improving device characteristics without dielectric breakdown, as mentioned above.

However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

As described above, according to an array substrate for a liquid crystal display device using an organic semiconductor material to which a gate insulating film having a predetermined thickness range according to the present invention and a manufacturing method thereof, device characteristics can be improved while preventing insulation breakdown of the gate insulating film. As a result, the organic thin film transistor may have an effect of improving characteristics (mobility, S-factor, on / off ratio).

Claims (25)

A source electrode and a drain electrode formed spaced apart from each other on the substrate; An organic semiconductor layer formed between the source electrode and the drain electrode; A gate insulating layer on the organic semiconductor layer and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; A gate electrode formed on the gate insulating layer And the gate electrode, the gate insulating layer, and the organic semiconductor layer have the same pattern as each other. The method of claim 1, And the organic semiconductor layer has an end portion overlapping the source and drain electrodes, respectively. The method of claim 1, And the gate insulating layer has an end portion which overlaps with the source and drain electrodes, respectively. delete Claim 5 has been abandoned due to the setting registration fee. The method of claim 1, And the gate insulating layer has a thickness of 2,000 angstroms to 2,500 angstroms. Claim 6 has been abandoned due to the setting registration fee. The method of claim 1, The organic insulating material is an organic thin film transistor comprising one of a fluoropolymer, polyvinyl alcohol (PVA) and polyvinylpyridine (PVP). The method of claim 1, And a buffer layer disposed between the source electrode and the substrate and between the drain electrode and the substrate. The method of claim 7, wherein The buffer layer is an organic thin film transistor, characterized in that containing silicon oxide (SiOx). A gate electrode formed on the substrate; A gate insulating layer on the gate electrode and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; An organic semiconductor layer formed on the gate insulating layer; Source and drain electrodes in contact with the organic semiconductor layer and spaced apart from each other And an organic thin film transistor further comprising a protective layer on the organic semiconductor layer. delete 10. The method of claim 9, And the protective layer and the organic semiconductor layer have the same pattern. 10. The method of claim 9, The protective layer is an organic thin film transistor, characterized in that made of a photosensitive material. Claim 13 has been abandoned due to the set registration fee. 13. The method of claim 12, The photosensitive material is an organic thin film transistor comprising one of polyvinylalcohol (PVA), photoacryl, and benzocyclobutene (BCB). 10. The method of claim 9, The source and drain electrodes are disposed on an upper surface of the passivation layer and on both sides of the passivation layer and the organic semiconductor layer. 10. The method of claim 9, And the source and drain electrodes are disposed on an upper surface of the gate insulating layer. Claim 16 has been abandoned due to the setting registration fee. 10. The method of claim 9, And the gate insulating layer has a thickness of 2,000 angstroms to 2,500 angstroms. 10. The method of claim 9, An end portion of the organic semiconductor layer is in contact with the source and drain electrodes. Forming a source electrode and a drain electrode spaced apart from each other on the substrate; Forming an organic semiconductor layer between the source electrode and the drain electrode; Forming a gate insulating layer on the organic semiconductor layer and formed of an organic insulating material and having a thickness of 1,800 angstroms to 2,500 angstroms; Forming a gate electrode on the gate insulating film And the gate electrode, the fraud gate insulating film, and the organic semiconductor layer are formed to have the same pattern as each other. 19. The method of claim 18, Forming a buffer layer between the source electrode and the substrate and between the drain electrode and the substrate. Claim 20 has been abandoned due to the setting registration fee. 19. The method of claim 18, The forming of the organic semiconductor layer may include an ink-jet device, a nozzle coating device, a bar coating device, a slit coating device, a spin coating device, And a method of manufacturing an organic thin film transistor, which is performed using one of printing apparatuses. 19. The method of claim 18, Curing the organic insulating material with light (curing) further comprising the step of manufacturing an organic thin film transistor. 19. The method of claim 18, And forming a protective layer on the gate electrode, the gate insulating film, and the organic semiconductor layer. A data line formed along a first direction on the substrate, a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed between the source electrode and the drain electrode; A gate insulating layer on the organic semiconductor layer and formed of an organic insulating material, the gate insulating layer having a thickness in a range of 1,800 angstroms to 2,500 angstroms; A gate electrode formed on the gate insulating film; A pixel electrode on the substrate and in contact with an end of the drain electrode; A protective layer on the gate electrode, the protective layer having an open portion exposing the pixel electrode and a contact hole exposing a portion of the gate electrode; A gate wiring connected to the gate electrode through the contact hole on the passivation layer and formed in a second direction crossing the first direction; And the gate electrode, the gate insulating film, and the organic semiconductor layer to have the same pattern as each other. 24. The method of claim 23, And another protective layer formed on the gate line. Claim 25 is abandoned in setting registration fee. 24. The method of claim 23, And the gate insulating layer has a thickness of 2,000 angstroms to 2,500 angstroms.

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