KR101350408B1 - Array substrate for liquid crystal display device and method for fabricating the same - Google Patents

Abstract

The present invention provides a display device comprising: data lines formed extending in one direction on a substrate on which a pixel region is defined; A source electrode formed by branching from the data line and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed at each end of the source and drain electrodes facing each other and a spaced area between the ends; A pixel electrode in contact with the other end of the drain electrode and formed in the pixel region; A gate insulating film formed on the organic semiconductor layer and having the same shape as the organic semiconductor layer; A gate electrode formed on the gate insulating film and having the same pattern shape as the gate insulating film; A first protective layer having a first gate contact hole exposing the gate electrode over the gate electrode and a first opening having a first area exposing the pixel electrode; The pixel electrode and the first opening having a second gate contact hole connected to the first gate contact hole on the first passivation layer and a second area connected to the first opening and larger than the first area; A second protective layer having a second open portion exposing the first protective layer around the portion; An array substrate for a liquid crystal display device including a gate line crossing the data line and contacting the gate electrode through the first and second gate contact holes on the second passivation layer.

Description

Array substrate for liquid crystal display device and method for manufacturing the same {Array substrate for liquid crystal display device and method for fabricating the same}

1 is an exploded perspective view of a general liquid crystal display device.

FIG. 2 is a plan view of one pixel region including an organic thin film transistor and a storage capacitor of an array substrate for a liquid crystal display having an organic semiconductor layer according to a first embodiment of the present invention. FIG.

3 is a cross-sectional view of a portion cut along the cutting line III-III of FIG.

4A through 4G are cross-sectional views illustrating manufacturing processes of one pixel area including an organic thin film transistor and a storage capacitor of an array substrate for a liquid crystal display device having an organic semiconductor layer according to a first embodiment of the present invention.

5 is a cross-sectional view of one pixel area including an organic thin film transistor and a storage capacitor of an array substrate for a liquid crystal display device having an organic semiconductor layer according to a second embodiment of the present invention.

6A through 6F are cross-sectional views illustrating manufacturing processes of one pixel area including an organic thin film transistor and a storage capacitor of an array substrate for a liquid crystal display device having an organic semiconductor layer according to a second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

201: substrate 213: source electrode

215: drain electrode 218: pixel electrode

221 organic semiconductor layer 225 gate insulating film

230: gate electrode 235: first protective layer

244 (237, 2420) gate contact holes (first and second gate contact holes)

244: gate contact hole 246: gate wiring

op (op1, op2): Open part (first and second open part)

P: pixel area s1: area of the first opening part

s2: area of the second open portion StgC: storage capacitor

t1: thickness of the first protective layer t2: thickness of the second protective layer

t3: total thickness of the first and second protective layers

Tr: organic thin film transistor TrA: switching area

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using an organic semiconductor material and a method of manufacturing the same.

In recent years, as the society enters the information age, the display field that processes and displays a large amount of information has been rapidly developed, and recently, the thin film transistor (Thin) having excellent performance of thinning, light weight, and low power consumption has recently been developed. Film Transistor (TFT) type liquid crystal display (TFT-LCD) has been developed to replace the existing cathode ray tube (CRT).

The image realization principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. As is well known, the liquid crystal has a thin and long molecular structure and optical anisotropy having an orientation in an array, and when placed in an electric field, the liquid crystal has an orientation of molecular arrangement depending on its size. This change is polarized. The liquid crystal display is an essential component of a liquid crystal panel formed by bonding an array substrate and a color filter substrate formed with pixel electrodes and common electrodes facing each other with the liquid crystal layer interposed therebetween. In addition, it is a non-light emitting device which artificially adjusts the arrangement direction of liquid crystal molecules through the electric field change between these electrodes and displays various images by using the light transmittance which is changed at this time.

Recently, the active matrix type, in which pixels, which are the basic units of image expression, are arranged in a matrix manner, and switching elements are arranged in each pixel, is controlled to have excellent attention in terms of resolution and video performance. In addition, thin film transistors (TFTs) are well known as TFT-LCDs (Thin Firm Transistor Liquid Crystal Display devices).

In more detail, as shown in FIG. 1, which is an exploded perspective view of a general liquid crystal display device, the array substrate 10 and the color filter substrate 20 face each other with the liquid crystal layer 30 interposed therebetween. The array substrate 10 includes a plurality of gate lines 14 and data lines 16 arranged vertically and horizontally to the first transparent substrate 12 and upper surfaces thereof to define a plurality of pixel regions P. The thin film transistor Tr is provided at the intersections of the wirings 14 and 16 and is connected one-to-one with the pixel electrodes 18 provided in the pixel regions P.

In addition, the upper color filter substrate 20 facing the second transparent substrate 22 and its rear surface may cover the non-display area of the gate line 14, the data line 16, and the thin film transistor Tr. A lattice-like black matrix 25 is formed around each pixel region P, and red, green, and blue color filter layers 26 sequentially and sequentially arranged to correspond to each pixel region P are formed in the lattice. The common electrode 28 is formed on the entire surface of the black matrix 25 and the red, green, and blue color filter layers 26.

Although not clearly shown in the drawings, these two substrates 10 and 20 are each sealed with a sealing agent or the like along the edges to prevent leakage of the liquid crystal layer 30 interposed therebetween. An upper and lower alignment layer is provided at the boundary between the substrates 10 and 20 and the liquid crystal layer 30 to provide reliability in the molecular alignment direction of the liquid crystal, and at least one outer surface of each of the substrates 10 and 20 has a polarizing plate. Attached.

In addition, a backlight is provided on the back of the liquid crystal panel to supply light. The on / off signal of the thin film transistor T is sequentially scanned and applied to the gate wiring 14. When the image signal of the data line 16 is transferred to the pixel electrode 18 in the pixel region P, the liquid crystal molecules are driven by the vertical electric field therebetween, and various images are changed due to the change in the transmittance of light. I can display it.

Meanwhile, in the liquid crystal display device, glass substrates have been traditionally used for the first and second insulating substrates 12 and 22, which are the matrixes of the array substrate 10 and the color filter substrate 20. As small portable terminals such as personal digital assistants (PDAs) are widely used, liquid crystal panels using plastic substrates have been introduced that are lighter, lighter, and more flexible than glass so that they can be applied to them.

However, a liquid crystal panel using a plastic substrate has a high temperature process requiring a high temperature of 200 ° C. or higher, especially in the manufacture of an array substrate on which a thin film transistor, which is a switching element, is formed. Therefore, heat resistance and chemical resistance are inferior to that of a glass substrate. There is a difficulty in manufacturing the array substrate from a plastic substrate. Therefore, only the color filter substrate constituting the upper substrate is made of a plastic substrate, and the lower substrate, the array substrate, is a situation in which a liquid crystal display device is manufactured using a conventional glass substrate.

In order to solve this problem, a technique for manufacturing an array substrate, which is characterized by forming a thin film transistor by performing a low temperature process below 200 ° C. using an organic semiconductor material, has recently been proposed. Since the manufacturing of the array substrate by such a low temperature process mainly uses a coating apparatus, the initial equipment investment cost is very low than the manufacturing using expensive vacuum deposition equipment, and as a result, the manufacturing cost can be reduced. . Naturally, the present invention is not limited to manufacturing using a plastic substrate using such an organic semiconductor material.

Hereinafter, a method of manufacturing an array substrate using an organic semiconductor material having a low temperature process of 200 ° C. or less will be briefly described.

In forming a pixel including a wiring and a thin film transistor at a low temperature process of 200 ° C. or lower, the characteristics of the thin film transistor may be formed even by forming a low temperature deposition or coating method such as forming a metal material and a protective layer. In the case of a semiconductor layer that forms a channel that serves as a carrier movement path therein, it is formed by depositing it in a low temperature process below 200 ° C. using amorphous silicon, which is a commonly used semiconductor material. Since the internal structure is not dense, important characteristics such as mobility sharply deteriorate.

Therefore, in order to overcome this, it is proposed to form an organic semiconductor layer using an organic material having semiconductor characteristics instead of a conventional semiconductor material such as amorphous silicon.

However, the organic semiconductor material constituting the organic semiconductor layer is particularly vulnerable to an etching solution for etching a developer or a metal material of a photoresist, which is mainly used for patterning, There is a problem that serious degradation of device characteristics occurs when exposed.

That is, when the organic semiconductor layer having a predetermined shape is formed, the organic semiconductor material does not have a photosensitive characteristic. In order to pattern the organic semiconductor material, the exposure, development and etching processes must be performed using a photosensitive material. Generally, When the organic semiconductor material is exposed to the developing solution of the photoresist to be used, the internal structure is damaged to deteriorate the semiconductor characteristics, and the deterioration speed is increased to shorten the time for driving the device.

The present invention provides an array substrate for a liquid crystal display device having an organic thin film transistor using an organic semiconductor layer, wherein the organic semiconductor layer is formed by a method of simultaneously patterning the organic semiconductor layer, the gate insulating film, and the gate electrode in a form having a top gate structure. It is an object of the present invention to provide an array substrate for a liquid crystal display device characterized by improving its characteristics without damage and having excellent display quality.

An array substrate for a liquid crystal display device having an organic thin film transistor according to a first aspect of the present invention for achieving the above object comprises: data lines formed extending in one direction on a substrate on which a pixel region is defined; A source electrode formed by branching from the data line and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed at each end of the source and drain electrodes facing each other and a spaced area between the ends; A pixel electrode in contact with the other end of the drain electrode and formed in the pixel region; A gate insulating film formed on the organic semiconductor layer and having the same shape as the organic semiconductor layer; A gate electrode formed on the gate insulating film and having the same pattern shape as the gate insulating film; A first protective layer having a first gate contact hole exposing the gate electrode over the gate electrode and a first opening having a first area exposing the pixel electrode; The pixel electrode and the first opening having a second gate contact hole connected to the first gate contact hole on the first passivation layer and a second area connected to the first opening and larger than the first area; A second protective layer having a second open portion exposing the first protective layer around the portion; A gate wiring contacting the gate electrode through the first and second gate contact holes on the second protective layer and intersecting the data wiring.

In this case, the first protective layer is made of the same material as the gate insulating film, the second protective layer is made of an organic insulating material having a photosensitive characteristic, wherein the organic insulating material is photoacryl or PVA (polyvinyl alcohol) It is characterized by).

An array substrate for a liquid crystal display device having an organic thin film transistor according to a second aspect of the present invention includes: data lines formed extending in one direction on a substrate on which a pixel region is defined; A source electrode formed by branching from the data line and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed at each end of the source and drain electrodes facing each other and a spaced area between the ends; A pixel electrode in contact with the other end of the drain electrode and formed in the pixel region; A gate insulating film formed on the organic semiconductor layer and having the same shape as the organic semiconductor layer; A gate electrode formed on the gate insulating film and having the same pattern shape as the gate insulating film; It has a flat surface over the gate electrode, has a gate contact hole for exposing the gate electrode and an open portion for exposing the pixel electrode, the inner surface of the open portion has an angle of 40 ° to 60 ° with respect to the surface of the pixel electrode A protective layer, characterized in that; A gate wiring contacting the gate electrode through the gate contact hole and intersecting the data wiring over the passivation layer.

In the array substrate for a liquid crystal display device according to the first and second features, the organic insulating material constituting the gate insulating film is preferably a fluoropolymer, and silicon oxide is disposed on the entire surface of the substrate under the source and drain electrodes. A buffer layer made of (SiO ₂ ) is further included.

A method of manufacturing an array substrate for a liquid crystal display device having an organic thin film transistor according to a first aspect of the present invention includes a data line extending in one direction on a substrate, a source electrode connected to the data line, and a spaced apart from the source electrode. Forming a drain electrode; Forming a pixel electrode connected to the drain electrode; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode of the same type at each end of the source and drain electrodes facing each other and a spaced area between the ends; Coating an organic insulating material over the gate electrode to form a first protective layer having a flat surface; Coating a photosensitive organic insulating material on the first protective layer to form a second protective layer; First patterning the second protective layer to form a first hole corresponding to the gate electrode and a second hole having a first area corresponding to the pixel electrode; Removing a first passivation layer exposed through the first and second holes to form a first gate contact hole and a first opening having a first area in the first passivation layer; A second gate contact hole connected to the first gate contact hole by secondary patterning of the second protective layer, and a second open part connected to the first open part and having a second area larger than the first area Forming; And forming a gate wiring on the second protective layer through the first and second gate contact holes to contact the gate electrode and intersect the data wiring.

In this case, the second opening may be formed to expose the first protective layer around the first opening in addition to the first opening, and may be formed to correspond to the gate electrode by first patterning the second protective layer. In the forming of the first hole and the second hole having the first area corresponding to the pixel electrode, the transmission area may be formed in the other area corresponding to the portion where the first and second holes should be formed on the second protective layer. Correspondingly positioning a first exposure mask having a blocking region and then exposing the first exposure mask; The method may further include first developing the exposed second protective layer.

In addition, forming the second gate contact hole and the second open part by secondary patterning the second protective layer may include forming a second gate contact hole and a second open part in a region corresponding to the second gate contact hole and the second open part over the second protective layer. Positioning a second exposure mask having a transmissive area corresponding thereto and a blocking area corresponding to other areas, and then exposing the second exposure mask; The method may further include secondary developing the exposed second protective layer, wherein the second open part is formed to have an angle of 40 ° to 60 ° with respect to a surface of the first protective layer.

A method of manufacturing an array substrate for a liquid crystal display device having an organic thin film transistor according to a second aspect of the present invention includes a data line extending in one direction on a substrate, a source electrode connected to the data line, and a spaced apart from the source electrode. Forming a drain electrode; Forming a pixel electrode connected to the drain electrode; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode of the same type at each end of the source and drain electrodes facing each other and a spaced area between the ends; Coating a photosensitive organic insulating material on the gate electrode to form a protective layer having a flat surface; A gate is formed by exposing and developing an exposure mask having a transmissive region and a transflective region surrounding the transmissive region with respect to the portion of the protective layer corresponding to the pixel electrode, thereby forming an open portion and simultaneously exposing the gate electrode. Forming a contact hole; And forming a gate wiring over the protective layer and contacting the gate electrode through the gate contact hole and intersecting the data wiring.

In this case, the open portion is characterized in that the side is formed to expose the pixel electrode with an angle of 40 ° to 60 ° with respect to the surface of the pixel electrode.

In addition, the transflective area of the exposure mask is characterized in that it has a transmission amount of 40% to 60% of the light transmission amount of the transmissive area, wherein the width of the transflective area is substantially the same as the thickness of the protective layer. It is characteristic.

In the method of manufacturing an array substrate for a liquid crystal display device according to the first and second features, the forming of the organic semiconductor layer, the gate insulating film, and the gate electrode of the same type may include forming an organic semiconductor material over the source and drain electrodes. Forming a layer; Sequentially forming a gate insulating material layer and a metal layer over the organic semiconductor material layer; Patterning the metal layer to form a gate electrode; And performing a dry etching to remove the gate insulating material layer exposed to the outside of the gate electrode and the organic semiconductor material layer thereunder.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings.

&Lt; Embodiment 1 >

FIG. 2 is a plan view of one pixel area including an organic thin film transistor and a storage capacitor of an array substrate for a liquid crystal display device having an organic semiconductor layer according to a first embodiment of the present invention, and FIG. Sectional drawing cut along -III. In this case, for convenience of description, an area in which the organic thin film transistor Tr is formed in the pixel area P is defined as a switching area TrA and an area in which the storage capacitor StgC is formed is a storage area StgA.

First, referring to FIG. 2, as shown in the drawing, a gate line 146 extends in one direction on a substrate 101 and crosses the gate line 146 to define a pixel region P. Referring to FIG. The data wiring 110 is formed.

In addition, a source electrode 113 is formed at an intersection point of the two wires 146 and 110 in a form branched from the data wire 110, and is spaced apart from the source electrode 113 and a drain electrode 115 is formed. The gate electrode 130 is formed to cover the spaced regions of the two electrodes 113 and 115 including the source electrode 113 and the drain electrode 115 and branch from the gate wiring 146. It is.

In this case, a semiconductor layer (not shown) formed of a gate insulating film (not shown) and an organic semiconductor material is formed below the gate electrode 130, and is in contact with one end of the drain electrode 115. Independent pixel electrodes 118 are formed for each pixel.

In this case, the pixel electrode 118 is partially overlapped with a part of the gate wiring 146 at the front end, so that the overlapped pixel electrode and the gate wiring form first and second storage electrodes, respectively, and are formed between the two electrodes. A storage capacitor StgC is formed along with a protective layer (not shown).

Hereinafter, a cross-sectional structure of an array substrate for a liquid crystal display device according to the present invention will be described with reference to FIG. 3.

As illustrated, a buffer layer 103 is formed on the entire surface of the buffer layer 103 to improve bonding strength with the organic semiconductor layer 121 on the transparent insulating substrate 101 and extends in one direction over the buffer layer 103. 110 is formed, and in the switching region TrA, the source electrode 113 and the drain electrode 115 are spaced apart from the source electrode 113 in a form branched from the data line 110. In this case, the buffer layer 103 may be omitted depending on the material of the substrate 101.

In the pixel region P, a pixel electrode 118 is formed on the substrate 101 to contact one end of the drain electrode 115 and is formed of a transparent conductive material. In the switching region TrA, In contact with one end of the source and drain electrodes 113, 115 that are spaced apart from each other, the organic semiconductor layer 121 made of an organic semiconductor material corresponding to the spaced regions of the two electrodes 113, 115 is formed The gate insulating film 125 may have the same shape as above on the organic semiconductor layer 121, and may be an organic insulating material, for example, a fluoropolymer, which does not affect each other when the organic semiconductor layer 121 is in contact with the organic semiconductor layer 121. Is formed.

In addition, the gate insulating layer 125 has the same pattern shape and a gate electrode 130 is formed on the gate insulating layer 125, and an organic insulating material having photosensitive characteristics, for example, photoacrylic or PVA is protected on the gate electrode 130. Layer 135 is formed. In this case, the protective layer 135 is provided with a gate contact hole 137 exposing the gate electrode 130 in the switching region TrA. Most of the pixel electrodes 118 correspond to the pixel region P. An open portion (op) for exposing is provided.

In addition, an upper portion of the passivation layer 135 having the gate contact hole 137 and the open part op is in contact with the gate electrode 130 through the gate contact hole 137 and at the same time the data line (not shown). By forming the gate wiring 146 intersecting with (a), the liquid crystal display array substrate 101 having the organic thin film transistor Tr according to the present invention is completed.

In this case, a second passivation layer (not shown) may be further formed on the gate line 146 to prevent corrosion of the gate line 146.

Meanwhile, in the array substrate 101 for a liquid crystal display device according to the first embodiment having such a structure, an open part op exposing the pixel electrode 118 is described, that is, the pixel electrode 118 is exposed. Looking at the structure of the side surface of the protective layer 135 is the most characteristic part of the first embodiment according to the present invention, rather than having a structure perpendicular to the substrate 101 to some extent gentle to the surface of the substrate 101 It can be seen that the opening part (op) becomes wider from the bottom to the top with a slope. In other words, it can be seen that the side of the open portion (op) is formed to have a gentle slope (40 ° ≤ θ ≤ 60 °).

In the array substrate 101 for a liquid crystal display device according to the first embodiment of the present invention having such a structure, an open portion having a side portion having a gentle inclination (40 ° ≦ θ ≦ 60 °) with respect to the surface of the substrate 101. The protective layer 135 including (op) has a photosensitive property and is developed by directly exposing without using a photosensitive material such as a photoresist, so that diffraction exposure is especially performed on the edge part bd of the open part op. By implementing, the patterning of the open part op of the above-mentioned form is possible.

A method of manufacturing an array substrate for a liquid crystal display device according to a first embodiment of the present invention having such a structure will be described with reference to the drawings.

4A to 4G are cross-sectional views illustrating manufacturing steps of an array substrate for a liquid crystal display according to a first exemplary embodiment of the present invention.

First, as shown in FIG. 4A, the buffer layer 103 is formed by depositing an inorganic insulating material having a hydrophilic characteristic, for example, silicon oxide (SiO ₂ ), over the transparent insulating substrate 101. A metal layer (not shown) is formed by depositing a low-resistance metal material, for example, gold (Au), on the buffer layer 103, and applying the photoresist, exposure using an exposure mask, development of the photoresist, and the metal layer ( The data line 110 extending in one direction and the source electrode 113 spaced apart from each other for each pixel region P by performing a mask process including a predetermined step such as etching and etching of a photoresist. And the drain electrode 115 is formed. In this case, the source electrode 113 and the data line 110 are formed to be connected to each other.

Next, as shown in FIG. 4B, a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide, is disposed on the spaced apart source and drain electrodes 113 and 115 and the data line 110. (IZO) is deposited on the entire surface and patterned to form the pixel electrode 118 in contact with the drain electrode 115 for each pixel region P. FIG.

Next, as shown in FIG. 4C, a liquid organic semiconductor material such as pentacene or polythiophene in liquid phase is formed on the source and drain electrodes 113 and 115 and the pixel electrode 118. The organic semiconductor material layer 120 is formed by coating the entire surface using an inkjet apparatus, a nozzle coating apparatus, a bar coating apparatus, a slit coating apparatus, a spin coating apparatus, or a printing apparatus. And successively depositing an organic insulating material, for example, a fluoropolymer, on the organic semiconductor material layer 120, such as an ink jet device, a nozzle coating device, a bar coating device, and a slit coating. The gate insulating material layer 124 is formed by coating the entire surface using a device, a spin coating device, a printing device, or the like.

Thereafter, the second metal layer 129 is formed by depositing a metal material, for example, molybdenum (Mo) or chromium (Cr), which is easily dry etched on the gate insulating material layer 124.

Next, as shown in FIG. 4D, a photoresist is formed on the second metal layer (129 of FIG. 4C) to form a photoresist layer, and the photoresist pattern is exposed and developed to form a photoresist pattern (not shown).

Thereafter, dry etching is performed using the photoresist pattern (not shown) as an etch mask to expose the second metal layer 129 of FIG. 4C and the gate insulating material layer below the photoresist pattern (not shown). By simultaneously removing 124 of FIG. 4C and the organic semiconductor material layer 120 (FIG. 4C), an island-shaped gate electrode 130 is formed in the switching region TrA, and a gate having the same pattern shape thereunder. The insulating film 125 and the organic semiconductor layer 121 are formed.

Next, as shown in FIG. 4E, a photoacoustic or polyvinyl alcohol (PVA), which is a photosensitive organic material, is thickly coated on the front surface of the gate electrode 130 by using one of the coating apparatuses described above, and the surface thereof is flat. Protective layer 135 is formed. At this time, the photoacryl and PVA (poly vinyl alcohol) is preferably a positive type (positive type) in which the portion irradiated with light is removed during development.

Subsequently, a portion of the gate electrode 130 and the predetermined width w1 to be formed at an edge portion of the region where the open portion is to be formed corresponding to the pixel electrode 118 on the protective layer 135 formed thick enough to have the flat surface. The transmissive area TA corresponds to the area excluding), and the transflective area HTA having a slit structure for the predetermined width w1 of the edge portion among the areas where the open part is to be formed, and corresponds to the other areas. After placing the exposure mask 191 capable of diffraction exposure to correspond to the blocking area BA, the exposure of the protective layer 135 through the diffraction exposure mask 191 is performed, and then shown in FIG. 4F. As the development proceeds, a gate contact hole 137 and an open portion op are formed in the passivation layer 135. In this case, the predetermined width w1 corresponding to the edge portion bd of the open part op subjected to the diffraction exposure is proportional to the thickness t of the protective layer 135 from the surface of the pixel electrode 118. By increasing the size, the angle between the edge part bd and the surface of the substrate 101 may be smoothly formed. For example, when the transflective area HTA has a light transmission amount of 40-60% with respect to the transmissive area TA, when the thickness t of the protective layer 135 is 2 μm, the transflective area After exposure is performed after the width w1 corresponding to the area HTA is set to 2 μm, and the development is performed, the open portion op has an angle of about θ = 45 ° with respect to the surface of the substrate 101. The side surface of the protective layer 135 may be formed, and when the thickness (t> 2 μm) of the protective layer 135 increases, the predetermined width w1 of the edge portion bd corresponding to the transflective area HTA is proportional to the thickness of the protective layer 135. ), The edge portion bd may have an angle within the aforementioned range with respect to the substrate 101 surface.

Therefore, the width w1 of the diffraction exposure, that is, the width w1 of the semi-transmissive region HTA of the exposure mask 191 and the amount of light transmission of the transflective region HTA and the transmissive region TA are adjusted. As a result, the side surface of the open portion op may have an angle θ of about 40 degrees to about 60 degrees with respect to the substrate 101, thereby reducing the screening.

In addition, the gate contact hole 137 is formed to expose the gate electrode 130 in addition to an open part op including a side surface having a gentle inclination with respect to the substrate 101 by the development process after the exposure. Done.

Next, as shown in FIG. 4G, a protective layer having an open portion (op) having a gentle angle (40 ° ≦ θ ≦ 60 °) at the gate contact hole 137 and a side thereof at the substrate 101 ( 135) a low-resistance metal material, for example, gold (Au), is deposited to form a third metal layer, and is patterned by performing a mask process to contact the gate electrode 130 through the gate contact hole 137. The gate wiring 146 intersecting with the data wiring (not shown) is formed.

In this case, the gate wiring 146 is formed to overlap the pixel electrode 118 and a part thereof to include the overlapping gate wiring 146 and the pixel electrode 118 and the protective layer 135 formed therebetween. By forming the storage capacitor StgC, the liquid crystal display array substrate 101 having the organic thin film transistor Tr according to the present invention can be completed.

However, in the array substrate for a liquid crystal display device according to the first embodiment manufactured by such a process step, the PVA and the photoacryl having the protective layer have photosensitive properties, so that the patterning can be relatively simple. Although there is an advantage that the organic semiconductor layer is in contact with the organic semiconductor layer for a long time (see FIG. 3, the organic semiconductor layer and the protective layer are in lateral contact). .

Accordingly, a second embodiment in which the problem of deterioration of the organic semiconductor layer when contacting the protective layer made of the photosensitive organic insulating material and the organic semiconductor layer is proposed.

&Lt; Embodiment 2 >

FIG. 5 is a cross-sectional view of the same part as FIG. 3 in the array substrate for a liquid crystal display device including the organic thin film transistor according to the second embodiment of the present invention. In this case, the plan view is the same as in the first embodiment, and thus, the description thereof is omitted. For the same components, 100 is added to the reference numerals given to the first embodiment.

In the case of the second embodiment of the present invention, the components from the substrate to the gate electrode are the same as those of the first embodiment described above, and only the first protective layer and the second protective layer are different in the protective layer. The description focuses on the parts that are present.

For example, the same organic material forming the gate insulating layer 225 in contact with the gate insulating layer 225 formed under the gate electrode 230 and the side surface of the organic semiconductor layer 221 is formed on the gate electrode 230 having an island structure. As a fluoropolymer, a first protective layer 235 exposes a first opening portion op1 having a first area exposing the pixel electrode 218 and a first gate contact hole exposing the gate electrode 230. 237, and a second protective layer 240 is formed on the first protective layer 235 by using an organic material, for example, PVA or photoacryl. In this case, the second passivation layer 240 is connected to the first gate contact hole 237 and the first open part op1 formed in the first passivation layer 235 to respectively form the gate electrode 230 and the pixel electrode 218. ) Is provided with a second gate contact hole 242 and a second open portion (op). In particular, the second open part op2 corresponding to the first open part op1 has the second area s2 larger than the first area s1 of the first open part op1, thereby opening the first open part op2. The pixel electrode 218 exposed to the op1 and the first passivation layer 235 around the first open part op1 are exposed to each other.

In addition, the second protective layer 240 is in contact with the gate electrode 230 through the first and second gate contact holes 237 and 242 connected to each other and intersects with a data line (not shown) formed below. The gate wiring 246 is formed.

In the case of the array substrate 201 for a liquid crystal display device according to the second embodiment having the double layered protective layers 235 and 240, the first and second protective layers 235 and 240 are formed in the first and second protective layers 235 and 240. The two gate contact holes 237 and 242 and the first and second open portions op1 and op2 are formed using substantially two exposure masks.

In this case, the liquid crystal display according to the second exemplary embodiment of the present invention includes the first and second protective layers 235 and 240 having the first and second open portions op1 and op2 having different areas s1 and s2, respectively. The device array substrate 201 is characterized in that the edges bd of the first and second protective layers 235 and 240 forming the first and second open portions op1 and op2 are formed in a step shape. .

The first and second open portions op1 and op2 may be formed to have such a structure. The array substrate 201 for the liquid crystal display device having the protective layers 235 and 240 having the multilayer structure may include the pixel electrode 218. The first and second protective layers 235 and 240 having a very large step are formed on the basis of the above, and the first and second protective layers 235 and 240 having such a large step are made of one exposure mask. When the open portion exposing the pixel electrode 218 is formed by patterning using a semiconductor material, it is made of a heterogeneous organic material, so that even when diffraction exposure is performed as in the first embodiment, the side surface has a gentle slope. It is difficult to proceed, moreover, it is difficult to match the etch ratio, and as the first protective layer 235 forms an undercut with respect to the second protective layer 240, a severe disclination phenomenon occurs.

In particular, the disclination has a larger step on the sides of the first and second passivation layers 235 and 240 in the open portions op (op1 and op2). As the side surfaces of the 235 and 240 have a steep inclination, the situation occurs more severely.

The reason why the discrepancy occurs more severely with such a large step and steep inclination is to form an alignment layer over the protective layer in order to make the initial alignment of the liquid crystal consistent, and to perform a rubbing process. It is proceeded to friction with the alignment layer by rotating the cloth of a special material to a roller or the like quickly and linear movement, the initial alignment of the liquid crystal molecules by the friction with the rubbing cloth is not made well for the part having a large step on the substrate This is due to wrong.

Therefore, as described above, in order to solve the problem of display quality due to the disclination, the first and second protections having a stepped open part (op) further wider with respect to the pixel electrode 218 as described above. By forming the layers 235 and 240, the alignment layer (not shown) is formed on the entire surface of the double-layered protective layers 235 and 240. Thus, the step that the rubbing cloth feels substantially during the rubbing process is the first and second protective layers. (235, 240) Instead of feeling as a step as much as the total thickness (t3), the thickness (t1, t2) of each of the first and second protective layers (235, 240) is felt as a step so that rubbing is made relatively smooth. It is a structure to alleviate the discretion (disclination) to some extent.

Hereinafter, a method of manufacturing an array substrate for a liquid crystal display device according to a second embodiment having such a structure will be described. At this time, the steps up to forming the gate electrode are the same as in the above-described first embodiment, and only the subsequent steps will be described.

6A through 6G are cross-sectional views illustrating manufacturing processes of one pixel area of an array substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

First, as shown in FIG. 6A, a first protective layer is coated on the front surface by coating the same first organic material, for example, a fluoropolymer, constituting the gate insulating film 225 on the front surface of the gate electrode 230. 235 is formed, and a second protective layer 240 is formed by successively applying a second organic material, for example, PVA or photoacryl or benzocyclobutene (BCB). At this time, the fluoropolymer constituting the first protective layer 235 also has a very weak structure such as a developer of a photoresist, for example, a photoresist (positive), characterized in that the developer does not affect. The second protective layer 240 is formed of photoacryl (developing solution KOH) or PVA (developing solution DI), which is an organic material of a type).

Next, a first width w1 corresponds to a portion where a gate contact hole should be formed on the second passivation layer 240 corresponding to the gate electrode, and a portion where an open portion should be formed corresponding to the pixel electrode 218. And a first exposure mask 293 having a blocking area BA in correspondence with the transmissive area TA having a second area and the other area, and then using the first exposure mask 293, the second protective layer. Primary exposure is performed on 240.

Next, as shown in FIG. 6B, the second protective layer 240 subjected to the primary exposure is subjected to a developing process to expose the first protective layer 235 corresponding to the gate electrode 230. A second hole h2 having a first area s1 exposing the first hole h1 and the first protective layer 235 corresponding to the pixel electrode 218 is formed.

Next, as illustrated in FIG. 6C, dry etching is performed to remove the first passivation layer 235 exposed through the first and second holes h1 and h2, so that the gate electrode 230 and the pixel electrode ( A first gate contact hole 237 and a first open portion op1 exposing 218 are formed, respectively.

At this time, the first protective layer 235 has an undercut shape (shown in the drawing) with respect to the second protective layer 240 due to the etching ratio due to the characteristics of the manufacturing method of the second embodiment of the present invention. Even if it does not matter. This is because the undercut structure is removed as the process proceeds.

Next, as shown in FIG. 6D, an area in which the open portion should be formed particularly above the second protective layer 240 on the substrate 201 where the first gate contact hole 237 and the first open portion op1 are formed. The second exposure mask 295 has a second width w2 which is larger than the first width w1 of each transmission area of the first exposure mask. The central portion of is positioned to correspond to the central portion of the first hole h1 and the second hole h2, respectively, and then the second exposure is applied to the second protective layer 240 through the second exposure mask 295. Conduct.

Next, by developing the second exposed second protective layer 240, as shown in FIG. 6E, the second gate contact hole 242 and the second open part op2 are formed in the second protective layer 240. To form. In this case, the second gate contact hole 242 and the second open part op2 may be formed in the first gate contact hole 237 and the first open part op1 respectively formed in the first passivation layer 235. Since each of the areas (not shown, S2) is larger than the area (not shown, S1), the gate contact hole 244 may not only cover the gate electrode 230 but also the first gate contact hole 237. The first passivation layer 235 is exposed, and corresponding to the open portion op, not only the pixel electrode 218 but also the first open portion op1 disposed thereon and the first passivation layer 235 adjacent thereto. To expose the structure.

Therefore, after exposure using one exposure mask, dry etching is performed to simultaneously pattern the first and second protective layers, thereby preventing undercut, which is likely to occur when the open portion is formed, and the pixel electrode 218. As a result, an open part op having a stepped edge bd of a phase direction may be formed to prevent a disclination phenomenon due to a rubbing failure due to a high step.

On the other hand, although not shown in the drawings as a modification, the second exposure mask is subjected to diffraction exposure and development through an exposure mask having a semi-transmissive area at the boundary between the transmission area and the blocking area, as in the first embodiment. The substrate surface on the side of the second open portion in the second protective layer may be formed to have a more gentle angle, that is, an angle of 40 ° to 60 ° with respect to the surface of the first protective layer.

Next, as shown in FIG. 6F, a low resistance metal material, for example, gold (Au), is deposited on the first and second passivation layers 235 and 240 having the gate contact hole 244 and the opening op. By forming a third metal layer and patterning the third metal layer to contact the gate electrode 230 through the first and second gate contact holes 237 and 242 connected to each other and cross the data line (not shown). The gate wiring 246 is formed to complete the array substrate 201 for a liquid crystal display device having the organic thin film transistor Tr according to the present invention. In this case, the gate wiring 246 is formed so that the pixel electrode 218 and a part thereof overlap each other, so that the overlapping gate wiring 246 and the pixel electrode 218 and the first and second protective layers 235 formed therebetween. And 240 to form a storage capacitor StgC.

Although not shown in the drawings, an organic insulating material, for example, polyvinyl alcohol (PVA), photo acryl, or benzocyclobutene (BCB) is coated on the gate wiring 246 to form a third protective layer ( May be further formed).

The array substrate for a liquid crystal display device having the organic thin film transistor according to the present invention has an effect of reducing disclination by having a sloping side thereof with respect to the open portion.

In addition, the protective layer has the effect of extending the life of the organic semiconductor layer by providing a structure of forming a second protective layer of the first protective layer of the same material constituting the gate insulating film and an organic material having photosensitivity thereon, At the same time, the open portion exposing the pixel electrode provides a step structure having a larger area than the first open portion in the first protective layer than the first open portion in the first protective layer, thereby minimizing the occurrence of disclination due to a large step. It is effective.

Claims (17)

A data line formed extending in one direction on the substrate on which the pixel region is defined; A source electrode formed by branching from the data line and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed at each end of the source and drain electrodes facing each other and a spaced area between the ends; A pixel electrode in contact with the other end of the drain electrode and formed in the pixel region; A gate insulating film formed on the organic semiconductor layer and having the same shape as the organic semiconductor layer; A gate electrode formed on the gate insulating film and having the same pattern shape as the gate insulating film; A first protective layer having a first gate contact hole exposing the gate electrode over the gate electrode and a first opening having a first area exposing the pixel electrode; The pixel electrode and the first opening having a second gate contact hole connected to the first gate contact hole on the first passivation layer and a second area connected to the first opening and larger than the first area; A second protective layer having a second open portion exposing the first protective layer around the portion; A gate wiring which contacts the gate electrode through the first and second gate contact holes and crosses the data wiring on the second passivation layer; And a plurality of pixel electrodes. The method of claim 1, And the first passivation layer is made of the same material as the gate insulating layer. The method of claim 1, And the second protective layer is formed of an organic insulating material having photosensitive characteristics. The method of claim 3, wherein The organic insulating material having the photosensitive characteristics is photoacryl or PVA (polyvinyl alcohol) array substrate for a liquid crystal display device. A data line formed extending in one direction on the substrate on which the pixel region is defined; A source electrode formed by branching from the data line and a drain electrode spaced apart from the source electrode; An organic semiconductor layer formed at each end of the source and drain electrodes facing each other and a spaced area between the ends; A pixel electrode in contact with the other end of the drain electrode and formed in the pixel region; A gate insulating film formed on the organic semiconductor layer and having the same shape as the organic semiconductor layer; A gate electrode formed on the gate insulating film and having the same pattern shape as the gate insulating film; It has a flat surface over the gate electrode, has a gate contact hole for exposing the gate electrode and an open portion for exposing the pixel electrode, the inner surface of the open portion has an angle of 40 ° to 60 ° with respect to the surface of the pixel electrode A protective layer, characterized in that; A gate wiring which contacts the gate electrode through the gate contact hole and crosses the data wiring above the protective layer; And a plurality of pixel electrodes. The method according to claim 1 or 5, And an organic insulating material forming the gate insulating film is a fluoropolymer. The method according to claim 1 or 5, And a buffer layer formed of silicon oxide (SiO ₂ ) over the substrate under the source and drain electrodes. Forming a data line extending in one direction on the substrate, a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode; Forming a pixel electrode connected to the drain electrode; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode of the same type at each end of the source and drain electrodes facing each other and a spaced area between the ends; Coating an organic insulating material over the gate electrode to form a first protective layer having a flat surface; Coating a photosensitive organic insulating material on the first protective layer to form a second protective layer; First patterning the second protective layer to form a first hole corresponding to the gate electrode and a second hole having a first area corresponding to the pixel electrode; Removing a first passivation layer exposed through the first and second holes to form a first gate contact hole and a first opening having a first area in the first passivation layer; A second gate contact hole connected to the first gate contact hole by secondary patterning of the second protective layer, and a second open part connected to the first open part and having a second area larger than the first area Forming; Forming a gate wiring on the second protective layer through the first and second gate contact holes, the gate wiring crossing the data wiring and crossing the data wiring; And a plurality of pixel electrodes formed on the substrate. 9. The method of claim 8, And the second open part is formed to expose the first protective layer around the first open part in addition to the first open part. 9. The method of claim 8, By primary patterning the second protective layer to form a first hole corresponding to the gate electrode and a second hole of a first area corresponding to the pixel electrode, Positioning a first exposure mask having a transmissive area corresponding to a portion where the first and second holes are to be formed on the second passivation layer and a blocking area corresponding to other areas, and then performing exposure through the second protective layer; ; Primary development of the exposed second protective layer Method of manufacturing an array substrate for a liquid crystal display device further comprising. 9. The method of claim 8, Forming a second gate contact hole and a second opening by second patterning the second protective layer may include: A second exposure mask having a transmissive region corresponding to a region corresponding to the second gate contact hole and the second opening portion and a blocking region corresponding to other regions is positioned over the second protective layer, and then exposed through this. Performing a step; Secondary development of the exposed second protective layer Method of manufacturing an array substrate for a liquid crystal display device further comprising. 9. The method of claim 8, And the second open portion is formed such that a side surface thereof has an angle of 40 ° to 60 ° with respect to the surface of the first protective layer. Forming a data line extending in one direction on the substrate, a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode; Forming a pixel electrode connected to the drain electrode; Sequentially forming an organic semiconductor layer, a gate insulating film, and a gate electrode of the same type at each end of the source and drain electrodes facing each other and a spaced area between the ends; Coating a photosensitive organic insulating material on the gate electrode to form a protective layer having a flat surface; A gate is formed by exposing and developing an exposure mask having a transmissive region and a transflective region surrounding the transmissive region with respect to the portion of the protective layer corresponding to the pixel electrode, thereby forming an open portion and simultaneously exposing the gate electrode. Forming a contact hole; Forming a gate line on the passivation layer, the gate wire contacting the gate electrode through the gate contact hole and crossing the data line; And a plurality of pixel electrodes formed on the substrate. 14. The method of claim 13, And the open portion is formed to expose the pixel electrode at an angle of 40 ° to 60 ° with respect to the surface of the pixel electrode. 14. The method of claim 13, And the transflective region of the exposure mask has a transmissive amount of 40% to 60% of the transmissive amount of light in the transmissive region. 16. The method of claim 15, And the width of the semi-transmissive region is substantially the same as the thickness of the protective layer. The method of claim 8 or 12, Forming the organic semiconductor layer, the gate insulating film and the gate electrode of the same type, Forming an organic semiconductor material layer over the source and drain electrodes in front; Sequentially forming a gate insulating material layer and a metal layer over the organic semiconductor material layer; Patterning the metal layer to form a gate electrode; Removing the gate insulating material layer exposed to the outside of the gate electrode and the organic semiconductor material layer thereunder by performing dry etching. Method of manufacturing an array substrate for a liquid crystal display device further comprising.

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