US20020050599A1 - Array substrate for liquid crystal display device and method for manufacturing the same - Google Patents
Array substrate for liquid crystal display device and method for manufacturing the same Download PDFInfo
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- US20020050599A1 US20020050599A1 US09/984,027 US98402701A US2002050599A1 US 20020050599 A1 US20020050599 A1 US 20020050599A1 US 98402701 A US98402701 A US 98402701A US 2002050599 A1 US2002050599 A1 US 2002050599A1
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- buffer layer
- array substrate
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- thin film
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- 239000000758 substrate Substances 0.000 title claims abstract description 69
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims description 23
- 238000004519 manufacturing process Methods 0.000 title description 6
- 239000010409 thin film Substances 0.000 claims abstract description 17
- 239000000463 material Substances 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 238000002161 passivation Methods 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- 239000004033 plastic Substances 0.000 claims description 8
- 229910000838 Al alloy Inorganic materials 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- 239000011651 chromium Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 239000011733 molybdenum Substances 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 239000004793 Polystyrene Substances 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 4
- 239000004417 polycarbonate Substances 0.000 claims description 4
- 229920000515 polycarbonate Polymers 0.000 claims description 4
- 229920002223 polystyrene Polymers 0.000 claims description 4
- 239000004925 Acrylic resin Substances 0.000 claims description 3
- 229920000178 Acrylic resin Polymers 0.000 claims description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 3
- 230000008021 deposition Effects 0.000 description 8
- 239000013013 elastic material Substances 0.000 description 7
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- 238000000059 patterning Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
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Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133305—Flexible substrates, e.g. plastics, organic film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
Definitions
- the present invention relates to a liquid crystal display (LCD) device and a method for fabricating the same, and more particularly, to an array substrate having thin film transistors for a liquid crystal display (LCD) device and a method for fabricating the array substrate using flexible materials.
- LCD liquid crystal display
- a liquid crystal display (LCD) device uses optical anisotropy characteristics of liquid crystal molecules to display images.
- Typical LCD devices include upper and lower substrates with a liquid crystal material interposed therebetween.
- FIG. 1 is an exploded perspective view illustrating a typical LCD device.
- the LCD device includes an upper substrate 9 and a lower substrate 11 opposing each other and a liquid crystal layer 14 interposed therebetween.
- the upper substrate 9 and the lower substrate 11 are commonly referred to as a color filter substrate and an array substrate, respectively.
- a substrate 5 , a black matrix 6 and a color filter layer 7 that includes a plurality of sub-color-filters red (R), green (G), and blue (B) are formed on the upper substrate 9 .
- the black matrix 6 surrounds each of the sub-color-filters to form an array matrix.
- a common electrode 18 is formed to cover the color filter layer 7 and the black matrix 6 on the upper substrate 9 .
- the lower substrate 11 includes a plurality of thin film transistors (TFTs) “T” arranged in an array matrix on a substrate 22 corresponding to the color filter layer 7 .
- TFTs thin film transistors
- Each of the TFTs “T” function as switching elements.
- a plurality of crossing gate lines 13 and data lines 15 are orthogonally disposed on the lower substrate 11 such that each of the TFTs “T” are located near a corresponding crossing portion of the gate lines 13 and the data lines 15 , thereby defining a pixel region “P.”
- a pixel electrode 17 is disposed and is made of a transparent conductive material such as indium tin oxide (ITO), for example.
- ITO indium tin oxide
- Liquid crystal molecules of the liquid crystal layer 14 are aligned according to electric signals applied by the TFTs “T,” thereby controlling incident rays of light to display an image.
- electrical signals applied to the gate line 13 and the data line 15 are transmitted to a gate electrode and a source electrode of each the TFTs “T,” respectively.
- the signal applied to the drain electrode is transmitted to the pixel electrode 17 , thereby aligning the liquid crystal molecules of the liquid crystal layer 14 in a first direction.
- light generated from a backlight selectively passes through the liquid crystal layer 14 to display an image.
- a fabricating process for the above-described array substrate requires repeated steps of deposition and patterning of various layers.
- the patterning steps implement photolithographic processing steps, i.e., a masking step, including selective light exposure using a mask, i.e., a photomask. Since one cycle of the photolithographic processing step is facilitated with a single mask, the total number of masks used in the fabrication process is a critical factor in determining the necessary total number of patterning steps.
- fabrication errors associated with the fabricating processes may decrease.
- other processing steps such as etching and striping, for example, are also repeated during fabrication of the array substrate.
- FIG. 2 is an enlarged plan view illustrating a pixel of a related art array substrate 11 for a liquid crystal display.
- the array substrate 11 includes a pixel “P” defined by crossing gate and data lines 13 and 15 , respectively.
- the pixel “P” includes a TFT “T” as a switching element, the pixel electrode 17 , and a storage capacitor “C.”
- the TFT “T” includes a gate electrode 26 , a source electrode 28 , a drain electrode 30 , and an active layer 55 .
- the source electrode 28 is electrically connected to the data line 15
- the gate electrode 26 is electrically connected to the gate line 13 .
- FIG. 3 is a cross sectional view along II-II of FIG. 2, showing a related art array structure resulting from a conventional fabricating sequence.
- a transparent glass substrate 22 is used to form a switching element thereon.
- the thin film transistor “T” including the gate electrode 26 , the source electrode 28 and the drain electrode 30 is formed on the substrate 22 .
- a passivation layer 29 is subsequently formed on the thin film transistor “T” and the pixel electrode 17 that contacts the drain electrode 30 is formed thereon.
- the present invention is directed to an array substrate for a liquid crystal display device and a method for fabricating the same that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
- An object of the present invention is to provide an array substrate which is made of a flexible material and a method for fabricating the same that is flexible and can dampen external impacts.
- an array substrate for a liquid crystal display device includes a flexible substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, and a pixel electrode on the thin film transistor.
- a method for fabricating an array substrate includes the steps of forming a buffer layer on a metal substrate, forming a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, forming a pixel electrode contacting the drain electrode, removing the metal substrate, and forming a plastic material beneath the buffer layer.
- a liquid crystal display device includes an elastic substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, a passivation layer on the thin film transistor, and a pixel electrode on the passivation layer.
- FIG. 1 is an exploded perspective view showing a color liquid crystal display device of the related art
- FIG. 2 is an enlarged plan view showing a pixel of an array substrate for a liquid crystal display device of the related art
- FIG. 3 is a cross-sectional view taken along II-II of FIG. 2;
- FIGS. 4A to 4 F are cross-sectional views showing an exemplary fabricating sequence according to the present invention.
- FIGS. 4 A- 4 F show an exemplary process for forming an inverse staggered type thin film transistor of a back channel etch structure according to the present invention.
- a buffer layer 113 may be formed on a substrate 111 by deposition, for example.
- the buffer layer 113 may include an insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), for example, and the substrate 111 may include a metal material that can be easily etched away.
- the buffer layer 113 improves deposition quality of conductive lines subsequently formed thereon, and protects metal ions of the substrate from migrating into the conductive lines.
- a conductive metal material selected from a group of aluminum (Al), aluminum alloy, molybdenum (Mo), and tungsten (W), for example, may be deposited on the buffer layer 113 .
- the conductive metal material is subsequently patterned to form a gate line (not shown in figure) and a gate electrode 126 .
- an anodized film (not shown) may be formed on the gate electrode 126 .
- a gate insulating layer 128 may be formed on the gate electrode 126 by deposition or coating of an inorganic insulating material selected from a group including silicon oxide (SiO 2 ) and silicon nitride (SiN x ), for example, or an organic insulating material selected from a group including benzocyclobutene and an acrylic resin, for example.
- an intrinsic semiconductor layer 130 and an extrinsic doped semiconductor layer 132 may be formed on the gate insulating layer 128 by deposition of intrinsic amorphous silicon and doped amorphous silicon, respectively.
- an active layer 155 and an ohmic contact layer 156 may be formed to overlap over the gate electrode 126 by patterning the intrinsic semiconductor layer 130 and the doped semiconductor layer 132 .
- a source electrode 159 and a drain electrode 161 may be formed by deposition of a conductive metal material selected from a group including molybdenum (Mo), tungsten (W), chromium (Cr), and an aluminum alloy, for example, on the ohmic contact layer 156 . Subsequently, the conductive metal material is patterned to form the source and drain electrodes 159 and 161 , and a data line 115 extending perpendicularly from the source electrode 159 , which, in combination with the crossing gate line (not shown), defines a pixel region.
- Mo molybdenum
- W tungsten
- Cr chromium
- a passivation layer 165 may be formed by deposition or coating of an insulating material on the substrate. Then, a drain contact hole 167 may be formed over the drain electrode 161 .
- the passivation layer 165 may include benzocyclobutene and an acrylic resin, for example, and the passivation layer may be formed flat as shown in the FIG. 4D.
- a pixel electrode 171 may be formed by deposition of a transparent conductive metal material including indium-tin-oxide (ITO) and indium-zinc-oxide (IZO), for example, on the passivation layer 165 .
- the transparent conductive metal material may be patterned, thereby forming the pixel electrode 171 .
- the pixel electrode 171 may contact the drain electrode 161 through the drain contact hole 167 .
- an orientation film may be formed on the pixel electrode 171 .
- the metal substrate 111 is removed by etching, for example, thereby exposing the buffer layer 113 to ambient conditions.
- an elastic material i.e., plastic
- a roller for example, to give the elastic material a support force and flatness.
- the applied elastic material may function as a lower substrate.
- the elastic material for coating may be selected from a group including polycarbonate (PC) and polystyrene, for example.
- the entire array substrate may be dipped into a melted elastic solution after the metal substrate is etched away. Then, a portion of the elastic material coated on an upper part of the array substrate may be removed, and a portion of the elastic material coated beneath the buffer layer 113 is shaped flat.
- the flexible array substrate may be fabricated and damage to the array substrate can be prevented during subsequent assembling processes.
Abstract
Description
- The present application claims the benefit of Korean Patent Application No. P2000-63745, filed on Oct. 28, 2000 in Korea, which is hereby incorporated by reference.
- 1. Field of the Invention
- The present invention relates to a liquid crystal display (LCD) device and a method for fabricating the same, and more particularly, to an array substrate having thin film transistors for a liquid crystal display (LCD) device and a method for fabricating the array substrate using flexible materials.
- 2. Discussion of the Related Art
- A liquid crystal display (LCD) device uses optical anisotropy characteristics of liquid crystal molecules to display images. Typical LCD devices include upper and lower substrates with a liquid crystal material interposed therebetween.
- FIG. 1 is an exploded perspective view illustrating a typical LCD device. The LCD device includes an
upper substrate 9 and alower substrate 11 opposing each other and aliquid crystal layer 14 interposed therebetween. Theupper substrate 9 and thelower substrate 11 are commonly referred to as a color filter substrate and an array substrate, respectively. Asubstrate 5, ablack matrix 6 and acolor filter layer 7 that includes a plurality of sub-color-filters red (R), green (G), and blue (B) are formed on theupper substrate 9. Theblack matrix 6 surrounds each of the sub-color-filters to form an array matrix. Additionally, acommon electrode 18 is formed to cover thecolor filter layer 7 and theblack matrix 6 on theupper substrate 9. - The
lower substrate 11 includes a plurality of thin film transistors (TFTs) “T” arranged in an array matrix on asubstrate 22 corresponding to thecolor filter layer 7. Each of the TFTs “T” function as switching elements. In addition, a plurality ofcrossing gate lines 13 anddata lines 15 are orthogonally disposed on thelower substrate 11 such that each of the TFTs “T” are located near a corresponding crossing portion of thegate lines 13 and thedata lines 15, thereby defining a pixel region “P.” In the pixel region “P,” apixel electrode 17 is disposed and is made of a transparent conductive material such as indium tin oxide (ITO), for example. - Liquid crystal molecules of the
liquid crystal layer 14 are aligned according to electric signals applied by the TFTs “T,” thereby controlling incident rays of light to display an image. Specifically, electrical signals applied to thegate line 13 and thedata line 15 are transmitted to a gate electrode and a source electrode of each the TFTs “T,” respectively. The signal applied to the drain electrode is transmitted to thepixel electrode 17, thereby aligning the liquid crystal molecules of theliquid crystal layer 14 in a first direction. Then, light generated from a backlight (not shown in the figure) selectively passes through theliquid crystal layer 14 to display an image. - A fabricating process for the above-described array substrate requires repeated steps of deposition and patterning of various layers. The patterning steps implement photolithographic processing steps, i.e., a masking step, including selective light exposure using a mask, i.e., a photomask. Since one cycle of the photolithographic processing step is facilitated with a single mask, the total number of masks used in the fabrication process is a critical factor in determining the necessary total number of patterning steps. Furthermore, as fabricating processes for the array substrate become more simplified, fabrication errors associated with the fabricating processes may decrease. Moreover, other processing steps such as etching and striping, for example, are also repeated during fabrication of the array substrate.
- FIG. 2 is an enlarged plan view illustrating a pixel of a related
art array substrate 11 for a liquid crystal display. In the FIG. 2, thearray substrate 11 includes a pixel “P” defined by crossing gate anddata lines pixel electrode 17, and a storage capacitor “C.” The TFT “T” includes agate electrode 26, asource electrode 28, adrain electrode 30, and anactive layer 55. Thesource electrode 28 is electrically connected to thedata line 15, and thegate electrode 26 is electrically connected to thegate line 13. - FIG. 3 is a cross sectional view along II-II of FIG. 2, showing a related art array structure resulting from a conventional fabricating sequence. In FIG. 3, a
transparent glass substrate 22 is used to form a switching element thereon. The thin film transistor “T” including thegate electrode 26, thesource electrode 28 and thedrain electrode 30 is formed on thesubstrate 22. Apassivation layer 29 is subsequently formed on the thin film transistor “T” and thepixel electrode 17 that contacts thedrain electrode 30 is formed thereon. - In the conventional process described above, mechanical characteristics of the material for the
substrate 22, such as that of glass or quartz, are rigid so that the fabrication processes can be done easily due to minimize deformation of the substrate. However, any concentrated point loading, such as an external impact, can fracture the material. - Accordingly, the present invention is directed to an array substrate for a liquid crystal display device and a method for fabricating the same that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
- An object of the present invention is to provide an array substrate which is made of a flexible material and a method for fabricating the same that is flexible and can dampen external impacts.
- Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
- To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an array substrate for a liquid crystal display device includes a flexible substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, and a pixel electrode on the thin film transistor.
- In another aspect, a method for fabricating an array substrate includes the steps of forming a buffer layer on a metal substrate, forming a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, forming a pixel electrode contacting the drain electrode, removing the metal substrate, and forming a plastic material beneath the buffer layer.
- In another aspect, a liquid crystal display device includes an elastic substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, a passivation layer on the thin film transistor, and a pixel electrode on the passivation layer.
- It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
- The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. In the drawings:
- FIG. 1 is an exploded perspective view showing a color liquid crystal display device of the related art;
- FIG. 2 is an enlarged plan view showing a pixel of an array substrate for a liquid crystal display device of the related art;
- FIG. 3 is a cross-sectional view taken along II-II of FIG. 2; and
- FIGS. 4A to4F are cross-sectional views showing an exemplary fabricating sequence according to the present invention.
- Reference will now be made in detail to the preferred embodiments of the present invention, which are illustrated in the accompanying drawings.
- FIGS.4A-4F show an exemplary process for forming an inverse staggered type thin film transistor of a back channel etch structure according to the present invention. In FIG. 4A, a
buffer layer 113 may be formed on asubstrate 111 by deposition, for example. Thebuffer layer 113 may include an insulating material such as silicon oxide (SiO2), silicon nitride (SiNx), for example, and thesubstrate 111 may include a metal material that can be easily etched away. Thebuffer layer 113 improves deposition quality of conductive lines subsequently formed thereon, and protects metal ions of the substrate from migrating into the conductive lines. Next, a conductive metal material selected from a group of aluminum (Al), aluminum alloy, molybdenum (Mo), and tungsten (W), for example, may be deposited on thebuffer layer 113. The conductive metal material is subsequently patterned to form a gate line (not shown in figure) and agate electrode 126. In addition, an anodized film (not shown) may be formed on thegate electrode 126. - In FIG. 4B, a
gate insulating layer 128 may be formed on thegate electrode 126 by deposition or coating of an inorganic insulating material selected from a group including silicon oxide (SiO2) and silicon nitride (SiNx), for example, or an organic insulating material selected from a group including benzocyclobutene and an acrylic resin, for example. Subsequently, anintrinsic semiconductor layer 130 and an extrinsic dopedsemiconductor layer 132 may be formed on thegate insulating layer 128 by deposition of intrinsic amorphous silicon and doped amorphous silicon, respectively. - In FIG. 4C, an
active layer 155 and anohmic contact layer 156 may be formed to overlap over thegate electrode 126 by patterning theintrinsic semiconductor layer 130 and the dopedsemiconductor layer 132. - In FIG. 4D, a
source electrode 159 and adrain electrode 161 may be formed by deposition of a conductive metal material selected from a group including molybdenum (Mo), tungsten (W), chromium (Cr), and an aluminum alloy, for example, on theohmic contact layer 156. Subsequently, the conductive metal material is patterned to form the source and drainelectrodes data line 115 extending perpendicularly from thesource electrode 159, which, in combination with the crossing gate line (not shown), defines a pixel region. - After forming the source and drain
electrodes passivation layer 165 may be formed by deposition or coating of an insulating material on the substrate. Then, adrain contact hole 167 may be formed over thedrain electrode 161. Thepassivation layer 165 may include benzocyclobutene and an acrylic resin, for example, and the passivation layer may be formed flat as shown in the FIG. 4D. Then apixel electrode 171 may be formed by deposition of a transparent conductive metal material including indium-tin-oxide (ITO) and indium-zinc-oxide (IZO), for example, on thepassivation layer 165. Subsequently, the transparent conductive metal material may be patterned, thereby forming thepixel electrode 171. Thepixel electrode 171 may contact thedrain electrode 161 through thedrain contact hole 167. In addition, although not shown in the figures, an orientation film may be formed on thepixel electrode 171. - In FIG. 4E, the
metal substrate 111 is removed by etching, for example, thereby exposing thebuffer layer 113 to ambient conditions. - In FIG. 4F, an elastic material, i.e., plastic, may be applied beneath the
buffer layer 113 using a roller, for example, to give the elastic material a support force and flatness. Accordingly, the applied elastic material may function as a lower substrate. The elastic material for coating may be selected from a group including polycarbonate (PC) and polystyrene, for example. - Alternatively, instead of using the roller for applying the elastic material to the
buffer layer 113, the entire array substrate may be dipped into a melted elastic solution after the metal substrate is etched away. Then, a portion of the elastic material coated on an upper part of the array substrate may be removed, and a portion of the elastic material coated beneath thebuffer layer 113 is shaped flat. By using either method, the flexible array substrate may be fabricated and damage to the array substrate can be prevented during subsequent assembling processes. - It will be apparent to those skilled in the art that various modifications and variations can be made in the method of manufacturing an array substrate of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Claims (20)
Priority Applications (1)
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US11/367,363 US7531372B2 (en) | 2000-10-28 | 2006-03-06 | Method for manufacturing array substrate for liquid crystal display device |
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KR2000-63745 | 2000-10-28 | ||
KR1020000063745A KR100586241B1 (en) | 2000-10-28 | 2000-10-28 | An array substrate for liquid crystal display device and method of manufacturing there of |
Related Child Applications (1)
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US11/367,363 Division US7531372B2 (en) | 2000-10-28 | 2006-03-06 | Method for manufacturing array substrate for liquid crystal display device |
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US20020050599A1 true US20020050599A1 (en) | 2002-05-02 |
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US09/984,027 Abandoned US20020050599A1 (en) | 2000-10-28 | 2001-10-26 | Array substrate for liquid crystal display device and method for manufacturing the same |
US11/367,363 Expired - Lifetime US7531372B2 (en) | 2000-10-28 | 2006-03-06 | Method for manufacturing array substrate for liquid crystal display device |
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Also Published As
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US20060186527A1 (en) | 2006-08-24 |
KR20020032951A (en) | 2002-05-04 |
KR100586241B1 (en) | 2006-06-02 |
US7531372B2 (en) | 2009-05-12 |
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