KR20080020092A - Method of fabricating the metal contact in semiconductor device - Google Patents

Method of fabricating the metal contact in semiconductor device Download PDF

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KR20080020092A
KR20080020092A KR1020060082995A KR20060082995A KR20080020092A KR 20080020092 A KR20080020092 A KR 20080020092A KR 1020060082995 A KR1020060082995 A KR 1020060082995A KR 20060082995 A KR20060082995 A KR 20060082995A KR 20080020092 A KR20080020092 A KR 20080020092A
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silicon nitride
film
gas
titanium silicon
metal contact
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KR1020060082995A
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Korean (ko)
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노일철
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주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Abstract

A method for forming a metal contact of a semiconductor device is provided to prevent oxidization phenomenon due to a crystal grain boundary to reduce the resistance of the metal contact by forming an amorphous-structured titanium silicon nitride(TiSiN) layer as a barrier metal for forming the metal contact. An interlayer dielectric(110) having a contact hole is formed on a lower conductive layer. A titanium silicon nitride layer(130) is deposited on an inner wall of the contact hole to form a barrier metal layer(140). An upper conductive layer gap-fills the contact hole to form a metal contact. The titanium silicon nitride layer is formed with an amorphous titanium silicon nitride layer(TiSiN) layer. The titanium silicon nitride layer is formed by using CVD(Chemical Vapor Deposition) or ALD(Atomic Layer Deposition). The titanium silicon nitride layer is formed by using TiCl4 gas, NH3 has, and SiH4 gas as source gases.

Description

반도체 소자의 금속 콘택 형성방법{ Method of fabricating the metal contact in semiconductor device}Method of fabricating the metal contact in semiconductor device

도 1a 내지 도 1d는 종래의 반도체소자의 금속 콘택 형성방법에 따른 문제점을 설명하기 위해 나타내보인 도면들이다. 1A to 1D are diagrams for explaining a problem according to a metal contact forming method of a conventional semiconductor device.

도 2 및 도 3은 본 발명에 따른 반도체 소자의 금속 콘택 형성방법을 설명하기 위해 나타내 보인 도면들이다.2 and 3 are views illustrating a metal contact forming method of a semiconductor device according to the present invention.

도 4은 본 발명에 따른 반도체소자의 금속 콘택 형성방법에서 실란(SiH4) 가스 내 티타늄(Ti), 질소(N) 및 실리콘(Si) 함량에 따른 티타늄실리콘나이트라이드막의 비저항의 변화를 나타낸 그래프이다. 4 is a graph showing a change in the specific resistance of the titanium silicon nitride film according to the titanium (Ti), nitrogen (N) and silicon (Si) content in the silane (SiH 4 ) gas in the method for forming a metal contact of the semiconductor device according to the present invention to be.

도 5는 본 발명에 따른 반도체 소자의 금속 콘택 형성방법을 종래와 비교하기 위하여 나타내 보인 도면이다. 5 is a view illustrating a method of forming a metal contact of a semiconductor device according to the present invention in comparison with the prior art.

본 발명은 반도체 소자의 금속 콘택 형성방법에 관한 것으로, 보다 상세하게는 티타늄실리콘나이트라이드를 장벽금속막로 사용함으로써 금속 콘택의 저항을 감소시키는 반도체 소자의 금속 콘택 형성방법에 관한 것이다.The present invention relates to a method for forming a metal contact of a semiconductor device, and more particularly to a method for forming a metal contact of a semiconductor device to reduce the resistance of the metal contact by using titanium silicon nitride as a barrier metal film.

일반적으로 반도체 소자의 콘택은 하부도전 패턴과 상부도전 패턴간을 전기적으로 연결하기 위한 수단으로서 반도체 소자의 속도, 수율 및 신뢰성을 결정하는 중요한 요인이다. 최근 반도체 소자의 집적도가 증가됨에 따라, 콘택 홀이나 비아 홀의 직경이 작아지고 동시에 종횡비(aspect ratio)가 증가하게 되어, 이를 만족하기 위해 금속 콘택을 형성하게 되었다. 그러나 금속 콘택 형성시 하부도전 패턴으로 금속의 확산을 방지하기 위하여 전기 전도도 특성이 우수한 장벽금속막(barrier metal)을 추가하여 형성하고 있다. 특히, 종횡비가 큰 금속 콘택을 형성하기 위해 티타늄나이트라이드(TiN)막을 장벽금속막로서 주로 사용하고 있다. In general, the contact of the semiconductor device is an important factor for determining the speed, yield and reliability of the semiconductor device as a means for electrically connecting the lower conductive pattern and the upper conductive pattern. Recently, as the degree of integration of semiconductor devices is increased, the diameters of the contact holes and the via holes are reduced, and at the same time, the aspect ratio is increased, thereby forming metal contacts to satisfy this. However, in order to prevent diffusion of the metal in the lower conductive pattern when forming the metal contact, a barrier metal layer having excellent electrical conductivity is added. In particular, a titanium nitride (TiN) film is mainly used as a barrier metal film to form a metal contact having a high aspect ratio.

한편, 장벽금속막로서 티타늄나이트라이드(TiN)막은, 염화티타늄(TiCl4) 가스 및 암모니아(NH3) 가스를 소스 가스로 이용한 화학 기상 증착(chemical vapor deposition) 방법을 이용하여 형성한다. 그러나 화학 기상 증착 방법으로 티타늄나이트라이드(TiN)막을 증착할 경우 두께 조절이 용이하지만 티타늄나이트라이드(TiN)막이 주상 조직(columnar structure)으로 성장되어 결정립 경계(grain boundary)가 나타난다. On the other hand, a titanium nitride (TiN) film as a barrier metal film is formed by a chemical vapor deposition method using titanium chloride (TiCl 4 ) gas and ammonia (NH 3 ) gas as source gas. However, when the titanium nitride (TiN) film is deposited by chemical vapor deposition, the thickness can be easily controlled, but the titanium nitride (TiN) film is grown into a columnar structure, resulting in grain boundaries.

도 1a 내지 도 1d는 종래의 반도체소자의 금속 콘택 형성방법에 따른 문제점을 설명하기 위해 나타내보인 도면들이다. 1A to 1D are diagrams for explaining a problem according to a metal contact forming method of a conventional semiconductor device.

도 1a를 참조하면, 반도체 기판 상에 티타늄나이트라이드(TiN)막을 증착하자 마자 티타늄나이트라이드(TiN)막의 상태를 나타낸 도면이다. 즉, 티타늄나이트라이드(TiN)이 주상 구조로 성장함에 따라 결정립 경계가 형성되고. 이러한 결정립 경 계 내에 염소(Cl)(참조부호 10)등과 같은 불순물이 존재하는 상태를 나타낸다. 다음에 도 1b를 참조하면, 티타늄나이트라이드(TiN)막을 NH3 가스를 이용한 열처리 공정을 수행하고, 이러한 열처리 과정에서 염소(Cl) 잔류물이 아웃 가싱(out gassing)되어 결정립 경계 내의 불순물이 제거된다. 다음에 도 1c를 참조하면, 불순물이 제거된 결정립 경계가 공기 중에 노출됨에 따라, 대기중의 산소(O2)가 결정립 경계를 따라 침투하게 되는 결과를 나타낸다. 다음에 도 1d를 참조하면, 대기중의 산소(02)가 티타늄나이트라이드(TiN)막 내의 티타늄을 산화시켜 결정립 경계 속에 티타늄산화막(TiOx)(참조부호 20)이 형성된다. 이로 인해 티타늄나이트라이드(TiN)막은 결정립계에 티타늄산화막(TiOx)(참조부호 20)를 형성하게 됨으로써 콘택 접촉 저항을 증가시키게 된다.Referring to FIG. 1A, as soon as a titanium nitride (TiN) film is deposited on a semiconductor substrate, a state of the titanium nitride (TiN) film is illustrated. That is, grain boundary is formed as titanium nitride (TiN) grows into a columnar structure. In this grain boundary, impurities such as chlorine (Cl) (ref. 10) are present. Next, referring to FIG. 1B, a titanium nitride (TiN) film is subjected to a heat treatment process using NH 3 gas, and in this heat treatment process, chlorine (Cl) residues are out gassed to remove impurities in grain boundaries. do. Next, referring to FIG. 1C, as the grain boundary from which impurities are removed is exposed to air, oxygen (O 2 ) in the atmosphere penetrates along the grain boundary. Referring next to FIG. 1D, oxygen (0 2 ) in the atmosphere oxidizes titanium in the titanium nitride (TiN) film to form a titanium oxide film (TiO x ) (reference numeral 20) at grain boundaries. As a result, the titanium nitride (TiN) film forms a titanium oxide film (TiO x ) (reference numeral 20) at the grain boundary, thereby increasing contact contact resistance.

본 발명이 이루고자 하는 기술적 과제는, 금속 콘택을 형성하기 위한 장벽금속막이 주상 구조로 성장함으로써 발생되는 결정립 경계를 방지하고, 콘택 저항을 감소시키는 반도체소자의 금속 콘택 형성방법을 제공하는 것이다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a metal contact of a semiconductor device, which prevents grain boundaries caused by growth of a barrier metal film for forming a metal contact into a columnar structure and reduces contact resistance.

상기 기술적 과제를 달성하기 위하여, 본 발명에 따른 반도체소자의 금속 콘택 형성방법은, 하부도전막 상에 콘택 홀을 구비하는 층간절연막을 형성하는 단계; 상기 콘택 홀 내벽에 티타늄실리콘나이트라이드막을 증착하여 장벽금속막을 형성하 는 단계; 및 상기 콘택 홀 내부에 상부도전막을 매립하여 금속 콘택을 형성하는 단계를 포함한다.In order to achieve the above technical problem, a metal contact forming method of a semiconductor device according to the present invention, forming an interlayer insulating film having a contact hole on the lower conductive film; Forming a barrier metal film by depositing a titanium silicon nitride film on the inner wall of the contact hole; And embedding an upper conductive film in the contact hole to form a metal contact.

상기 티타늄실리콘나이트라이드막은 비정질 티타늄실리콘나이트라이드막으로 형성하는 것이 바람직하다.The titanium silicon nitride film is preferably formed of an amorphous titanium silicon nitride film.

상기 티타늄실리콘나이트라이드막은 화학적 기상 증착 방법 또는 원자층 증착 방법을 이용하여 형성하는 것이 바람직하다.The titanium silicon nitride film is preferably formed using a chemical vapor deposition method or an atomic layer deposition method.

상기 티타늄실리콘나이트라이드막은 TiCl4 가스, NH3 가스 및 SiH4 가스를 소스가스로 이용하여 형성하는 것이 바람직하다.The titanium silicon nitride film is preferably formed by using TiCl 4 gas, NH 3 gas, and SiH 4 gas as the source gas.

상기 TiCl4 가스의 공급량은 40~80 sccm으로 공급하고, 상기 NH3 가스는 600~1200 sccm으로 공급하며, 그리고 SiH4 가스는 1300~2700 sccm으로 공급하는 것이 바람직하다.The TiCl 4 gas is supplied at 40 to 80 sccm, the NH 3 gas is supplied at 600 to 1200 sccm, and the SiH 4 gas is preferably supplied at 1300 to 2700 sccm.

상기 TiSiN 내의 Si원소의 분포량은 4 원자% 이하로 하여 형성하는 것이 바람직하다.It is preferable to form the distribution amount of Si element in the said TiSiN to 4 atomic% or less.

상기 티타늄실리콘나이트라이드막은 480 ~ 700℃의 온도에서 수행하여 형성하는 것이 바람직하다.The titanium silicon nitride film is preferably formed by performing at a temperature of 480 ~ 700 ℃.

이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예에 대해 상세히 설명하고자 한다. 그러나 본 발명은 여러 가지 상이한 형태로 구현될 수 있으며 여기에서 설명하는 실시예에 한정되지 않는다. 도면에서 여러 층 및 영역을 명확하게 표현하기 위하여 두께를 확대하여 나타내었다. 명세서 전체를 통하여 유사한 부분 에 대해서는 동일한 도면부호를 붙였다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification.

도 2 및 도 3은 본 발명에 따른 반도체 소자의 금속 콘택 형성방법을 설명하기 위해 나타내 보인 도면들이다.2 and 3 are views illustrating a metal contact forming method of a semiconductor device according to the present invention.

먼저 도면에 상세하게 도시되지는 않았지만, 디램(DRAM; Dynamic Random Access Memory)과 같은 메모리 소자의 경우, 반도체 기판의 활성 영역에 게이트 전극이 배치되고, 반도체 기판 내부에는 도전형 불순물이 주입된 소스(source)/드레인(drain) 영역이 형성되어 있다.Although not shown in detail in the drawing, in the case of a memory device such as a dynamic random access memory (DRAM), a gate electrode is disposed in an active region of a semiconductor substrate, and a source in which conductive impurities are injected into the semiconductor substrate ( A source / drain region is formed.

도 2에 도시된 바와 같이, 상기 게이트 전극(미도시)과 후속 연결 콘택을 전기적으로 층간 절연하고자 반도체 기판(100) 전면에 층간절연막(110)을 형성한다. 층간절연막(110)은 USG(Undoped Silicate Glass) 또는 BPSG(BoroPhospho Silicate Glass)을 사용하여 형성한다. 이어서, 층간절연막(110) 상에 불순문 영역인 소스/드레인 영역을 노출시키는 콘택 마스크(미도시)를 형성한다. 계속해서, 노출된 층간절연막(110)을 선택적으로 제거하여 소스/드레인 영역이 노출되는 콘택 홀(120)을 형성한다.As shown in FIG. 2, an interlayer insulating film 110 is formed on the entire surface of the semiconductor substrate 100 to electrically insulate the gate electrode (not shown) from a subsequent connection contact. The interlayer insulating film 110 is formed using USG (Undoped Silicate Glass) or BPSG (BoroPhospho Silicate Glass). Next, a contact mask (not shown) is formed on the interlayer insulating layer 110 to expose the source / drain region, which is an impurity region. Subsequently, the exposed interlayer dielectric layer 110 is selectively removed to form a contact hole 120 through which the source / drain regions are exposed.

이어서, 콘택 홀(120)이 형성된 층간절연막(110) 상에 비정질(amorphouse) 구조의 티타늄실리콘나이트라이드(TiSiN)막(130)을 화학적 기상 증착(chemical vapor deposition) 방법 또는 원자층 증착(Atomic Layer Deposition) 방법을 이용하여 형성한다. 비정질 구조의 티타늄실리콘나이트라이드(TiSiN)막(130)을 형성하기 위해서는, 소스가스로서 TiCl4 가스 와 NH3 가스와 함께 SiH4 가스를 반응 챔버 내에 공급한다. 자세하게는, 반응 챔버 내의 온도를 480~700℃로 유지하면서 TiCl4 소스 가스의 공급량은 40~80 scccm으로 공급하고, NH3 소스 가스의 공급량은 600~1200 sccm으로 공급하며, 그리고 SiH4 소스 가스의 공급량은 1300~2700 sccm으로 공급하여 비정질의 티타늄실리콘나이트라이드(TiSiN)막을 형성한다. Subsequently, the titanium silicon nitride (TiSiN) layer 130 having an amorphous structure is deposited on the interlayer insulating layer 110 on which the contact hole 120 is formed, by chemical vapor deposition or atomic layer deposition. It is formed using the Deposition method. In order to form an amorphous titanium silicon nitride (TiSiN) film 130, SiH 4 gas is supplied into the reaction chamber together with TiCl 4 gas and NH 3 gas as source gas. Specifically, the TiCl 4 source gas is supplied at 40 to 80 scccm, the NH 3 source gas is supplied at 600 to 1200 sccm, and the SiH 4 source gas is maintained while maintaining the temperature in the reaction chamber at 480 to 700 ° C. The amount of is supplied to 1300 ~ 2700 sccm to form an amorphous titanium silicon nitride (TiSiN) film.

도 3에 도시된 바와 같이, 비정질의 티타늄실리콘나이트라이드(TiSiN)막(130) 상에 금속막(140)을 콘택홀 내부에 매립한 후 에치백하여 노드 분리시켜 금속 콘택을 형성한다. 한편, SiH4 가스의 양에 따라 티타늄실리콘나이트라이드(TiSiN)의 성분비가 달라지고, SiH4 가스 내에 실리콘 원소가 많을수록 콘택 저항이 높아진다. As shown in FIG. 3, the metal film 140 is embedded on the amorphous titanium silicon nitride (TiSiN) film 130 in the contact hole and then etched back to form a metal contact. On the other hand, it is a component ratio of the titanium silicon nitride (TiSiN) based on the amount of SiH 4 gas, SiH 4 gas into the more silicon atoms increases the contact resistance.

도 4은 본 발명에 따른 반도체소자의 금속 콘택 형성방법에서 실란(SiH4) 가스 내 티타늄(Ti), 질소(N) 및 실리콘(Si) 함량에 따른 티타늄실리콘나이트라이드막의 비저항의 변화를 나타낸 그래프이다. 가로축은 실란(SiH4) 가스의 압력을 나타내고 오른쪽 세로축은 티타늄실리콘나이트라이드(TiSiN)막의 비저항을 나타내며, 그리고 왼쪽 세로축은 실란(SiH4) 가스 내에서 실리콘 원소의 함유량을 나타낸다. 이를 참조하면, 참조부호 200으로 나타낸 점은 실란(SiH4) 가스의 변화를 나타내고, 참조부호 210으로 나타낸 점은 티타늄(Ti) 가스의 변화를 나타내며, 참조부호 220으로 나타낸 점은 질소(N) 가스의 변화를 나타낸다. 그리고 참조부호 230으로 나타 낸 점은 비저항의 변화를 나타낸다. 이 중 실란(SiH4) 가스(200 참조)의 압력이 0.8 torr일 때 실리콘 원소의 함유율이 4 원자%(atomic percent)이고 비저항은 수십 μΩ-㎝이다. 그러나 실리콘 원소의 함유율이 35 원자%(atomic percent)로 증가하게 되면, 비저항은 3700 μΩ-㎝ 정도이다. 따라서, 실란(SiH4) 가스 내 실리콘 함유량이 증가할수록 비저항이 증가한다는 것을 알 수 있다.4 is a graph showing a change in the specific resistance of the titanium silicon nitride film according to the titanium (Ti), nitrogen (N) and silicon (Si) content in the silane (SiH 4 ) gas in the method for forming a metal contact of the semiconductor device according to the present invention to be. The horizontal axis represents the pressure of the silane (SiH 4 ) gas, the right vertical axis represents the specific resistance of the titanium silicon nitride (TiSiN) film, and the left vertical axis represents the content of silicon element in the silane (SiH 4 ) gas. Referring to this, the reference numeral 200 denotes a change of silane (SiH 4 ) gas, the reference numeral 210 denotes a change of titanium (Ti) gas, and the reference numeral 220 denotes nitrogen (N). Indicates a change in gas. The point indicated by reference numeral 230 indicates the change in specific resistance. Among them, when the pressure of the silane (SiH 4 ) gas (see 200) is 0.8 torr, the content of silicon element is 4 atomic percent and the specific resistance is several tens of Ω-cm. However, when the content of silicon element increases to 35 atomic percent, the specific resistance is about 3700 μΩ-cm. Therefore, it can be seen that the specific resistance increases as the silicon content in the silane (SiH 4 ) gas increases.

도 5는 본 발명에 따른 반도체소자의 금속 콘택 형성방법을 종래와 비교하기 위하여 나타내 보인 도면이다. 이를 보면 참조부호 300은 주상형 구조(columanr structure)로 성장한 티타늄나이트라이드(TiSiN)막으로서, 티타늄나이트라이드(TiSiN)막 형성시 결정립 경계가 형성되어, 결정립 경계 안에서 티타늄산화막이 성장하는 것을 알 수 있다. 그러나 참조부호 310은 비정질 구조(amorphous structure)로 성장한 티타늄실리콘나이트라이드(TiSiN)막으로서, 결정립 경계가 형성되지 않아 불순물이 존재하지 않는다는 것을 알 수 있다.5 is a view illustrating a method of forming a metal contact of a semiconductor device according to the present invention in comparison with the related art. In this case, reference numeral 300 denotes a titanium nitride (TiSiN) film grown in a columnar structure, and grain boundaries are formed when the titanium nitride (TiSiN) film is formed, and the titanium oxide film grows within the grain boundaries. have. However, reference numeral 310 is a titanium silicon nitride (TiSiN) film grown in an amorphous structure, and it can be seen that no grain boundary exists because no grain boundary is formed.

이상 첨부된 도면을 참조하여 본 발명의 실시예를 설명하였으나, 본 발명은 상기 실시예에 한정되지 않으며, 본 발명의 기술적 사상 내에서 당분야의 통상의 지식을 가진 자에 의해 여러가지 변형이 가능함은 당연하다. Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments, and various modifications are possible by those skilled in the art within the technical idea of the present invention. Of course.

지금까지 설명한 바와 같이, 본 발명에 따른 반도체소자의 금속 콘택 형성방법은, 금속 콘택을 형성하기 위한 장벽금속막으로 비정질 구조의 티타늄실리콘나이트라이드(TiSiN)막을 형성함으로써 결정립 경계에 의해 발생하는 산화현상을 방지 하여 금속 콘택의 저항을 감소시키는 이점이 제공된다.As described so far, the metal contact forming method of the semiconductor device according to the present invention is an oxidation phenomenon generated by grain boundary by forming an amorphous titanium nitride nitride (TiSiN) film as a barrier metal film for forming a metal contact. This provides the advantage of reducing the resistance of the metal contacts.

Claims (7)

하부도전막 상에 콘택 홀을 구비하는 층간절연막을 형성하는 단계; Forming an interlayer insulating film having contact holes on the lower conductive film; 상기 콘택 홀 내벽에 티타늄실리콘나이트라이드막을 증착하여 장벽금속막을 형성하는 단계; 및Depositing a titanium silicon nitride film on the inner wall of the contact hole to form a barrier metal film; And 상기 콘택 홀 내부에 상부도전막을 매립하여 금속 콘택을 형성하는 단계를 포함하는 반도체소자의 금속 콘택 형성방법.Forming a metal contact by filling an upper conductive layer in the contact hole. 제1항에 있어서,The method of claim 1, 상기 티타늄실리콘나이트라이드막은 비정질 티타늄실리콘나이트라이드(TiSiN)막으로 형성하는 것을 특징으로 하는 반도체소자의 금속 콘택 형성방법.And the titanium silicon nitride film is formed of an amorphous titanium silicon nitride (TiSiN) film. 제2항에 있어서,The method of claim 2, 상기 티타늄실리콘나이트라이드막은 화학적 기상 증착 방법 또는 원자층 증착 방법을 이용하여 형성하는 것을 특징으로 하는 반도체소자의 금속 콘택 형성방법.The titanium silicon nitride film is a metal contact forming method of a semiconductor device, characterized in that formed using a chemical vapor deposition method or an atomic layer deposition method. 제1항에 있어서,The method of claim 1, 상기 티타늄실리콘나이트라이드막은 TiCl4 가스, NH3 가스 및 SiH4 가스를 소스가스로 이용하여 형성하는 것을 특징으로 하는 반도체소자의 금속 콘택 형성방 법.The titanium silicon nitride film is formed by using a TiCl 4 gas, NH 3 gas and SiH 4 gas as a source gas metal contact forming method of a semiconductor device. 제4항에 있어서,The method of claim 4, wherein 상기 TiCl4 가스의 공급량은 40~80 sccm으로 공급하고, 상기 NH3 가스는 600~1200 sccm으로 공급하며, 그리고 SiH4 가스는 1300~2700 sccm으로 공급하는 것을 특징으로 하는 하는 반도체소자의 금속 콘택 형성방법.The TiCl 4 gas is supplied at 40-80 sccm, the NH 3 gas is supplied at 600-1200 sccm, and the SiH 4 gas is supplied at 1300-2700 sccm. Formation method. 제4항에 있어서,The method of claim 4, wherein 상기 TiSiN 내의 Si원소의 분포량은 4 원자% 이하로 하여 형성하는 것을 특징으로 하는 반도체소자의 금속 콘택 형성방법.The method for forming a metal contact of a semiconductor device, characterized in that the distribution of Si elements in the TiSiN is formed to be 4 atomic% or less. 제1항에 있어서,The method of claim 1, 상기 티타늄실리콘나이트라이드(TiSiN)막은 480 ~ 700℃의 온도에서 수행하여 형성하는 것을 특징으로 하는 반도체소자의 금속 콘택 형성방법.The titanium silicon nitride (TiSiN) film is a metal contact forming method of a semiconductor device, characterized in that formed by performing at a temperature of 480 ~ 700 ℃.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022212295A1 (en) * 2021-03-30 2022-10-06 Entegris, Inc. Low temperature deposition process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022212295A1 (en) * 2021-03-30 2022-10-06 Entegris, Inc. Low temperature deposition process

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