KR20080010887A - Method for forming semiconductor device - Google Patents

Abstract

A method for forming a semiconductor device is provided to prevent a capacitor from falling down, perform a capacitor forming process stably, and form a height of a cylinder type capacitor unlimitedly. A method for forming a semiconductor device includes the steps of: forming an interlayer insulating layer(130) having a storage electrode contact plug(140) on a semiconductor substrate(100) with a predetermined bottom structure; forming a cylinder type first storage electrode(160) connected to the storage electrode contact plug; forming a first dielectric film(170) on a surface of the first storage electrode; forming a first conductive layer(180) for a top electrode on a front surface of the semiconductor substrate; etching the first conductive layer to expose the first storage electrode and the first dielectric film by a CMP(Chemical Mechanical Polishing) process; forming a cylinder type second storage electrode(210) connected to the exposed first storage electrode; making the first and second storage electrodes into one cylinder type by removing the second storage electrode; forming a second dielectric film(220) on a surface of the second storage electrode; and completing a capacitor by forming a second conductive layer(230) for the top electrode on the front surface of the semiconductor substrate.

Description

Method of forming a semiconductor device {METHOD FOR FORMING SEMICONDUCTOR DEVICE}

1A-1E are cross-sectional views illustrating a method of forming a storage electrode of a capacitor according to the prior art.

2A to 2H are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

The present invention relates to a method of forming a semiconductor device, in order to solve the problem that the storage electrode falls after the dip-out process during the cylindrical capacitor formation process, first forming a first storage electrode that can be formed to a stable height, and first After the capacitor forming step is completed, the second capacitor forming step is performed on the first conductive layer, which is the upper electrode of the first capacitor, to provide a method of forming a semiconductor device stably. will be.

As semiconductor devices are highly integrated, the size of semiconductor devices decreases gradually. However, since the capacitance of the capacitor must be further increased, the process of forming a capacitor of the semiconductor device is very difficult. In particular, in order to increase the capacity of the capacitor, the concave type storage electrode that uses only a single side is changed to a cylinder type storage electrode that can use all sides. In this case, there is a problem that the cylindrical capacitor collapses. Occurs.

1A to 1E are cross-sectional views illustrating a method of forming a storage electrode of a capacitor according to the prior art.

Referring to FIG. 1A, an interlayer insulating layer including a predetermined lower structure on the semiconductor substrate 10, a bit line 20, and a storage electrode contact plug 40 on the bit line 20 is formed. 30 is formed. Next, the etch stop layer 50 and the sacrificial oxide layer 60 for forming the storage electrode are sequentially formed on the interlayer insulating layer 30. Next, a hard mask pattern 70 is formed on the sacrificial oxide layer 60 to expose the storage electrode region.

Referring to FIG. 1B, the sacrificial oxide layer 60 and the etch stop layer 50 are etched using the hard mask pattern 70 to form the sacrificial oxide layer pattern 65 forming the storage electrode region 75. .

Referring to FIG. 1C, the storage layer forming material layer 80 is formed on the entire surface of the semiconductor substrate 10 including the storage electrode region 75.

Referring to FIG. 1D, the storage electrode forming material 80 formed on the sacrificial oxide layer pattern 65 is removed to insulate the storage electrode 85.

Referring to FIG. 1E, all of the sacrificial oxide layer patterns 65 are removed by a wet etching method. In this case, the storage electrode 85 may collapse in the process of removing the sacrificial oxide layer pattern 60, and thus a subsequent capacitor formation process may not be normally performed.

As described above, in the case of the cylindrical storage electrode, the thickness of the storage electrode is too thin compared to its height, thereby causing a problem of collapse easily. Therefore, the process margin of the semiconductor device is limited, and the capacitance of the capacitor cannot be increased stably, which causes the deterioration of the characteristics of the semiconductor device.

In order to solve the above problems of the prior art, the first storage electrode which can be formed to a stable height is first formed, and after the capacitor forming process is first completed, the first conductive layer which is the upper electrode of the first capacitor. The purpose of the present invention is to provide a method of forming a semiconductor device capable of stably performing a capacitor forming process, and easily increasing the capacity of a capacitor and improving the electrical characteristics of the semiconductor device by performing a second capacitor forming step thereon. It is done.

The method for forming a semiconductor device according to the present invention for achieving the above object,

Forming an interlayer insulating film including a storage electrode contact plug on a semiconductor substrate having a predetermined substructure;

Forming a cylindrical first storage electrode connected to the storage electrode contact plug;

Forming a first dielectric layer on a surface of the first storage electrode;

Forming a first conductive layer for an upper electrode on an entire surface of the semiconductor substrate;

Performing a CMP process to etch the first conductive layer to expose the first storage electrode and the first dielectric layer;

Forming a cylindrical second storage electrode connected to the exposed first storage electrode;

Removing the second storage electrode formed on the inner bottom portion of the cylindrical shape so that the first storage electrode and the second storage electrode are formed in one cylinder shape;

Forming a second dielectric layer on the surface of the second storage electrode; and

And forming a second conductive layer for the upper electrode on the entire surface of the semiconductor substrate to complete the capacitor.

Here, when the process of forming the CMP of the first conductive layer, the process of forming the second storage electrode, the second dielectric layer and the second conductive layer is called an expansion capacitor formation cycle, the expansion capacitor is performed after the first conductive layer forming process is performed. The formation cycle may be performed at least once or more to increase the height of the capacitor.

In addition, the first storage electrode forming process may include forming an etch stop layer and an insulating layer on the interlayer insulating layer including the storage electrode contact plug, and forming a hard mask pattern on the insulating layer to expose the storage electrode region. Forming an insulating layer pattern exposing the storage electrode contact plug by etching the insulating layer and the etch stop layer by using the hard mask pattern as a mask, and forming an insulating layer pattern on the entire surface of the semiconductor substrate including the exposed region. 1, forming a storage electrode material layer, performing a CMP process to remove the first storage electrode material layer formed on the insulation layer pattern, and performing a dip out process to form the insulation layer pattern. And removing the first storage electrode to form a first storage electrode, wherein the second storage electrode forming process is insulated on the first conductive layer. Forming a layer, forming a hard mask pattern exposing a storage electrode region on the insulating layer, and etching the insulating layer using the hard mask pattern as a mask to form the first storage electrode and the first dielectric layer. Forming an exposed insulating layer pattern, forming a second storage electrode material layer on the entire surface of the semiconductor substrate including the exposed region, and performing a CMP process to form a second storage layer formed on the insulating layer pattern. The method may further include removing the insulating layer pattern to form a second storage electrode by removing the electrode material layer and performing a dip out process.

Hereinafter, a method of forming a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2H are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

Referring to FIG. 2A, an isolation region (not shown) formed by using an active region (not shown) and a shallow trench isolation (STI) process is formed in a semiconductor substrate 100, and a gate is formed over the active region and the isolation layer. Form.

Next, a landing plug forming process is performed in which an active region between gates is exposed and a plug material is embedded.

Next, a bit line contact plug connected to the landing plug formed in the region between the gates, which is the center of the active region, is formed, and a bit line 120 connected to the bit line contact plug is formed. In this case, the bit line 120 is preferably formed at a position not overlapping with the active region, and is preferably arranged to vertically cross the gate.

Next, the interlayer insulating film 130 is formed on the entire surface of the semiconductor substrate including the bit line 120, and a predetermined area of the interlayer insulating film 130 is etched to expose the landing plugs formed at both edges of the active region. An electrode contact hole is formed.

Thereafter, a plug material is embedded in the storage electrode contact hole to form the storage electrode contact plug 140. In this case, the upper portion of the storage electrode contact plug 140 may be formed to have a larger upper area in order to secure an alignment margin with the storage electrode formed in a subsequent process.

Next, an etch stop layer 150 and a first insulating layer (not shown) are formed on the interlayer insulating layer including the storage electrode contact plug 140. In this case, the first insulating layer may be formed of a sacrificial oxide film, but may be formed at such a height that the fall phenomenon does not occur in consideration of the subsequent storage electrode height.

Next, a hard mask pattern (not shown) is formed on the first insulating layer to expose the storage electrode region.

Next, the first insulating layer and the etch stop layer 150 are etched using the hard mask pattern as a mask to form a cylindrical storage electrode region exposing the storage electrode contact plug 140.

Next, a material layer for the first storage electrode is formed on the entire surface of the semiconductor substrate 100 including the first insulating layer on which the storage electrode region is formed.

Next, a CMP process is performed to remove the first storage electrode material layer formed on the first insulating layer.

Next, a dip out process is performed to remove the first insulating layer to form a cylindrical first storage electrode 160 connected to the storage electrode contact plug 140.

Next, the first dielectric layer 170 is formed on the surface of the first storage electrode 160, and the first conductive layer 180 for the upper electrode is formed on the entire surface of the semiconductor substrate 100.

Referring to FIG. 2B, the first conductive layer 180 is etched to expose the first storage electrode 160 and the first dielectric layer 170 by performing a CMP process.

Referring to FIG. 2C, a second insulating layer 190 is formed on the first conductive layer 180. In this case, the second insulating layer 190 is preferably formed of a sacrificial oxide film. Next, a hard mask pattern 195 is formed on the second insulating layer 190 to expose the storage electrode region.

2D, the second insulating layer pattern 1905a exposing the first storage electrode 160 and the first dielectric layer 170 by etching the second insulating layer 190 by using the hard mask pattern 195 as a mask. To form. Next, the second storage electrode material layer 200 is formed on the entire surface of the semiconductor substrate 100.

Next, a CMP process is performed to remove the second storage electrode material layer 200 formed on the second insulating layer pattern 195.

Referring to FIG. 2E, the second insulating layer pattern 195 is removed by performing a dip out process to form a cylindrical second storage electrode 210.

Next, the second storage electrode 210 formed on the inner bottom portion of the cylindrical shape is removed to form the first storage electrode 160 and the second storage electrode 210 into one cylindrical shape.

Referring to FIG. 2F, the second dielectric layer 220 is formed on the entire surface of the semiconductor substrate 100 including the second storage electrode 210.

Referring to FIG. 2G, the second dielectric layer 220 formed on the surface of the first conductive layer 180 is removed.

Referring to FIG. 2H, the second conductive layer 230 for the upper electrode is formed on the entire surface of the semiconductor substrate 100 to complete the capacitor.

In addition, when the process of FIGS. 2B to 2H is one cycle for forming an expansion capacitor, the expansion capacitor formation cycle may be performed at least one or more times to continuously increase the height of the capacitor.

As described above, in order to solve the problem of the storage electrode falling after the dip-out process during the cylindrical capacitor formation process, the first storage electrode that can be formed to a stable height is first formed, and the capacitor formation process is first completed. Subsequently, the second capacitor formation step is performed on the first conductive layer, which is the upper electrode of the first capacitor, so that the capacitor formation step can be stably performed. In addition, since the height of the cylindrical capacitor can be easily formed by a desired height, the capacity of the capacitor can be easily increased and the electrical characteristics of the semiconductor device can be improved.

As described above, in the method of forming a semiconductor device according to the present invention, a first capacitor having a stable height is first formed, and then a second capacitor forming process is performed on the upper electrode of the first capacitor, thereby forming a capacitor. The fall problem can be prevented and the capacitor formation process can be stably performed. In addition, since the height of the cylindrical capacitor can be formed indefinitely, it provides an effect of securing a process margin for increasing the capacity of the capacitor and improving the electrical characteristics of the semiconductor device.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (4)

Forming an interlayer insulating film including a storage electrode contact plug on a semiconductor substrate having a predetermined substructure; Forming a cylindrical first storage electrode connected to the storage electrode contact plug; Forming a first dielectric layer on a surface of the first storage electrode; Forming a first conductive layer for an upper electrode on an entire surface of the semiconductor substrate; Performing a CMP process to etch the first conductive layer to expose the first storage electrode and the first dielectric layer; Forming a cylindrical second storage electrode connected to the exposed first storage electrode; Removing the second storage electrode formed on the inner bottom portion of the cylindrical shape so that the first storage electrode and the second storage electrode are formed into one cylindrical shape; Forming a second dielectric layer on a surface of the second storage electrode; And And forming a second conductive layer for the upper electrode on the entire surface of the semiconductor substrate to complete the capacitor. The method of claim 1, When the process of forming the CMP of the first conductive layer, the process of forming the second storage electrode, the second dielectric layer, and the process of forming the second conductive layer are called expansion capacitor formation cycles, the expansion capacitor formation cycle is performed after performing the first conductive layer formation process. Performing at least one or more times to increase the height of the capacitor. The method of claim 1, The first storage electrode forming process Forming an etch stop layer and an insulating layer on the interlayer insulating layer including the storage electrode contact plug; Forming a hard mask pattern on the insulating layer to expose a storage electrode region; Forming an insulation layer pattern exposing the storage electrode contact plug by etching the insulation layer and the etch stop layer using the hard mask pattern as a mask; Forming a material layer for a first storage electrode on an entire surface of the semiconductor substrate including the exposed region; Performing a CMP process to remove the first storage electrode material layer formed on the insulating layer pattern; And And removing the insulating layer pattern to form a first storage electrode by performing a dip out process. The method of claim 1, The second storage electrode forming process Forming an insulating layer on the first conductive layer; Forming a hard mask pattern on the insulating layer to expose a storage electrode region; Etching the insulating layer using the hard mask pattern as a mask to form an insulating layer pattern exposing the first storage electrode and the first dielectric layer; Forming a material layer for a second storage electrode on an entire surface of the semiconductor substrate including the exposed region; Performing a CMP process to remove the second storage electrode material layer formed on the insulating layer pattern; And And removing the insulating layer pattern to form a second storage electrode by performing a dip out process.

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