KR20070073615A - Housing for electronic components - Google Patents

Abstract

A housing for an electronic device is provided to transfer simultaneously a plurality of semiconductor chips without a two-dimensional movement of the semiconductor chip by using a plurality of chip trays composed of upper and lower units. A housing(10) for an electronic device includes one or more chip trays and a storage tray. The chip trays(11) are used for holding a plurality of semiconductor chips. The storage tray(12) is used for storing the chip trays. The chip tray is formed by connecting a lower unit and an upper unit vertically. The upper and the lower units have the same structures. The lower unit is enclosed with the upper unit.

Description

Housing for electronic device {HOUSING FOR ELECTRONIC COMPONENTS}

1 is a plan view showing a housing having chip trays and a storage tray according to a preferred embodiment of the present invention.

2 is a front view of the housing;

3 is an enlarged view showing essential parts of a chip tray;

Fig. 4A is an enlarged perspective view showing the upper unit of the chip tray.

Fig. 4B is an enlarged perspective view showing the lower unit of the chip tray.

Figure 4 (c) is an enlarged perspective view showing the storage tray.

Fig. 5 is a bottom view showing the back of the upper unit.

6 is a cross-sectional view taken along the line A-A of FIG. 3, in which the upper unit and the lower unit are vertically connected to each other to form a chip tray;

Fig. 7A is a cross sectional view along the line A-A in Fig. 3, showing the upper unit.

FIG. 7B is a cross-sectional view taken along the line A-A of FIG. 3, showing the lower unit.

FIG. 7C is a cross-sectional view taken along the line A-A of FIG. 3, showing the storage tray. FIG.

FIG. 8 is a plan view showing a storage tray without a chip tray shown in FIG. 1; FIG.

Fig. 9A is a sectional view taken along the line B-B in Fig. 3, showing the upper unit.

Fig. 9B is a sectional view taken along the line B-B in Fig. 3, showing the lower unit.

Fig. 9C is a sectional view taken along the line B-B in Fig. 3, showing the storage tray.

Fig. 10 is a sectional view showing a state in which two housings each having a chip tray and a storage tray are coupled to each other in the vertical direction.

<Explanation of symbols for the main parts of the drawings>

10: housing

11: chip tray

12: storage tray

14: upper unit

15: lower unit

25: absorption part

C: chip

The present invention relates to a housing for holding an electronic device such as a semiconductor chip therein.

The present invention claims Japanese Patent Application No. 2006-771 as a priority, the contents of which are incorporated herein by reference.

In the past, various types of housings have been used to hold and transport electronic devices such as semiconductor chips. Representative examples of conventional known housings are designed to include a plurality of chip trays each holding a plurality of semiconductor chips, and a storage tray larger than the chip tray in size and thickness for storing the semiconductor chips. The storage tray has a plurality of pockets whose upper ends are open and which store chip trays. The plurality of semiconductor chips are formed on the top surface of the chip tray to form a plurality of regions, and the plurality of semiconductor chips are formed in the plurality of semiconductor chips in such a manner that the plurality of semiconductor chips are firmly held and enclosed by the protrusions to prevent movement in two-dimensional directions. Stay in the area. Chip trays each holding a plurality of semiconductor chips are stored in a pocket of a storage tray; Thereafter, the storage tray is transferred. This can make it possible to transfer a plurality of chip trays at the same time.

In the above, the semiconductor chips are simply mounted on the upper surface of the chip tray, respectively. If the housing rattles during transfer, the semiconductor chip may be moved out of position to be out of position or inclined therefrom. This causes undesirable storage conditions for semiconductor chips.

It is an object of the present invention to provide a housing that can hold a semiconductor chip in a stable manner that prevents unwanted movement of the semiconductor chip during movement.

The housing of the present invention includes at least one chip tray for holding a plurality of semiconductor chips, and a storage tray for storing the chip tray, wherein the chip tray is formed by vertically connecting an upper unit and a lower unit, and the semiconductor chip. Is held between the upper unit and the lower unit. The chip tray is formed to an appropriate size and is completely held inside the storage tray within the thickness range of the storage tray. In addition, the storage tray has a plurality of engagement portions, which realize engagement with the chip tray while maintaining the vertically connected state of the upper unit and the lower unit. Since both the upper unit and the lower unit have the same structure, the lower unit can be covered by the upper unit.

As described above, when the housing is coupled vertically with the other housing, the plurality of semiconductor chips are also held between the upper unit of the housing and the lower unit of the other housing. In addition, the semiconductor chips are each encapsulated in a surface mount package.

As described above, the present invention allows a plurality of chip trays stored in the storage tray to be simultaneously transferred, and the plurality of semiconductor chips are held between the upper unit and the lower unit of the chip tray. This keeps the semiconductor chip out of position during the transfer, and therefore, even if the housing rattles during the transfer, it is possible to prevent the positional movement of the semiconductor chip, thus maintaining stable storage conditions for the semiconductor chip.

Since the chip tray is formed in an appropriate size, the chip tray can be stored completely inside the storage tray within the thickness range of the storage tray, so as to prevent the overall thickness of the housing from increasing when the chip tray is stored in the storage tray. Can be; In other words, a compact size can be realized for the housing. In particular, when a plurality of housings are vertically coupled to each other, it is possible to reduce the total space required for the transport of the housings.

By providing an elastic engagement portion, the chip tray can be detachably attached to the storage tray. This prevents the chip tray from being unexpectedly separated from the storage tray and also maintains a vertically connected state between the upper unit and the lower unit. That is, the storage conditions of the semiconductor chip can be stabilized by the chip tray and the storage tray.

Since both the upper unit and the lower unit have the same structure, a common design can be utilized for the component parts of the units. This reduces the number of different parts required for the upper and lower units.

When a plurality of housings each having the above-described structure are vertically coupled to each other, the plurality of semiconductor chips can also be held between the upper unit of one housing and the lower unit of the other housing. This increases the total number of semiconductor chips transferred simultaneously. In addition, the semiconductor chips are each encapsulated, for example, in a surface mount chip package.

These and other objects, aspects, and embodiments of the present invention are described in more detail with reference to the accompanying drawings.

The invention is explained in more detail by way of example with reference to the accompanying drawings.

1 is a plan view showing a housing according to a preferred embodiment of the present invention, FIG. 2 is a front view of the housing, FIG. 3 is an enlarged view showing essential parts of the housing shown in FIG. 1, and FIG. 4C are enlarged perspective views showing main parts of the housing.

The housing 10 includes a plurality of chip trays 11 each holding a plurality of chips C, and a storage tray 12 holding the chip trays 11. This embodiment does not specifically limit the shape of the chip C, but the drawing shows that the chip C is such as a BGA (ball grid array) package and a CSP (chip scale packaging). Encapsulated in a surface mount chip package, each chip C has a two-dimensional square shape, for example, in which a plurality of terminals are arranged along one side of the chip.

As shown in Figs. 4A and 4B, the chip tray 11 is formed by the upper unit 14 and the lower unit 15, and the units can be combined with each other. Both the upper unit 14 and the lower unit 15 can be formed using the same tray member of the same structure that allows the chip C to be mounted thereon. For this reason, the following description is mainly made for the upper unit 14, and the same parts as those of the upper unit 14 are denoted by the same reference numerals, and detailed description thereof is omitted as necessary.

The upper unit 14 is formed using an integrally molded member made of resin. As shown in Figs. 3, 4 (a) to 4 (c), 5, 6 and 7 (a) to 7 (c), the upper unit 14 is shown in plan view. A main part (17) having a square shape; A plurality of first protrusions 18 each having a rectangular shape in a plan view, projecting upward from the surface of the main part 17 and arranged in a two-dimensional manner with a predetermined distance therebetween (see FIG. 3). Wow; A plurality of second projecting portions 19 each having a cross-shaped shape in the plan view and projecting downward from the rear surface of the main part 17 (see FIG. 5); It includes a plurality of square ribs 20 each having a square shape in the plan view and projecting downward from the periphery of the back surface of the main part 17.

As shown in Figs. 7A and 7B, the periphery region 17A of the main component 17 is a step portion 17B compared with other regions of the main component 17. Figs. As much as descending. The plurality of recesses 22 are formed in predetermined portions on both the right side and the left side and on both the upper side and the lower side (see Figs. 3 and 5). Of the four corners of the main part 17, one corner K (ie, the lower left corner in FIG. 3) has a tapered shape, allowing the operator or operator to recognize the peripheral direction of the upper unit 14. .

The first protrusions 18 are arranged on the surface of the main part 17 in a two-dimensional manner so that the chips C can be arranged in a predetermined space therebetween, so that the four first protrusions 18 are each It is located along the four sides of the chip (C). That is, each single chip C is positioned adjacent to each other and is held in a chip storage area formed by four first protrusions 18 that prevent two-dimensional movement of the chip C.

As shown in Fig. 5, the second protrusions 19 are arranged on the rear surface of the main part 17 in a two-dimensional manner with a predetermined space therebetween. In particular, each second projection 19 having a cross shape is located on the back of the chip holding area for holding each chip C on the surface of the main part 17. As shown in FIG. 7A, the height h1 of the second protrusion 19 projecting downward from the rear surface of the main part 17 is the first projecting upward from the surface of the main part 17. It is smaller than the height h2 of the protrusion 18.

The lower unit 15 is formed similarly to the upper unit 14. That is, as shown in FIG. 7B, the plurality of first protrusions 18 are formed on the surface of the main part 17, and the plurality of second protrusions 19 is the back surface of the main part 17. Is formed.

When the upper unit 14 and the lower unit 15 are vertically coupled to each other as shown in FIG. 6, the tip end of the first protrusion 18 of the lower unit 15 is the upper unit 14. Contact the back side of the main part 17 of the head; The tip end of the second protrusion 19 of the upper unit 14 is in contact with the surface of the main part 17 of the lower unit 15. This makes it possible to firmly hold the chip C by the first protrusion 18 and the second protrusion 19 between the upper unit 14 and the lower unit 15.

The square rib 20 protrudes downwardly from the periphery of the back surface of the main part 17 in such a manner that the inner surface of the rib is located slightly outward of the step portion 17B. That is, when the upper unit 14 and the lower unit 15 are vertically coupled to each other, the square ribs 20 of the upper unit 14 are positioned adjacent to the step 17B and the step 17B. Meshes with the first protrusion 18. This makes it possible to securely connect the upper unit 14 and the lower unit 15 to each other.

Although no spatial constraints are imposed on the structure of the storage tray 12, this embodiment is designed such that the storage tray 12 is formed as an integrally molded member constituted by a suitable resin such as an ABS resin. As shown in FIG. 8, the storage tray 12 includes a tray 24 having a long rectangular shape, an absorbing portion formed at the center of the tray 24, and eight storage portions for storing the chip tray 11, respectively. (Ie, four storage spaces formed on the left side and four storage spaces formed on the right side) and the frame 27 formed at the periphery of the tray 24.

The absorbing portion 25 is a flat surface surrounded by frame-shaped ribs 29 forming a square region and is absorbed by the absorbing grid used for conveying the housing 10. The upper end of the frame-shaped rib 29 is located in substantially the same plane as the upper side of the tray 24, so that the absorbing portion 25 is located below the upper side of the tray 24 while the tray 24 It is located parallel to the upper side of). Further, a plurality of grid ribs 30 having the same height as the height of the frame-shaped ribs 29 are formed in the peripheral region of the frame-shaped ribs 29.

As shown in Fig. 4C, the reservoir 26 includes an inlet / outlet recess 32 that is slightly larger than the upper unit 14 and has a rectangular shape. This allows the chip tray 11 to be attached to or separated from the reservoir 26 by the opening of the inlet / outlet recess 32. The storage section 26 also includes four peripheral walls 33 extending from the opening of the inlet / outlet recess 32 to the floor to form a rectangular space between the circumferential walls; A plurality of flanges 34 which project inwardly from the lower end of the circumferential wall 33 and form an engagement portion; A plurality of lock elements 36 facing each other at the inlet / outlet recess 32 position in the plan view, forming an engagement portion lying along the two peripheral walls 33 (see FIG. 3); And a plurality of positioning protrusions 37 located along the other two peripheral walls in the inlet / outlet recess 32 position. Here, the inside of the flange 34 is open.

A plurality of cutouts 38 are formed along the other two peripheral walls 33 associated with the lock element 36. As shown in Fig. 4C, each cut 38 extends vertically from the upper side of the tray 24 to the flange 34, and has a suitable size to surround the lock element 36 within the cut. Is formed.

As shown in Fig. 9C, the log element 36 is arranged inside the cut portion 38. Figs. As shown in Figs. 6 and 7 (c), the lock elements 36 are each located in a vertically upright position and protrude inwardly into the space of the inlet / outlet recess 32. Is formed at the upper end of the lock element 36. Each of the small protrusions 40 is formed in a semicircular shape in its cross-sectional view, so that when the chip tray 11 is stored in the storage 26, the small protrusions 40 are the main part 17 of the upper unit 14. Mesh with the outer periphery of the The plurality of interconnecting elements 41 extend horizontally from the lower end of the lock element 36 and are interconnected to the inner surface of the cut 38. Here, the upper portion of the lock element 36 can be moved slightly by the elastic deformation of the coupling element 41 and by the elastic deformation of the lock element 36.

Two pairs of positioning protrusions 37 are located along each of the two peripheral walls 33 of the inlet / outlet recess 32. The positioning protrusion 37 is provided in such a manner that when the chip tray 11 is stored in the storage 26, the positioning protrusion 37 is received inside the recess 22 of the chip tray 11. Is positioned. Thus, even when the chip tray 11 is rotated in the circumferential direction by 90 ° at the predetermined position shown in Fig. 3 and pushed into the storage portion 26, the positioning projection 37 is formed in the chip tray 11. It interferes with the periphery region 17A of the main component 17 and thereby prevents the chip tray 11 from being inserted into the reservoir 26. That is, the chip tray 11 must be stored in the storage portion 26 of the storage tray 12 in such a manner that the positioning protrusion 37 does not interfere with the periphery region 17A, and the chip tray 11 has a predetermined position. The inside of the storage part 26 at the position where the tapered edge K is located as shown in FIG. 3 or another position (the position where the chip tray 11 is rotated by 180 ° as compared to the figure of FIG. 3). It is located exactly at

As shown in Fig. 6, the depth of the storage portion 26 is such that the chip tray 11 (the upper unit 14 and the lower unit 15 are vertically connected to each other) is within the thickness range of the storage tray 12. It is defined in such a way that it is stored completely inside the storage 26. In the state shown in FIG. 6, the tip end of the first protrusion 18 of the upper unit 14 is located in substantially the same plane as the surface of the tray 24, and the square rib 20 of the lower unit 15 is located. The tip end of φ is located above the bottom of the frame 27 and does not extend outward from the frame 27.

The frame 27 extends downward from the periphery of the tray 24, and a step 27A having a height lower than that of the upper side of the tray 24 is formed on the upper end of the frame 27. When the plurality of housings 10 are vertically coupled to each other as shown in FIG. 10, the lower end of the frame 27 of the storage tray 12 of one housing 10 is the storage tray of the other housing 10. It is attached to the step part 27A of the frame 27 of (12). As shown in Figs. 2 and 1, a pair of recesses 43 with openings directed downward are formed on the back of the frame 27. Figs. In addition, a pair of hooks 44 are coupled to both sides of the frame 27.

In order to store the chip C in the housing 10, each chip C is lowered in such a way that its four sides are positioned opposite the corresponding four first protrusions 18 of the lower unit 15. It is mounted to the main part 17 of the unit 15. Next, the upper unit 14 in such a manner that the first projection 18 lying along the step 17B of the step unit 17B and the lower unit 15 meshes with the square rib 20 of the upper unit 14. ) And the lower unit 15 are vertically connected to each other. Thus, the second protrusion 19 of the upper unit 14 is located exactly above the chip C stored in the lower unit 15. This prevents the chip C from moving out of position. That is, the lower unit 15 is covered and closed by the upper unit 14. [The upper side including the chip C] in such a manner that the positioning protrusion 37 of the storage portion 26 of the storage tray 12 is accommodated in the recess 22 of the upper unit 14 and the lower unit 15. The chip tray 11 constituted by the unit 14 and the lower unit 15 is correctly positioned; Thereafter, the chip tray 11 is pushed into the storage 26. At this time, the periphery region 17A of the upper unit 14 and the lower unit 15 slides along the small protrusion 40 of the lock element 36 of the storage 26, so that the lock element 36 is It is slightly inclined outward by elasticity. When the lower side of the periphery region 17A of the lower unit 15 is mounted and contacts the flange 34 of the reservoir 26, the lock element 36 is restored to its initial position, and thus the lock element 36 The small protrusion 40 of is in engagement with the upper side of the periphery region 17A of the upper unit 14. That is, the chip tray 11 is held vertically by the small protrusion 40 of the flange 34 and the lock element 36. This prevents the vertical movement of the chip tray 11. Therefore, the chip tray 11 can be firmly stored in the storage 26 of the storage tray 12 while maintaining the vertically connected state of the upper unit 14 and the lower unit 15.

Similarly, another chip tray 11 holding the chip C is stored in another storage portion of the storage tray 12; Thus, a fully loaded state of the housing 10 as shown in FIG. 1 can be realized.

Like the lower unit 15, the plurality of chips C may be held by the upper unit 14. When the two housings 10 are vertically coupled to each other as shown in FIG. 10, the chip C held in the upper unit 14 is covered by the lower unit 15. That is, when one housing 10 in which the chip C is held in the upper unit 14 is coupled to and covered with the other housing 10 vertically, the lower unit 15 of the other housing 10 The second protrusion 19 is located precisely above the chip 10 held in the upper unit 14 of one housing 10.

In order to take out the chip 10 from the chip tray 11 held in the storage portion 26 of the storage tray 12 of the housing 10, the engagement between the chip tray 11 and the lock element 36 is released. To this end, an external force is forcibly applied to the chip tray 11, thereby taking the chip tray 11 out of the opening of the inlet / outlet recess 32 of the storage unit 26. Then, the upper unit 14 is separated from the lower unit 15 to expose the chip C, so that the chips can be taken out individually.

As described above, this embodiment is designed such that the chip C is held between the upper unit 14 and the lower unit 15. This makes it possible to collectively transport the plurality of chip trays 11 held by the storage tray 12, and to prevent the chip C from unexpectedly leaving and being displaced during the transfer.

In addition, the vertical movement of the chip tray 11 can be prevented by the flange 34 and the lock element 36 of the reservoir 26. By flipping the storage tray 12, the chip tray 11 can be easily flipped out of the storage 26 and taken out. This makes it possible to quickly carry out tests such as electrification inspection on both sides of the chip (C).

When the plurality of housings 10 are vertically coupled to each other, the chip C held by the upper unit 14 of one housing 10 is covered by the lower unit 15 of the other housing 10. Therefore, the chip C can be held reliably.

The invention is not necessarily limited to this embodiment, and the invention is modified in various ways with regard to the shape, position and orientation of the elements and components described above without departing from the scope of the invention as defined by the appended claims. Can be.

For example, as long as each storage unit 26 is designed to store at least one chip tray 11, the number of storage units 26 formed in the storage tray 12 may be increased or decreased. In order to improve visual recognition, different colors may be applied to the chip tray 11 and the storage tray 12. This makes it possible to smoothly attach the chip tray 11 to the storage tray 12 and also to detach the chip tray 11 from the storage tray 12 smoothly. Of course, various design changes may be made to the upper unit 14 and the lower unit 15 according to the dimensions of the chip C and the number of the chips C. FIG.

In addition, as long as the vertical movement of the chip tray 11 held in the storage tray 26 can be securely ensured, the number of the lock elements 36 and the position of the lock elements 36 can be appropriately modified.

The lock element 36 is not necessarily designed to have a small protrusion 40 at its upper end. That is, the lock element 36 can be modified in such a way that the small protrusion 40 is formed at both the upper and lower ends of the lock element 36. In this modification, the small protrusions 40 formed at the upper and lower ends of the lock element 36 are engaged with the upper unit 14 and the lower unit 15, respectively. This ensures stable storage conditions. In addition, even when only the upper unit 14 is retained in the storage portion 26, the engagement between the upper unit 14 and the small protrusion 40 of the lock element 36 can be reliably achieved, so that the upper unit 14 Can prevent vertical movement.

According to the present invention, even when the housing rattles during the transfer, the positional movement of the semiconductor chip can be prevented to maintain stable storage conditions for the semiconductor chip; Compact size can be realized with respect to the housing, and when a plurality of housings are vertically coupled to each other, it is possible to reduce the total space required for conveyance of the housing; Reduce the number of different parts required for the upper unit and the lower unit; Increase the total number of semiconductor chips transferred simultaneously.

Claims (6)

Housing, At least one chip tray holding a plurality of semiconductor chips, A storage tray for storing the one or more chip trays; A chip tray is formed by vertically connecting an upper unit and a lower unit, wherein the plurality of semiconductor chips are held between the upper unit and the lower unit. The housing of claim 1, wherein the chip tray is formed in an appropriate size and is fully retained inside the storage tray within a thickness range of the storage tray. The housing according to claim 1 or 2, wherein the storage tray has a plurality of engagement portions, and the engagement portion realizes engagement with the chip tray while maintaining the vertically connected state of the upper unit and the lower unit. The housing according to claim 1 or 2, wherein both the upper unit and the lower unit have the same structure, so that the lower unit is covered by the upper unit. The housing according to claim 1 or 2, wherein when the housing is vertically coupled with the other housing, the plurality of semiconductor chips are also held between the upper unit of the housing and the lower unit of the other housing. The housing of claim 1 or 2, wherein the plurality of semiconductor chips can each be encapsulated in a surface mount chip package.

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