JP4607138B2 - Tray for semiconductor integrated circuit - Google Patents

Description

  The present invention relates to a tray for storing a semiconductor integrated circuit such as an IC, and more particularly to a tray suitable for storing a ball grid array type semiconductor integrated circuit having a large number of terminals on the bottom surface.

  Conventionally, a ball grid array type semiconductor integrated circuit is housed in a tray having a configuration disclosed in Patent Document 1, for example, and is stored and transported.

  This tray is configured such that one semiconductor integrated circuit is stored in each of a plurality of pockets partitioned into rectangles by partition frames arranged in the vertical and horizontal directions on the upper surface of the tray.

  In addition, in order to make it easier to accommodate the semiconductor integrated circuit stored from above in the pocket, the partition frame has a tapered cross-sectional shape in which the base is widened, and the semiconductor integrated circuit is being accommodated while the semiconductor integrated circuit is being stored. In order to prevent the circuit from being caught diagonally by being caught on the frame surface of the partition frame, a predetermined gap is formed between the periphery of the inner bottom surface of the pocket and the periphery of the bottom surface of the semiconductor integrated circuit.

  For this reason, when the semiconductor integrated circuit stored in the pocket has a rotational deviation in the horizontal direction with respect to the upper and lower surfaces of the semiconductor integrated circuit, the slope of the partition frame having a tapered cross section (calling in) described above The guide) cannot correct the rotational deviation of the semiconductor integrated circuit, and the semiconductor integrated circuit is stored in the pocket with the rotational deviation.

  In addition, even in a semiconductor integrated circuit stored in a pocket without rotational deviation, a predetermined gap is opened between the inner bottom surface of the pocket and the bottom surface of the semiconductor integrated circuit. Since it is in a state where it can be freely rotated in the horizontal direction, there is a risk that rotational displacement will occur in the stored semiconductor integrated circuit.

Japanese Patent Laid-Open No. 11-145315 (pages 1-7, FIGS. 1-7)

  According to the present invention, when the semiconductor integrated circuit to be stored in the tray storage pocket has a horizontal rotational shift, or the semiconductor integrated circuit already stored in the storage pocket has a horizontal rotational shift. Even in such a case, it is possible to provide a tray for a semiconductor integrated circuit capable of correcting this rotational deviation within an allowable range.

In order to solve the above-described problems, a semiconductor integrated circuit tray according to the present invention has a storage pocket for a semiconductor integrated circuit which is partitioned into rectangles by vertical and horizontal partition frames having a tapered cross-sectional shape in which a base is widened on an upper surface. The pocket has a concave portion on the inner bottom surface, and has a support step portion for supporting the peripheral edge of the bottom surface of the semiconductor integrated circuit between the concave portion and the base of the partition frame. A tray for storing a semiconductor integrated circuit provided with a plurality of terminals on a bottom surface provided with a rectangular downward frame substantially similar to the pocket on the lower surface, wherein the tray has at least one surface facing each pocket of the partition frame the frame surface, a part of the frame surface in the partition frame, has a small becomes upward inclination angle than the upstream angle of inclination of the other Wakumen portion, Oyo stowed into the pocket of the semiconductor integrated circuit If the rotational displacement in the horizontal direction in a state that is already housed in the pocket occurs, guides the bottom peripheral portion of the semiconductor integrated circuit, the down slip while rotating the same semiconductor integrated circuit due to the weight of the semiconductor integrated circuit Thus, a semiconductor integrated circuit tray in which a correction slope for guiding the semiconductor integrated circuit to an appropriate storage position in the pocket is formed upward from the base of the partition frame.

  In addition, the correction slope is formed in the central part or the vicinity of the central part or the both ends or the vicinity of both ends of the partition frame.

  The upper end of the correction slope is made lower than the upper end of the partition frame forming the correction slope.

  Further, the correction slope is formed on all the frame surfaces facing the pocket.

  The inner dimension of the lower end edge of the downward frame is smaller than the inner dimension of the inner bottom surface of the pocket.

  Further, in the tray, a tray having a partition frame or pocket of the same shape is configured to be stacked in multiple stages with the upper and lower surfaces of the tray facing each other.

  According to the tray for a semiconductor integrated circuit of the present invention, even when the semiconductor integrated circuit is stored in the pocket of the tray in a state where the rotational deviation in the horizontal direction occurs with respect to the upper and lower surfaces of the semiconductor integrated circuit, the partition around the pocket One end of the side in the vicinity of the bottom surface of the semiconductor integrated circuit in a state where the rotational deviation in the horizontal direction is brought into contact with the correction slope formed in the central part of the frame or in the vicinity of the central part, and forms a pocket. A semiconductor integrated circuit in which a large movement in the horizontal direction is restricted by the partition frame is used for correction while the bottom surface of the semiconductor integrated circuit reaches the bottom of the pocket by going down the correction slope due to its own weight. One end of the side of the bottom peripheral part of the semiconductor integrated circuit that contacts the slope descends the correction slope while being rotated in one horizontal direction by the correction slope, and the appropriate inside of the pocket It can be housed so as to approach the storage position.

  In addition, when the semiconductor integrated circuit stored at an appropriate position in the pocket freely rotates in the horizontal direction with respect to the inner bottom surface of the pocket, one end of the side in the periphery of the bottom surface of the semiconductor integrated circuit is a partition frame around the pocket. A part or all of the bottom surface of the semiconductor integrated circuit is lifted from the bottom surface of the pocket by riding on the correction slope formed in the central portion or near the central portion while freely rotating in the horizontal direction with respect to the inner bottom surface of the pocket. In addition, the semiconductor integrated circuit in which a large amount of movement in the horizontal direction is restricted by a partition frame forming a pocket when the semiconductor integrated circuit descends the correction slope by its own weight and descends the correction slope is a correction slope. Rotate in the direction opposite to the direction of rotation when riding on the slope, descend the correction slope, and return to the storage position before riding on the correction slope. Because, it can be stowed close to the proper storage position always in the pocket of a semiconductor integrated circuit which is accommodated in the pocket.

  Therefore, even when the semiconductor integrated circuit is taken out of the tray pocket by a machine by automation, the semiconductor integrated circuit can be smoothly supplied to the next process without being corrected after the take-out.

Hereinafter, a tray for a semiconductor integrated circuit according to the present invention will be described with reference to the accompanying drawings.
As shown in FIG. 1, the tray 1 accommodates a ball grid array type semiconductor integrated circuit 9, and the tray 1 can be used by stacking a plurality of trays 1 up and down. When used, the upper surface of the tray 1 functions as a storage container, and the lower surface functions as a lid of the storage container.

  When a plurality of trays 1 are stacked and used, when a plurality of trays 1 are stacked by a pair of protrusions (not shown) formed on the upper and lower surfaces of the frame side 1a of the tray 1, the upper tray 1 The protrusions on the lower surface of the frame side 1a and the protrusions on the upper surface of the frame side 1a of the lower tray 1 are engaged so that they can be stacked stably.

  In addition, handles 1b are provided on the left and right sides of the tray 1, and a notch 1c for distinguishing the directionality of the tray 1 is formed on the front edge of the frame side 1a.

Further, the tray 1 has a lightened body portion for weight reduction, and each pocket 3 for housing the semiconductor integrated circuit 9 is disposed between each support hand 1d connected to the frame side 1a and each pocket 3. It is supported by each supporting hand 1d. Moreover, the form of the body portion shown in the present embodiment is an example.
Reference numeral 1 e in FIG. 1 is an opening generated by reducing the weight of the tray 1.

  And each pocket 3 which accommodates the semiconductor integrated circuit 9 divides the tray 1 upper surface into a rectangle by arrange | positioning the partition frame 2 which has the taper-shaped cross-sectional shape which a base spreads on the tray 1 upper surface, The inside of the compartment, that is, the inside of the compartment divided by the vertical and horizontal partition frames 2 is a pocket 3.

  The partition frame 2 shown in FIGS. 2 and 3 is such that the upper end of the partition frame 2 is positioned higher than the central portion in the corner portion of the pocket 3, and the partition frame 2 shown in FIG. In contrast to the partition frame 2, the central portion of the pocket 3 is positioned higher than the corner portion. However, if desired, the upper end position of the partition frame 2 is set to the corner portion in FIGS. In FIG. 9, it may be formed at the same height as the central portion.

  Depending on the shape of the semiconductor integrated circuit 9 to be accommodated, the pocket 3 may be formed in a square shape in plan view as shown in FIG. 4, or may be formed in a rectangle shape in plan view as shown in FIG. is there.

  In the center of the pocket 3 (see FIGS. 4 and 8), a substantially similar recessed portion 5 slightly smaller than the bottom surface of the semiconductor integrated circuit 9 is provided. The depth up to 6 is deeper than the protruding length from the bottom surface of the terminal 9 a provided on the bottom surface of the semiconductor integrated circuit 9.

  Further, a support step 4 for supporting the peripheral edge of the bottom surface of the semiconductor integrated circuit 9 is formed between the upper edge of the recess 5 and the base of the partition frame 2.

  The upper opening of the pocket 3 has an opening size larger than the bottom surface size of the semiconductor integrated circuit 9, and the upper opening of the pocket 3, that is, the inner side of the partition frame 2 forming the pocket 3, An incoming guide 7 having a downward slope is formed from the inner upper edge toward the support step 4 so that the semiconductor integrated circuit 9 accommodated from above the pocket 3 can be easily guided into the pocket 3 by the incoming guide 7. I have to.

  In addition, the guide guide 7 shown in the present embodiment is one in which the inclination angle of the lower portion of the slope is larger than the slope of the upper portion. The specific value is about 70 degrees ascending with respect to the upper surface of the support step 4, and the specific value of the inclination angle on the slope of the lower part of the guide guide 7 is about 80 degrees with respect to the upper surface of the support step 4. ing.

  Further, a correction guide 8 adjacent to the above-described guide guide 7 is provided inside the partition frame 2, and the semiconductor integrated circuit 9 accommodated from above the pocket 3 is horizontal to the upper and lower surfaces of the semiconductor integrated circuit 9. The semiconductor integrated circuit 9 which is about to be stored in a state where a rotational deviation in the direction has occurred is corrected by the correction guide 8 in the horizontal direction. The specific numerical value of the inclination angle on the slope of the correction guide 8 is about 45 degrees with respect to the upper surface of the support step portion 4.

  The correction guide 8 provided inside the partition frame 2 is appropriately provided depending on the shape of the semiconductor integrated circuit 9, and the semiconductor integrated circuit in which the corner portion shown in each of FIGS. 5, 6, and 7 is cut. 9 is a semiconductor in which a correction guide 8 is provided in the vicinity of the center portion of the partition frame 2 (see FIG. 4), and the corner portions shown in FIGS. 10 and 11 are not cut. For correction of the integrated circuit 9, correction guides 8 are provided in the vicinity of both end portions of the partition frame 2 (see FIG. 8).

The correction operation of the semiconductor integrated circuit 9 by the correction guide 8 will be described with reference to FIGS. This description is a correction operation by the correction guide 8 when the semiconductor integrated circuit 9 with the corner portion cut is put in the pocket 3 in which the correction guide 8 is provided in the vicinity of the center portion of the partition frame 2 (see FIG. 4). The correction operation by the correction guide 8 in the case where the semiconductor integrated circuit 9 in which the corner portion is not cut is inserted into the pocket 3 in which the correction guide 8 is provided in the vicinity of both ends of the partition frame 2 (see FIG. 8) is also shown in FIG. The correction operation is performed in the same manner as described with reference to FIGS.
The pocket 3 shown in FIGS. 5, 6, and 7 is the pocket 3 shown in FIG.

  As shown in FIG. 5A, the semiconductor integrated circuit 9 in which the rotational deviation in the horizontal direction with respect to the upper and lower surfaces of the semiconductor integrated circuit 9 is caused to be stored in the pocket 3 from above the pocket 3 in the tray 1. 5 (b) and FIG. 6, the semiconductor integrated circuit 9 entering from above is located on the slope of the correction guide 8 formed on the inner surface of the partition frame 2 around the pocket 3, as shown in FIG. While the end 9b of the side in the vicinity of the bottom surface of 9 is in contact and the end 9b is in contact with the slope of the correction guide 8, the slope of the correction guide 8 is lowered to the upper surface of the support step 4 in the pocket 3. The end portion 9b of the semiconductor integrated circuit 9 is guided toward the inside of the pocket 3 by the inclined surface that goes down toward the inside of the pocket 3 of the correction guide 8, and as shown in FIG. End 9b of integrated circuit 9 is supported If Part 4 finishes down to the top surface, the rotational displacement in the horizontal direction of the semiconductor integrated circuit 9 is corrected within an allowable range of at least rotational shift housing.

  Further, reference numeral 2a in the drawings in the embodiment is a downward frame formed on the lower surface of the tray 1, and a rectangular frame that is substantially similar to the pocket 3 on the upper surface of the tray 1 on the lower surface of the tray 1 below the pocket 3 by the downward frame 2a. The housing part is formed, the reference numeral 4a is a ceiling part in the downward frame 2a, and the reference numeral 7a is a call guide.

  A rectangular accommodating portion that is substantially similar to the pocket 3 on the upper surface of the tray 1 formed on the lower surface of the tray 1 is stacked in multiple stages at the time of the pre-mounting inspection performed with the terminals 9a on the bottom surface of the semiconductor integrated circuit 9 facing upward. The semiconductor integrated circuit 9 housed in the pocket 3 on the upper surface of the lower tray 1 is partitioned by the downward frame 2a on the lower surface of the upper tray 1 that has been covered so far by turning the stacked trays 1 upside down. The semiconductor integrated circuit 9 accommodated in the pocket 3 on the upper surface of the lower tray 1 accommodates the terminal 9a on the bottom in the accommodated storage portion so that the semiconductor integrated circuit 9 faces upward. When being housed, the semiconductor integrated circuit 9 is made to be easily called into the downward frame 2a by the call guide 7a.

  Further, in the drawing shown in the embodiment, there is no correction guide 8 formed on the partition frame 2 on the upper surface of the tray 1 described above, but the same type of correction guide may be formed on the frame surface facing the storage portion of the downward frame 2a. is there.

  In this paper, it has been described that the tray of the present invention is suitable for housing a ball grid array type semiconductor integrated circuit. However, there are various configurations of the semiconductor integrated circuit, such as a pin grid array type. The present invention can also be applied to semiconductor integrated circuits of other modes.

The top view which shows an example of the tray for semiconductor integrated circuits which concerns on this invention. The expanded sectional view of the AA part shown in FIG. The expanded sectional view of the BB part shown in FIG. The enlarged plan view of the pocket in the tray for semiconductor integrated circuits of FIG. The figure which shows the insertion process to the pocket of a semiconductor integrated circuit. The top view which shows correction | amendment operation | movement. The top view which shows correction | amendment operation | movement. The enlarged plan view which shows the pocket of another shape. The expanded sectional view of the CC part shown in FIG. The top view which shows correction | amendment operation | movement. The top view which shows correction | amendment operation | movement.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Tray 1a Frame edge 1b Handle 1c Notch 1d Support hand 1e Opening 2 Partition frame 2a Downward frame 3 Pocket 4 Support step part 4a Ceiling part 5 Recessed part 6 Inner bottom 7 Call-in guide 7a Call-in guide 8 Correction guide 9 Semiconductor integrated circuit 9a terminal 9b end

Claims (7)

The upper surface includes a plurality of storage pockets for a semiconductor integrated circuit that are partitioned into rectangles by vertical and horizontal partition frames having a tapered cross-sectional shape with a base extending, the pockets having recesses on the inner bottom surface, and the recesses and the partitions A terminal is provided on the bottom surface having a supporting step portion for supporting the peripheral edge of the bottom surface of the semiconductor integrated circuit between the base portion of the frame and a rectangular downward frame substantially similar to the pocket on the lower surface below the pocket. A tray for storing a semiconductor integrated circuit provided with a large number of parts , wherein at least one frame surface facing in each pocket of the partition frame, a part of the frame surface of the partition frame , and another frame surface portion of a small becomes upward inclination angle than the upstream angle of inclination, caused rotation displacement in the horizontal direction already state of being accommodated stowed and within the pocket into the pocket of the semiconductor integrated circuit If, to guide the bottom peripheral portion of the semiconductor integrated circuit, by unloading sliding while rotating the same semiconductor integrated circuit by the weight of the semiconductor integrated circuit, a correction slope for guiding the semiconductor integrated circuit in the proper storage position within the pocket A tray for a semiconductor integrated circuit formed upward from the base of the partition frame.
  2. The tray for a semiconductor integrated circuit according to claim 1, wherein the slope for correction is formed in a central part or a vicinity of the central part of the partition frame.   2. The tray for a semiconductor integrated circuit according to claim 1, wherein the correction slope is formed on both ends of the partition frame or in the vicinity of both ends.   2. The tray for a semiconductor integrated circuit according to claim 1, wherein an upper end portion of the correction slope is made lower than an upper end portion of a partition frame forming the correction slope.   2. The tray for a semiconductor integrated circuit according to claim 1, wherein the slope for correction is formed on all the frame surfaces facing in the pocket.   The tray for a semiconductor integrated circuit according to claim 1, wherein an inner dimension of a lower end edge of the downward frame is smaller than an inner dimension of an inner bottom surface of the pocket.   2. The tray for a semiconductor integrated circuit according to claim 1, wherein a tray having a partition frame or a pocket having the same shape is configured to be stacked in multiple stages with the upper and lower surfaces of the tray facing each other.

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