JP5678494B2 - Electronic device storage container - Google Patents

Description

  The present invention relates to a storage container for an electronic device, for example, a storage container such as a tray for holding and storing an electronic device such as a semiconductor chip during transportation or shipment.

  Conventionally, semiconductor chips obtained by dividing a semiconductor wafer into pieces by a dicing process are stored in a tray for use in the next process, transported and shipped, and supplied to the next process.

  In order to protect the surface of the semiconductor chip from contacting and damaging the surface of the semiconductor chip due to vibration and shock during transportation during transportation and shipment using such a tray, the chip moves by providing a protrusion on the tray cover side. It has been proposed not to. In addition, it has been proposed to make the material of the portion where the electrode terminals provided on the semiconductor chip come into contact with each other flexible so as not to be scratched.

  However, the method in which the protrusion is provided on the tray lid side has a problem that the electrode terminal is scratched if the electrode terminal, for example, an area bump is disposed on the entire chip surface. In addition, there is a problem that the cost of the tray rises in a method using another soft material only for the contact portion with the electrode terminal.

  As a technique for solving such a problem, there is a method in which the shape of the cavity on the lid side of the tray is tapered so that the surface of the semiconductor chip does not directly contact the lid side of the tray. In recent years, semiconductor chips, for example, in a stack MCP in which a plurality of chips are stacked, have been becoming thinner year by year with the demand for thinner semiconductor chips, and the proportion of thin chips in the number of shipments has increased. ing.

  Here, an example of a conventional tray will be described with reference to FIGS. 10 and 11 are explanatory views of the structure of a conventional tray, FIG. 10 (a) is a pocket side plan view, and FIG. 10 (b) is a lid side plan view. 11A is a side view, FIG. 11B is a cross-sectional view taken along the alternate long and short dash line connecting AA ′ in FIG. 10A, and FIG. 11C. These are sectional drawings along the dashed-dotted line which connects BB 'in Fig.10 (a).

  As shown in the drawing, the upper surface side of the tray 50 is a pocket side, pockets 51 for storing semiconductor chips are provided in a matrix, and a partition 52 is formed between adjacent pockets 51. On the other hand, the lower surface side of the tray 50 is the lid side, and an inverted square frustum-shaped cavity 53 is provided so as to face the pocket 51, and a partition 54 is formed between the adjacent cavities 53. A fitting portion 55 is provided on the outer periphery of the tray 50.

  Such a tray 50 is generally made of ABS resin, and the pocket side and the lid side are integrally formed by a mold.

  FIG. 12 is a cross-sectional view of the tray in a stacked state. As shown in FIG. 12A, the pocket-side partition 52 and the end of the lid-side cavity 53 are in contact with each other, and the semiconductor chip 56 is in the pocket 51. It is a design standard that fits within. The number of stacks is generally 5 to 10 sheets.

  At this time, as shown in FIG. 12B, the dimensions of the fitting portions on the pocket side and the lid side are designed with some allowance in order to prevent the fitting. This margin is called stack play, and the end shape of the cavity 53 on the lid side is generally made about 0.3 mm larger than the opening shape of the pocket 51. In other words, the stack backlash is an indispensable dimension for preventing fitting.

  Therefore, when transporting, the upper tray and the lid side of the lower surface and the pocket side of the upper surface of the lower tray are displaced by the amount of stack play. Therefore, the cavity 53 provided on the lid side is made larger than the size of the pocket 51 of the lower tray so that the surface of the semiconductor chip does not contact the lid of the upper tray. That is, when the stack play is 0.3 mm, the cavity 53 is also made larger by 0.3 mm.

  FIG. 13 is an explanatory diagram of the relationship between the stack backlash and the cavity / pocket size. As shown in FIG. 13A, when the tray cavity / pocket size is designed ignoring the stack backlash, vibration is generated. When the positional deviation is caused by the stack backlash due to the above or the like, the surface of the semiconductor chip 56 and the end of the cavity 53 (the right end in the drawing) come into contact. In the reference numerals, 1 represents a lower tray, and 2 represents an upper tray.

  On the other hand, as shown in FIG. 13B, when the tray cavity / pocket size is designed in consideration of the amount of stack play, the cavity 53 is also displaced even when the position shift is caused by vibration or the like. The end of this does not exceed the end of the pocket 51. Therefore, the surface of the semiconductor chip 56 and the end of the cavity 53 do not come into contact with each other and the semiconductor chip 56 is not damaged.

JP 2002-110778 A JP 2002-002871 A

  However, the current standard is that the standard design of the tray is used as the standard for thick chips, and as the percentage of shipments of thin chips increases, problems that have not been seen in the past have begun to be seen. The circumstances will be described with reference to FIGS. In the reference numerals, 1 represents a lower tray, and 2 represents an upper tray.

  14A and 14B are explanatory diagrams of chip mounting, FIG. 14A is an explanatory diagram for a thin chip, and FIG. 14B is an explanatory diagram for a thick chip. As shown in FIG. 14A, when the positional deviation is caused by the stack backlash due to vibrations or the like, the semiconductor chip 56 rides up as described above with reference to FIG. 13B. This is because, at the end in the direction shifted due to the positional deviation, a riding space 57 is generated between the tapered edge of the cavity 53 and the partition 52 between the pockets 51 so that the semiconductor chip 56 can ride on.

  For example, when the stack backlash is designed with 0.3 mm, the stack backlash (0.3 mm) / 2 + the difference between the cavity / pocket (0.3 mm) / 2 is generated, and thus a 0.3 mm riding space 57 is generated. To do.

  On the other hand, as shown in FIG. 14B, in the case of the semiconductor chip 56 having a chip thickness of 300 μm (= 0.3 mm) or more, even if such a space is generated, the cavity is formed before the semiconductor chip 56 is mounted. Since it collides with the side end portion of the tapered shape of 54, the ride does not occur.

  This will be described in the process of picking up the semiconductor chip 56. As illustrated in FIG. 14, when the semiconductor chip 56 is accommodated in the tray 50 and stacked as shown in FIG. As shown in (b), the semiconductor chip 56 is laid up. When the tray 50 on the upper lid side is opened with the semiconductor chip 56 mounted, the semiconductor chip 56 jumps out of the pocket 51, and a problem occurs in the pick-up process of the semiconductor chip 56.

  For example, in the pickup process, as shown in FIG. 15C, the INDEX 58 of the semiconductor chip 56 in the tray 50 is generally recognized by the camera 59 of the pickup device. However, when the semiconductor chip 56 is mounted, a chip position recognition error occurs because the semiconductor chip 56 exists obliquely with respect to the camera 59.

  For example, as shown in the left diagram of FIG. 15D, when the ride has occurred, the image is distorted compared to the case of the right diagram in which no ride has occurred, and therefore, the position of the INDEX 58 is the normal position. It will be recognized out of position.

  In this state, when the semiconductor chip 56 is picked up from the tray 50 by the suction collet 60 of the pickup device, as shown in FIG. 16 (e), if no boarding has occurred, the suction collet 60 is in a normal position. Is induced.

  On the other hand, when the boarding has occurred, as shown in FIGS. 16 (f) and 16 (g), when the suction collet 60 is lowered to suck the semiconductor chip 56, the tray 50 and the suction collet are moved. A semiconductor chip 56 is sandwiched between the semiconductor chip 56 and the semiconductor chip 56. In some cases, the semiconductor chip 56 may be damaged.

  Therefore, an object of the present invention is to prevent the electronic device chip from being carried in the stacked tray.

According to one aspect of the disclosure, the storage unit having a storage recess separated by a first partition that stores the electronic device, the storage unit provided at a position facing the storage recess, and separated from the surface of the electronic device. The electronic device storage container is formed of a lid having a space recess separated by a second partition, and the engagement partition is provided in the first partition around the storage recess. In addition, there is provided an electronic device storage container characterized in that an engagement convex portion that engages with the engagement concave portion is provided in the second partition portion around the space concave portion.

  According to the disclosed electronic device storage container, it is possible to prevent the electronic device chips from being loaded in the stacked trays, and thus it is possible to prevent quality deterioration due to thin chip tray shipment.

BRIEF DESCRIPTION OF THE DRAWINGS It is structure explanatory drawing of the storage container for electronic devices of embodiment of this invention. It is explanatory drawing of the effect of the storage container for electronic devices of embodiment of this invention. It is a top view of the tray for semiconductor chips of Example 1 of this invention. It is the side view and sectional drawing of the tray for semiconductor chips of Example 1 of this invention. It is a top view of the tray of the state which accommodated the semiconductor chip. It is the side view and sectional drawing of the tray of the state which accommodated the semiconductor chip. It is sectional drawing of the tray of a stack state. It is explanatory drawing to the middle of the pick-up process of a semiconductor chip. It is explanatory drawing after FIG. 8 of the pick-up process of a semiconductor chip. It is a top view of the tray for the conventional semiconductor chips. It is the side view and sectional drawing of the tray for the conventional semiconductor chips. It is sectional drawing of the tray of a stack state. It is explanatory drawing of the relationship between stack play and cavity / pocket size. It is explanatory drawing of chip riding. It is explanatory drawing to the middle of the pick-up process of the conventional semiconductor chip. FIG. 16 is an explanatory view of FIG. 15 and subsequent drawings of a conventional semiconductor chip pickup process.

  Here, with reference to FIG.1 and FIG.2, the storage container for electronic devices of embodiment of this invention is demonstrated. FIG. 1 is a configuration explanatory view of a storage container for an electronic device according to an embodiment of the present invention, FIG. 1 (a) is a perspective view as viewed from the storage portion side, and FIG. 1 (b) is as viewed from the lid side. It is a perspective view. The electronic device is typically a semiconductor chip, but is not limited to a semiconductor chip, and can be applied to other electronic device chips such as a superconducting device chip and a ferroelectric optical device chip.

  As shown in FIG. 1 (a), on the storage portion side of the electronic device storage container 1, storage concave portions 2 for storing electronic devices are arranged in a matrix, separated by a partition portion 3, and adjacent to each other. The storage recesses 2 are connected by engagement recesses 4. The engaging recess 4 does not necessarily have the same depth as the storage recess 2 and does not necessarily have to be in contact with and pass through the storage recess 2.

  As shown in FIG. 1B, on the lid side of the electronic device storage container 1, space recesses 5 are arranged in a matrix, separated by a partitioning portion 6, at positions facing the storage recesses 2. An engaging convex portion 7 is provided in the partition portion 6 between the adjacent concave portions 5 for space.

  The space recess 5 is preferably an inverted quadrangular pyramid-shaped recess whose side end surface is forward tapered, and the inclination angle of the side end surface is 30 ° to 60 °, for example, about 45 °. Is desirable. If it is less than 30 °, it is insufficient to form a space for avoiding contact with the surface of the semiconductor chip. On the other hand, if it exceeds 60 °, the range of chip sizes that can be handled becomes narrow. .

  Further, the engaging convex portion 7 is provided at a position facing the engaging concave portion 4, and aligns with the engaging concave portion 4 when a plurality of electronic device storage containers are stacked. It is desirable that the side end face is tapered on the end side of the space recess 5 of the engagement protrusion 7. In addition, the fitting part 8 is provided in the peripheral part of the container 1 for electronic devices.

  The electronic device storage container 1 is made of ABS resin, as in the case of the conventional tray, and the storage portion and the lid portion are usually integrally formed with the front and back sides by a mold. Note that the storage portion and the lid portion may be formed separately as a storage tray and a lid tray.

FIG. 2 is an explanatory diagram of functions and effects of the electronic device storage container according to the embodiment of the present invention. 2 (a) is a fragmentary cross-sectional view showing a state in which the upper electronic device container 1 ₂ and the lower electronic device container 1 ₁ is overlapped in the normal position. Here, it shows as sectional drawing along the centerline of the recessed part for accommodation. Contour line which is not hatched in the figure, a engaging recess 4 ₁ positioned therebetween and accommodating recess 2 _first sidewall for lower electron devices that look side diagrammatic container 1 ₁ in cross section. As apparent from the figure, the engaging protrusions 7 ₂ of the upper electronic device container 1 ₂ is engaged with the lower engagement recess 4 ₁ and clear of the electronic device receiving container 1 _1.

2 (b) is a fragmentary cross-sectional view when shifted by half the stack backlash, relatively left electronic device container 1 ₂ the upper is relative to container 1 ₁ for the lower part of the electronic device The state which shifted | deviated to is shown.

  FIG. 2C is a cross-sectional view of the main part when the stack play is shifted, and even if the stack play is shifted, the board space on the left side of the figure does not occur. This is because the engaging convex portion 7 provided on the lid portion comes into contact with the edge of the electronic device 9, and the electronic device 9 can be prevented from climbing up.

  In other words, the engagement recess portion 4 provided in the partition portion 3 around the storage recess portion 2 is provided with the engagement protrusion portion 7 provided in the periphery of the space recess portion 5 in the lid portion as a chip riding space that causes the electronic device 9 to ride. It is possible to eliminate it physically.

  As described above, in the present invention, since the chip riding space is physically eliminated by the engagement between the engaging concave portion and the engaging convex portion, when the thin chip tray is shipped, the lid portion is caused by vibration during transportation. Even when the storage unit moves by the amount of stack play, no boarding occurs. Thereby, it is possible to contribute to the improvement of defects at the time of conveyance or mounting by tray shipment and the improvement of product quality. The above description is based on the assumption that the shape of the electronic device is a square. However, in the case of a rectangular chip, the planar shape of the storage recess 2 and the space recess 5 is rectangular. Needless to say.

  Based on the above, a tray for a semiconductor chip according to the first embodiment of the present invention will be described next with reference to FIGS. Here, a description will be given of a tray for storing semiconductor chips having a size of 20 mm × 20 mm square and a thickness of 250 μm. For example, the tray 10 is integrally formed with the front and back surfaces using a mold using ABS resin.

  3A is a plan view of the pocket side, and FIG. 3B is a plan view of the lid side. FIG. 4A is a side view, FIG. 4B is a cross-sectional view taken along the alternate long and short dash line connecting AA ′ in FIG. 3A, and FIG. These are sectional drawings along the dashed-dotted line which connects BB 'in Fig.3 (a). Further, FIG. 4D is a cross-sectional view taken along the alternate long and short dash line connecting CC ′ in FIG.

  As shown in the figure, the upper surface side of the tray 10 becomes a pocket portion, and the pockets 11 having a size of 21 mm × 21 mm square and a depth of 1.0 mm for storing semiconductor chips are provided in a matrix shape, and a pitch of 28.0 mm is provided. Between the adjacent pockets 11, partition portions 12 are formed. An engaging recess 13 having a width of 10 mm and a depth of 1.0 mm is formed in the partition portion 12 so as to connect the adjacent pockets 11.

  On the other hand, the lower surface side of the tray 10 is a lid, and the inverted square pyramid-shaped cavity 21 having a taper angle of 45 ° is 21.3 mm × 21 so that the stack play is 0.3 mm at a position facing the pocket 11. .3 mm square and a depth of 3.0 mm.

  An engaging convex portion 23 having a height of 1.0 mm and a width of 9 mm is formed at a position facing the engaging concave portion 13 of the partition portion 22 around the cavity 21, and the cavity of the engaging convex portion 23 is formed. The side end surface toward the end of 21 is an inclined surface having a taper angle of 45 °.

  In addition, the entire thickness of the tray 10 is 8 mm, a planar size of 101.6 mm × 101.6 mm square, and a peripheral width of 4.9 mm (= (101.6-91.8) / 2). The part constitutes the fitting part 24. The distance between the bottom surface of the pocket 11 and the bottom surface of the cavity 21 is 1.0 mm.

  FIGS. 5A and 5B are explanatory views of the configuration of the tray in a state in which the semiconductor chip is accommodated. FIG. 5A is a plan view of the pocket side, and FIG. 5B is a plan view of the lid side. FIG. 6A is a side view, FIG. 6B is a cross-sectional view taken along the alternate long and short dash line connecting AA ′ in FIG. 5A, and FIG. 6C. These are sectional drawings along the dashed-dotted line which connects BB 'in Fig.5 (a). Further, FIG. 6D is a cross-sectional view taken along the alternate long and short dash line connecting CC ′ in FIG.

  FIG. 7 is a cross-sectional view of the tray in a stacked state, and FIG. 7A is a cross-sectional view along the position corresponding to the alternate long and short dash line connecting AA ′ in FIG. (B) is sectional drawing along the position corresponding to the dashed-dotted line which connects CC 'in Fig.5 (a). As shown in FIG. 7A, the engaging convex portion 23 engages with the engaging concave portion 13 so as to bite. Further, as shown in FIG. 7B, the engaging convex portion 23 is in the same stacked state as in the prior art at a position along the alternate long and short dash line connecting CC ′ where the engaging concave portion 13 does not exist.

  Next, with reference to FIG. 8 and FIG. 9, the pick-up process of the semiconductor chip 30 when the tray according to the first embodiment of the present invention is used will be described. As shown in FIG. 8A, when the semiconductor chip 30 is housed and stacked in the tray 10 and is misaligned due to vibration or the like due to vibration or the like, as shown in FIG. In addition, the semiconductor chip 30 does not rise.

  As shown in FIG. 8C, when the upper lid-side tray 10 is opened in such a state, the semiconductor chip 10 is normally stored in the pocket 11. In order to pick up the semiconductor chip 30, the INDEX 31 of the semiconductor chip 30 in the tray 10 is recognized by the camera 41 of the pickup device. At this time, as shown in FIG. 8D, since no boarding has occurred, the image has no distortion in the shape. Therefore, the position of the INDEX 31 is observed at the normal position.

  In this state, when the semiconductor chip 30 is picked up from the tray 10 by the suction collet 42 of the pickup device, the suction collet 42 is positioned using the position of the INDEX 31 as a mark, as shown in FIG.

  Next, as shown in FIG. 9 (f), the suction collet 42 is lowered to suck the semiconductor chip 30, and then the suction collet 42 is lifted as shown in FIG. Will be picked up normally.

  In the first embodiment of the present invention, the engaging concave portion is provided around the pocket and the engaging convex portion is provided around the cavity so that they can be engaged with each other in a stacked state. Therefore, even if the stack rattle moves due to vibration or the like in the stack state, as described with reference to FIG. 2, there is no boarding space, so there is no boarding of the semiconductor chip, and the semiconductor chip is damaged in the pickup process. Etc. does not occur.

1, 1 ₁ , 1 ₂ Electronic device storage container 2, 2 ₁ Storage recess 3 Partition 4, 4 ₁ Engagement recess 5 Spatial recess 6 Partition 7, 7 ₂ Engagement protrusion 8 Fitting 9 Device 10, 50 Tray 11, 51 Pocket 12, 52 Partition 13 Engaging recess 21, 53 Cavity 22, 54 Partition 23 Engaging projection 24, 55 Fitting 30, 30 Semiconductor chip 57 Riding space 31, 58 INDEX
41, 59 Camera 42, 60 Adsorption collet

Claims (5)

A storage portion having a storage recess separated by a first partition for storing an electronic device;
A lid portion that is provided at a position facing the storage recess, is formed apart from the surface of the electronic device, and has a space recess separated by a second partition portion;
While providing a recess for engagement in the first partition around the recess for storage,
An electronic device storage container, wherein an engaging convex portion that engages with the engaging concave portion is provided in the second partition portion around the space concave portion.   The electronic device storage container according to claim 1, wherein the storage portion and the lid portion are formed integrally with the front and back sides.   3. The electronic device storage container according to claim 1, wherein a side end surface of the space recess is a forward tapered side end surface.   The engagement recess provided in the first partition around the storage recess is a recess having the same depth as the storage recess and penetrating between the adjacent storage recesses. The electronic device storage container according to any one of claims 1 to 3.   The engagement convex portion provided in the second partition portion around the space recess has a forward tapered side end surface on the end side of the space recess. Item 5. The electronic device storage container according to any one of Items 4.

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