KR20070051425A - Method for driving plasma display panel - Google Patents

Abstract

It is an object of the present invention to provide a method of driving a plasma display panel in which address discharge is stably performed in consideration of the temperature of the panel.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, a unit frame displaying an image is divided into a plurality of subfields, and each subfield initializes all of the discharge cells. A reset period, an address period for distinguishing a cell to be turned on and a cell not to be turned on, and a sustain period for performing sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on In the method of driving a plasma display panel divided into

In the reset period, the falling pulse is applied to the first electrode of the plurality of electrodes, and the lowest level of the falling pulse applied after the predetermined subfield of each subfield is varied according to the temperature of the panel. It provides a driving method.

Description

Method for driving plasma display panel {Method for driving plasma display panel}

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

5 is a timing diagram illustrating a driving signal as an example of a method of driving a plasma display panel of the present invention.

6 is a timing diagram of a selective reset driving method that can be employed in the driving method of the plasma display panel of the present invention.

Explanation of symbols on the main parts of the drawings

Y1, ..., Yn ... first electrodes or scan electrodes

A1, ..., Am ... second electrodes or address electrodes

X1, ..., Xn ... third electrodes or sustain electrodes

Vsch ... high level of injection pulse Vscl ... low level of injection pulse

Vs ... high level of holding pulse Vg ... low level of holding pulse

High level of Va ... display data signal

ΔVa, ΔVb ... Potential difference between lowest level of falling pulse and low level of scanning pulse

The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel in which address discharge is stably performed in consideration of the panel temperature.

Recently, a plasma display panel, which is drawing attention as a replacement of a conventional cathode ray tube display device, is discharged after a discharge gas is filled between two substrates on which a plurality of electrodes are formed. The phosphor formed in a predetermined pattern by the ultraviolet rays is excited to obtain a desired image.

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

In the drawing, during the reset period, the rising pulse and the falling pulse are applied to the scan electrodes, and the bias voltage is applied to the sustain electrodes when the falling pulse is applied to initialize the entire discharge cell. In the address period, scan pulses are sequentially applied to the scan electrodes, display data signals are applied to the address electrodes to perform address discharge, and in the sustain period, sustain pulses are alternately applied to the scan electrodes and sustain electrodes. Thus, the sustain discharge is performed in the discharge cells in which the address discharge is performed, that is, divided into the cells to be turned on.

As described above, according to the driving signal of the conventional plasma display panel, a constant driving signal is applied to each electrode regardless of the temperature characteristic of the panel.

On the other hand, the rising pulse in the reset period serves to accumulate negative wall charges around the scan electrodes, and the falling pulse serves to erase the accumulated negative wall charges. Since the scan electrodes perform address discharge with the address electrodes during the address period, it is important to control the wall charges by applying the falling pulse in the reset period. In the related art, as shown in FIG. 1, the low level of the scanning pulse and the lowest level of the falling pulse are set to be similar to each other. However, when the lowest level of the falling pulse is set to a level similar to the low level of the scanning pulse, the wall charges erased in the vicinity of the scanning electrode tend to be erased too much, so that the address discharge may not be stably performed. . In addition, even when the same wall charge is erased near the scan electrode when the falling pulse is applied, the discharge characteristic of the address discharge is changed depending on the temperature characteristic of the panel.

The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a method of driving a plasma display panel in which address discharge is stably performed in consideration of the panel temperature.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, and a unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into entire discharge cells. A sustain discharge is performed according to a reset period for initializing, an address period for distinguishing a cell to be turned on and a cell not to be turned out of all the discharge cells, and a gray scale weight assigned to each subfield in the discharge cell selected as the cell to be turned on. In the method of driving a plasma display panel divided into periods,

In the reset period, the falling pulse is applied to the first electrode of the plurality of electrodes, and the lowest level of the falling pulse applied after the predetermined subfield of each subfield is varied according to the temperature of the panel. It provides a driving method.

According to such another feature of the present invention, the higher the temperature of the panel is, the higher the minimum level of the variable falling pulse is.

According to another aspect of the present invention, the panel temperature is divided into a plurality of temperature sections, and the higher the temperature in the temperature section, the higher the minimum level of the variable falling pulse.

According to another aspect of the present invention, the rising pulse may be applied before the falling pulse in the reset period of the first subfield of the plurality of subfields.

According to another aspect of the present invention, in the address period, a scan pulse having a low level while being maintained at a high level is sequentially applied to the first electrode, and a scan is applied to a second electrode crossing the first electrode among the plurality of electrodes. In response to the pulse, a display data signal having a high level is applied.

According to another feature of this invention, the low level of the scanning pulse is lower than the lowest level of the variable falling pulse.

According to another aspect of the present invention, a bias voltage is applied to the third electrode extending in parallel with the first electrode from the time of applying the falling pulse to the address period.

According to this still further feature of the present invention, in the sustain period, the sustain pulse having the high level and the low level is applied to the first electrode alternately.

According to another aspect of the present invention, in the sustain period, a sustain pulse having a high level and a low level is alternately applied to the third electrode extending alongside the first electrode, but alternately with the sustain pulse applied to the first electrode. Is authorized.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

The first electrodes (scan electrodes, Y1, ... Yn) and the third electrodes (hold electrodes, X1, ..., Xn) extend in parallel with each other, and the second electrodes (address electrodes, A1). Am extends in the direction crossing the first electrodes (scanning electrodes, Y1, ... Yn) and the third electrodes (holding electrodes, X1, ..., Xn). Discharge cells are defined in the intersecting area.

2 illustrates an electrode arrangement of a plasma display panel having a three electrode structure, the method of driving the plasma display panel of the present invention may be applied to a plasma display panel having a two electrode structure in addition to the plasma display panel having a three electrode structure. The following description will be based on the three-electrode structure.

The structure of the plasma display panel will be briefly described with reference to FIG. 2. The plasma display panel includes a first substrate and a second substrate, and a plurality of electrodes intersecting with each other between the first substrate and the second substrate, and the crossing regions. And a partition wall forming a discharge space together with the first substrate and the second substrate, a phosphor layer disposed in the discharge cell, and a discharge gas so as to define the discharge cells.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

Referring to this, the unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into a reset period, an address period, and a sustain period. The reset period is a period for initializing all the discharge cells, and the address period is a period for distinguishing the discharge cells that should be turned on and the discharge cells that should not be turned on among all the discharge cells, and the sustain period is a discharge cell selected as the discharge cells to be turned on. A sustain discharge period is performed according to the gray scale weights allocated to each subfield. The plasma display panel is driven by a time division driving method for applying a driving signal in accordance with the reset, address, and sustain periods for each subfield as described above.

In the drawing, the unit frame is divided into eight subfields SF1 to SF8, and each subfield is divided into a reset period (not shown), an address period A1 to A8, and a sustain period S1 to S8. The gray scale weight is allocated from the first subfield to the eighth subfield as 1T, 2T, ... 128T, but this is only an example and the present invention is not limited thereto. That is, the number of subfields of a unit frame may be less or more than eight, and the allocation of gray scale weights for each subfield may be changed according to a design specification, unlike illustrated.

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

Referring to the drawings, the plasma display apparatus of FIG. 4 once includes an image processor 300, a logic controller 302, a Y driver 304, an address driver 306, an X driver 308, and a plasma display panel ( 1) is provided.

The image processor 300 receives an external video signal such as a PC signal, a DVD signal, a video signal, or a TV signal from the outside, converts an analog signal into a digital signal, and processes the digital signal into an internal video signal. The internal video signals are 8-bit red (R), green (G), and blue (B) image data, clock signals, and vertical and horizontal sync signals, respectively.

The logic controller 302 receives the internal image signal from the image processor 300 and undergoes a gamma correction and an automatic power control (APC) step, respectively, to drive the Y drive control signal SY and the A drive control signal SA. And an X drive control signal SX.

The Y driver 304 receives the Y drive control signal SY from the logic controller 302 and applies a drive signal to the first electrode (scanning electrode), and the address driver 306 receives the logic signal from the logic controller 302. The driving signal is applied to the second electrode (address electrode) by receiving the address driving control signal SA, and the X driving unit 308 receives the X driving control signal SX from the logic controller 302 to the third electrode (holding electrode). Is applied to the drive signal. Hereinafter, the first electrode will also be described as the scan electrode, the second electrode as the address electrode, and the third electrode as the sustain electrode.

The Y driver 304 applies a reset pulse to the scan electrodes in the reset period. The reset pulse may be composed of only the falling pulse, and may be composed of the rising pulse and the falling pulse. The discharge cells are initialized while the wall charges are accumulated or erased in the discharge cells by the reset pulse. In addition, while maintaining the high level in the address period, the scan pulses having the low level are sequentially applied, and the sustain pulses having the high level and the low level are applied in the sustain period.

The address driver 306 applies a display data signal having a high level in accordance with the scan pulse in the address period. The address discharge is performed in the address period by the display data signal and the scanning pulse.

The X driver 308 applies a bias voltage from when the falling pulse is applied among the reset pulses to the end of the address period, and applies a sustain pulse having a high level and a low level in the sustain period, and a sustain pulse output from the Y driver. Alternately authorize.

5 is a timing diagram illustrating a driving signal as an example of a method of driving a plasma display panel of the present invention.

In the method of driving the plasma display panel according to the present invention, the lowest level of the falling pulses of the reset pulses applied to the scan electrodes in the reset period before the address period is varied so that the address discharge is stably performed according to the temperature of the panel. It is characterized by the fact that the minimum level of the falling pulse is variable only in the field or more. If the panel temperature is high, the lowest level of the falling pulse is high. If the panel temperature is low, the minimum level of the falling pulse is low. Of course, even if the lowest level of the falling pulse is variable, the lowest level of the falling pulse should be higher than the low level of the scanning pulse. Herein, the predetermined subfield may be changed according to a design specification. The lowest level of the falling pulse varies depending on the panel temperature only at or above the predetermined subfield because the address discharge improvement effect is large, and the address discharge is improved even if the minimum level of the falling pulse varies depending on the panel temperature below the predetermined subfield. This is because the effect is small.

The driving method of the above-described plasma display panel of the present invention will be described with reference to FIG.

In FIG. 5, the predetermined subfield is a fifth subfield SF5. Of course, it is not limited to this.

In the reset period PR4 of the fourth subfield, the falling pulse is applied as the reset pulse to the scan electrodes Y1, ..., Yn, and the falling pulse is applied to the sustain electrodes X1, ..., Xn. The bias voltage Vb is applied from time to time, and the low level, that is, the ground voltage Vg is applied to the address electrodes A1, ..., Am. Due to the application of the reset pulse and the bias voltage, the wall charges accumulated in the discharge cells are erased and the wall charge state is initialized. Since it is less than the fifth subfield SF5 which is a predetermined subfield, the lowest level of the falling pulse does not vary with temperature.

In the address period PA4 of the fourth subfield SF4, the scan pulses having the low level Vscl are sequentially applied while maintaining the high level Vsch to the scan electrodes Y1,..., And Yn. A display data signal having a high level Va is applied to the address electrodes A1, ..., Am in accordance with the scan pulse. The bias voltage Vb is continuously applied to the sustain electrodes X1,..., Xn. The address discharge is generated between the scan electrode and the address electrode due to the application of the scan pulse and the display data signal, and the discharge cell to be turned on is selected. That is, positive wall charges are accumulated in the vicinity of the scan electrode, a small amount of negative wall charges are accumulated in the vicinity of the address electrode, and negative wall charges are accumulated in the vicinity of the sustain electrode. The low level Vscl of the scan pulse may be lower than or equal to the lowest level of the falling pulse.

 In the sustain period PS4 of the fourth subfield, the high level Vs and the low level Vg are applied to the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn. The sustain pulses are alternately applied, and sustain discharge is performed in the discharge cells selected as the cells to be turned on in the address period PA4. The length of the sustain pulse corresponds to the gray scale weight, and as the gray scale weight increases, the length of the sustain pulse increases, so that the number of sustain discharges increases.

In the reset period PR5 of the fifth subfield, the falling pulse is applied to the scan electrodes Y1, ..., Yn, and the biasing time is applied to the sustain electrodes X1, ..., Xn. The voltage Vb is applied, and a low level, that is, a ground voltage Vg is applied to the address electrodes A1, ..., Am. However, since it corresponds to the fifth subfield SF5 which is a predetermined subfield, the lowest level of the falling pulse is varied according to the temperature of the panel. The higher the panel temperature, the higher the lowest level of the falling pulse. The lower the panel temperature, the lower the lower level of the falling pulse. Even if the lowest level of the falling pulse is variable, it is preferable to have a level higher than the low level (Vscl) of the scanning pulse. In addition, the lowest level of the falling pulse may be varied according to the temperature section by dividing into a plurality of temperature sections according to the temperature of the panel. If the temperature of the first temperature section is the highest, and the temperature of the third temperature section is the lowest, if the panel temperature corresponds to the first temperature section, the lowest level of the falling pulse is the highest, and the panel temperature is the third temperature. In the case of a section, the lowest level of the falling pulse is the lowest. In other words, the potential difference between the low level Vscl of the scanning pulse and the lowest level of the falling pulse is ΔVb in the first temperature section, ΔVa in the second temperature section, and 0 in the third temperature section. The higher the temperature of the panel, the lower the possibility of low discharge during address discharge. Therefore, less wall charges are applied when the falling pulse is applied. The lower the temperature of the panel, the higher the possibility of over discharge during address discharge. Eliminate a lot of wall charge when applied. Therefore, the lowest level of the falling pulse is varied as described above. On the other hand, in Figure 5, but divided into three temperature intervals is illustrated, but is not limited thereto.

In the address period PA5 of the fifth subfield, the scan pulses having the low level Vscl are sequentially applied to the scan electrodes Y1,..., And Yn, and the address electrodes are sequentially applied. Display data signals having a high level Va in accordance with the scanning pulse. In the reset period PR5 of the fifth subfield, the wall charges in the discharge cells, specifically the wall charges near the scan electrodes, are controlled in accordance with the panel temperature, so that the address discharges in the address period PA5 of the fifth subfield are controlled. It is stable. In other words, the possibility of low discharge or over discharge is significantly reduced.

In the sustain period PS5 of the fifth subfield, the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn have high level Vs and low level Vg. The sustain pulses are alternately applied to perform sustain discharge according to the gray scale weight assigned to the fifth subfield SF5.

After the sixth subfield, similarly to the reset period of the fifth subfield, the lowest level of the falling pulse is variable, whereby address discharge is stably performed.

Meanwhile, FIG. 5 illustrates a method of driving a plasma display panel according to the present invention. Although the electrode structure of the plasma display panel is described as having three electrodes, the present invention is not limited thereto, and the driving method of the present invention is a two-electrode structure. It is also applicable to a plasma display panel. That is, in the plasma display panel having a two-electrode structure in which discharge cells are defined in the region where the scan electrodes and the address electrodes intersect, the lowest level of the falling pulse applied to the scan electrodes in the reset period is varied according to the temperature of the panel. The lowest level of the falling pulse is varied only in the reset period of the predetermined subfield or more. In addition, a scan pulse is applied to the scan electrodes in the address period, an address pulse is applied to the address electrodes, and a sustain pulse having a high level and a low level is applied to the scan electrodes in the sustain period. As a result, the address discharge is stably performed even in the plasma display panel having the two-electrode structure.

6 is a timing diagram of a selective reset driving method that can be employed in the driving method of the plasma display panel of the present invention.

In the selective reset driving method, in the first subfield, a rising pulse and a falling pulse are applied to initialize all the discharge cells, and a reset discharge is performed while the negative wall charges are accumulated near the scan electrodes by applying the rising pulse. The application of the falling pulse erases the wall charges accumulated near the scan electrodes to perform the reset discharge. Reset discharge is performed in all the discharge cells to initialize the wall charge states of all the discharge cells. On the other hand, after the second subfield, in order to initialize only the discharge cells in which the sustain discharge has been performed, the rising pulse is not applied in the reset period, and only the falling pulse is applied. That is, in the discharge cells in which the sustain discharge has been performed, wall charges are accumulated in the discharge cells, so that the wall charges accumulated by the application of the falling pulse are erased and reset discharge is performed to initialize the wall charge state in the discharge cell, but the sustain discharge is not performed. In the non-discharged cells, since the wall charges are initialized in the reset period of the first subfield, even when the falling pulse is applied, the wall discharges are not erased and reset discharge is not performed. Using the selective reset driving method has an advantage that the reset period after the second subfield is shorter than the reset period of the first subfield, so that the addressing time of the high quality plasma display panel can be extended.

Referring to FIG. 6, in the reset period PR1 of the first subfield, the scan electrodes Y1,..., And Yn rise from the sustain discharge voltage Vs to the rise maximum voltage Vs + Vset. A pulse is applied, and a falling pulse that falls from the sustain discharge voltage Vs to the lowest falling voltage is applied. The falling minimum voltage is preferably equal to or greater than the low level Vscl of the scan pulse. The bias voltage Vb is applied to the sustain electrodes X1,..., And Xn when the falling pulse is applied. Since it is less than the predetermined subfield, that is, the fifth subfield, the lowest level of the falling pulse does not vary depending on the temperature of the panel.

In the address period PA1 of the first subfield, a scan pulse is applied to the scan electrodes Y1, ..., Yn, and a display data signal is applied to the address electrodes A1, ..., Am. The bias voltage Vb is applied to the sustain electrodes X1, ..., Xn. The address discharge is performed by applying the scan pulse and the display data signal.

In the sustain period PS1 of the first subfield, a sustain pulse is alternately applied to the scan electrodes Y1,..., And Yn and the sustain electrodes X1,. Maintenance discharge is performed.

In the reset period PR2 of the second subfield, only the falling pulse is applied to the scan electrodes Y1, ..., Yn.

The driving signals applied to the address period PA2 and the sustain period PS2 of the second subfield are the same as the first subfield. However, the length of the sustain pulse applied in the sustain period PS2 is applied according to the assigned gray scale weight.

According to the present invention as described above, the following effects can be obtained.

First, the minimum level of the falling pulse applied to the scan electrodes in the reset period is varied only in the case of more than a predetermined subfield, so that the address discharge is performed as a stable discharge rather than over discharge or low discharge in the address period.

Secondly, the driving method of the present invention also employs a selective reset driving method, so that the initialization of the discharge cells can be efficiently performed, and a shorter reset period can be assigned as an address period, thereby driving a high-quality plasma display panel. Do.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (9)

Discharge cells are defined in an area where a plurality of electrodes cross each other, and a unit frame displaying an image is divided into a plurality of subfields, and each subfield must be turned on during a reset period for initializing all discharge cells. A driving method of a plasma display panel divided into an address period for distinguishing a cell to be turned on and a cell not to be turned on, and a sustain period for performing sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on, In the reset period, a falling pulse is applied to a first electrode of the plurality of electrodes, and the lowest level of the falling pulse applied after a predetermined subfield of each subfield is variable according to the temperature of the panel. A method of driving a plasma display panel. The method of claim 1, And the lower the level of the variable falling pulse is, the higher the temperature of the panel is. The method of claim 1, And dividing the temperature of the panel into a plurality of temperature sections, and the higher the temperature of the temperature section is, the higher the minimum level of the variable falling pulses is. The method according to claim 2 or 3, And a rising pulse is applied before the falling pulse in the reset period of the first subfield among the plurality of subfields. The method of claim 4, wherein In the address period, a scan pulse having a low level is sequentially applied to the first electrode while a high level is applied to the first electrode, and a high level is matched to the scan pulse to a second electrode crossing the first electrode among the plurality of electrodes. And a display data signal is applied. The method of claim 5, And the low level of the scanning pulse is lower than the lowest level of the variable falling pulse. The method of claim 5, And a bias voltage is applied to a third electrode extending in parallel with the first electrode from the falling pulse applied to the address period. The method of claim 4, wherein And a sustain pulse alternately having a high level and a low level is applied to the first electrode in the sustain period. The method of claim 8, In the sustain period, a sustain pulse having a high level and a low level is alternately applied to a third electrode extending alongside the first electrode, and alternately applied to a sustain pulse applied to the first electrode. A method of driving a plasma display panel.

Images