KR100719579B1 - Method for driving plasma display panel - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of driving a plasma display panel in which reset discharges and address discharges respectively generated in a reset period and an address period are stably performed.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, a unit frame displaying an image is divided into a plurality of subfields, and each subfield initializes all of the discharge cells. A reset period, an address period for distinguishing a cell to be turned on and a cell not to be turned on, and a sustain period for performing sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on In the method of driving a plasma display panel divided into

In the reset period, a falling pulse is applied to the first electrode of the plurality of electrodes, but the application period of the falling pulse is divided into a first period of gradually falling and a second period of rapidly falling to maintain the first voltage. Provided is a method of driving a plasma display panel, wherein a bias voltage is applied to a second electrode extending parallel to a first electrode among the electrodes, when a falling pulse is applied, and the second electrode is floated for at least a second period. .

Description

Method for driving plasma display panel {Method for driving plasma display panel}

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

5 is a timing diagram illustrating an example of a method of driving a plasma display panel.

6 is a timing diagram illustrating a driving signal as an example of a method of driving a plasma display panel of the present invention.

Explanation of symbols on the main parts of the drawings

Y1, ..., Yn ... first electrodes or scan electrodes

X1, ..., Xn ... second electrodes or sustain electrodes

A1, ..., Am ... third electrodes or address electrodes

Vsch ... high level of injection pulse Vscl ... low level of injection pulse

Vs ... high level of holding pulse Vg ... low level of holding pulse

High level of Va ... display data signal

1st, 2nd period during the application period of T1, T2 ... falling pulse

ΔV ... potential difference between the lowest level of the falling pulse and the low level of the scanning pulse applied in the first period

The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel to stably perform reset discharge and address discharge respectively occurring in a reset period and an address period.

Recently, a plasma display panel, which is drawing attention as a replacement of a conventional cathode ray tube display device, is discharged after a discharge gas is filled between two substrates on which a plurality of electrodes are formed. The phosphor formed in a predetermined pattern by the ultraviolet rays is excited to obtain a desired image.

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

In the drawing, in the reset period, the rising pulse rising from the sustain discharge voltage Vs to the rising maximum voltage Vs + Vset to the scan electrodes Y1, ..., Yn, and the falling minimum at the sustain discharge voltage Vs. A falling pulse falling down to the voltage Vnf is applied, and a bias voltage Vb is applied to the sustain electrodes X1, ..., Xn from the time of applying the falling pulse to initialize all the discharge cells. In the address period, scan pulses having a high level Vsch and a low level Vscl are sequentially applied to the scan electrodes Y1,..., And Yn, and are applied to the address electrodes A1, ..., Am. A display data signal having a high level Va is applied in accordance with the scan pulse to perform address discharge. In the sustain period, the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., A sustain pulse having an alternating high level Vs and a low level Vg is alternately applied to Xn) so that the address discharge is performed, that is, the sustain discharge is performed in the discharge cells divided into cells to be turned on.

As described above, according to the driving signal of the conventional plasma display panel shown in FIG. 1, the lowest level of the falling pulse, that is, the potential of the falling minimum voltage Vnf is applied higher than the low level Vscl of the scanning pulse. The falling pulse erases the negative wall charges accumulated near the scan electrode by applying the rising pulse, but as shown in FIG. 1, the lowest level Vnf of the falling pulse is the low level Vscl of the scanning pulse. If applied higher, the amount of wall charges erased in the vicinity of the scan electrodes in the discharge cells is reduced, resulting in the problem of overdischarge during address discharge in the address period.

SUMMARY OF THE INVENTION The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a method of driving a plasma display panel in which the reset discharge and the address discharge generated in the reset period and the address period are performed stably. do.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, and a unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into entire discharge cells. A sustain discharge is performed according to a reset period for initializing, an address period for distinguishing a cell to be turned on and a cell not to be turned out of all the discharge cells, and a gray scale weight assigned to each subfield in the discharge cell selected as the cell to be turned on. In the method of driving a plasma display panel divided into periods,

In the reset period, a falling pulse is applied to the first electrode of the plurality of electrodes, but the application period of the falling pulse is divided into a first period of gradually falling and a second period of rapidly falling to maintain the first voltage. Provided is a method of driving a plasma display panel, wherein a bias voltage is applied to a second electrode extending parallel to a first electrode among the electrodes, when a falling pulse is applied, and the second electrode is floated for at least a second period. .

According to another aspect of the present invention, in the address period, a scanning pulse having a low level is sequentially applied to the first electrode while being sequentially applied, and extending across the first electrode and the second electrode of the plurality of electrodes. A display data signal having a high level in response to the scan pulse is applied to the third electrode, and a bias voltage is applied to the second electrode.

According to this still further feature of the present invention, in the sustain period, sustain pulses having a high level and a low level are alternately applied to the first electrode and the second electrode.

According to another aspect of the present invention, during the first period and the second period, the second electrode may be floated.

According to another aspect of the present invention, the rising pulse may be further applied before the falling pulse is applied to the first electrode in the reset period of at least the first subfield among the plurality of subfields.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

The first electrodes (scan electrodes, Y1, ... Yn) and the second electrodes (hold electrodes, X1, ..., Xn) extend in parallel with each other, and the third electrodes (address electrodes, A1). Am extends in a direction intersecting the first electrodes (scanning electrodes, Y1, ... Yn) and the second electrodes (holding electrodes, X1, ..., Xn). Discharge cells are defined in the intersecting area.

2 illustrates an electrode arrangement of a plasma display panel having a three electrode structure, the method of driving the plasma display panel of the present invention may be applied to a plasma display panel having a two electrode structure in addition to the plasma display panel having a three electrode structure. The following description will be based on the three-electrode structure.

The structure of the plasma display panel will be briefly described with reference to FIG. 2. The plasma display panel includes a first substrate and a second substrate, and a plurality of electrodes intersecting with each other between the first substrate and the second substrate, and the crossing regions. And a partition wall forming a discharge space together with the first substrate and the second substrate, a phosphor layer disposed in the discharge cell, and a discharge gas so as to define the discharge cells.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

Referring to this, the unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into a reset period, an address period, and a sustain period. The reset period is a period for initializing all the discharge cells, and the address period is a period for distinguishing the discharge cells that should be turned on and the discharge cells that should not be turned on among all the discharge cells, and the sustain period is a discharge cell selected as the discharge cells to be turned on. A sustain discharge period is performed according to the gray scale weights allocated to each subfield. The plasma display panel is driven by a time division driving method for applying a driving signal in accordance with the reset, address, and sustain periods for each subfield as described above.

In the drawing, the unit frame is divided into eight subfields SF1 to SF8, and each subfield is divided into a reset period (not shown), an address period A1 to A8, and a sustain period S1 to S8. The gray scale weight is allocated from the first subfield to the eighth subfield as 1T, 2T, ... 128T, but this is only an example and the present invention is not limited thereto. That is, the number of unit frames arbitrary subfields may be less than or greater than eight, and the allocation of the gradation weights for each subfield may be changed according to a design specification, unlike illustrated.

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

Referring to the drawings, the plasma display apparatus of FIG. 4 once includes an image processor 300, a logic controller 302, a Y driver 304, an address driver 306, an X driver 308, and a plasma display panel ( 1) is provided.

The image processor 300 receives an external video signal such as a PC signal, a DVD signal, a video signal, or a TV signal from the outside, converts an analog signal into a digital signal, and processes the digital signal into an internal video signal. The internal video signals are 8-bit red (R), green (G), and blue (B) image data, clock signals, and vertical and horizontal sync signals, respectively.

The logic controller 302 receives the internal image signal from the image processor 300 and undergoes a gamma correction and an automatic power control (APC) step, respectively, to drive the Y drive control signal SY and the A drive control signal SA. And an X drive control signal SX.

The Y driver 304 receives the Y drive control signal SY from the logic controller 302 and applies a drive signal to the first electrodes (scanning electrodes), and the address driver 306 is the logic controller 302. In response to the address driving control signal SA, the driving signal is applied to the third electrodes (address electrodes), and the X driving unit 308 receives the X driving control signal SX from the logic control unit 302. A driving signal is applied to the electrodes (holding electrodes). Hereinafter, the first electrode will also be described as the scan electrode, the second electrode as the sustain electrode, and the third electrode as the address electrode.

The Y driver 304 applies a reset pulse to the scan electrodes Y1, ..., Yn in the reset period. The reset pulse may be composed of only the falling pulse, and may be composed of the rising pulse and the falling pulse. The discharge cells are initialized while the wall charges are accumulated or erased in the discharge cells by the reset pulse. In addition, while maintaining the high level in the address period, the scan pulses having the low level are sequentially applied, and the sustain pulses having the high level and the low level are applied in the sustain period.

The address driver 306 applies a display data signal having a high level in accordance with the scan pulse in the address period. The address discharge is performed in the address period by the display data signal and the scanning pulse.

The X driver 308 applies a bias voltage from when the falling pulse is applied among the reset pulses to the end of the address period. In the context of the present invention, the sustain electrodes may be floated during the falling pulse application period. In the sustain period, a sustain pulse having a high level and a low level is applied, but alternately with a sustain pulse output from the Y driver.

5 is a timing diagram illustrating an example of a method of driving a plasma display panel, which is a driving signal for solving the problem of the driving signal of FIG. 1.

As shown in Fig. 1, the lowest level Vnf of the falling pulse applied to the scan electrodes Y1, ..., Yn in the reset period is applied to the scan electrodes Y1, ..., Yn in the address period. In order to solve the problem that the address discharge is over-discharged in the address period by being applied higher than the low level Vscl of the pulse, the driving signal of FIG. 5 has the lowest level of the falling pulse equal to the low level Vscl of the scanning pulse. Do it.

Referring to the drawings, rising pulses and falling pulses are applied to the scan electrodes Y1, ..., Yn in the reset period, and the sustain electrodes X1, ..., Xn are applied from the falling pulses. The bias voltage Vb is applied. The application period of the falling pulse is divided into a first period T1 that gradually falls and a second period T2 that rapidly drops to maintain the first voltage, and the first voltage is a low level of the scanning pulse applied in the address period ( Vscl). In this way, the negative wall charges that are erased near the scan electrodes when the falling pulse is applied are appropriately erased so that no over discharge occurs during the address discharge.

In the address period, scan pulses having a high level Vsch and a low level Vscl are sequentially applied to the scan electrodes Y1, ..., and Yn, and the address electrodes A1, ..., Am are applied. The display data signal having the high level Va is applied to the scan pulse, and the bias voltage Vb is continuously applied to the sustain electrodes X1, ..., Xn.

In the sustain period, the sustain pulses alternately having the high level Vs and the low level Vg alternate with the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn. Is approved.

Meanwhile, although the driving signal of FIG. 5 solves the problem of the driving signal of FIG. 1, a new problem arises. During the falling pulse, in particular, in the second period T2, the first voltage Vscl and the sustain electrodes X1, ..., Xn applied to the scan electrodes Y1, ..., Yn are applied. Due to the potential difference in the bias voltage (Vb), a problem that a discharge unexpectedly occurs at all has emerged.

For example, the sustain discharge voltage, that is, the high level Vs of the sustain pulse is approximately 200V, the bias voltage Vb is approximately 95V, the low level Vscl of the scan pulse is -175V, and the first When the lowest level of the falling pulse in the period T1 is approximately -163 V, the potential difference ΔV between the lowest level of the falling pulse in the first period T1 and the first voltage Vscl in the second period T2 is The difference is about 12V. Although a potential difference ΔV of about 12 V is generated between the scan electrode and the sustain electrode as compared with the driving signal of FIG. 1, the potential difference between the scan electrode and the sustain electrode is finally about 270V. Due to such a potential difference, an unexpected discharge occurs in the second period T2. When such a discharge occurs, positive wall charges accumulate near the scan electrodes, negative wall charges accumulate near the sustain electrodes, and scanning pulses are applied to the scan electrodes Y1, ..., Yn in the address period. Even if a display data signal is applied to the address electrodes A1, ..., Am, a problem arises in that address discharge is not performed.

6 is a timing diagram illustrating a driving signal as an example of a method of driving a plasma display panel of the present invention.

The driving method of the plasma display panel of the present invention includes a first period T1 which gradually lowers the falling pulse application period of the reset period so as to stably perform the reset discharge and the address discharge occurring in the reset period and the address period, respectively, and rapidly. It is divided and applied in a second period T2 that maintains the first voltage Vnf while falling, and the sustain electrodes X1,..., Xn are floated for at least the second period T2. . That is, it aims to solve all the problems of the drive signal of FIG. 1 and FIG.

It is also possible to employ the selective reset driving method in the driving method of the present invention. In the selective reset driving method, the rising pulse and the falling pulse are applied to the scan electrodes Y1,..., And Yn in the reset period PR1 of the first subfield, and the reset period PR2 after the second subfield. In PR8), only the falling pulse is applied to the scan electrodes Y1, ..., Yn. That is, in the reset period PR1 of the first subfield, the wall charges are accumulated in the discharge cells by applying the rising pulse, and the wall charges accumulated by the application of the falling pulse are erased to erase the wall charges of all the discharge cells. On the other hand, if only the falling pulse is applied in the reset period PR2 of the second subfield, since some of the wall charges are accumulated in the discharge cell in which the sustain discharge has been performed, even if only the falling pulse is applied without applying the rising pulse, the wall charges remain. The discharge cells are initialized while being erased. However, since the discharge cells, in which the sustain discharge has not been performed, are kept in the initialized state, since there is no accumulated wall charge, the wall charges are not erased when the falling pulse is applied. According to this method, the reset period PR2 after the second subfield can be shorter than the reset period PR1 of the first subfield, so that the reset period PR2 can be further allocated to the address period by the shortened period, so that the plasma of high quality can be obtained. It will be suitable for driving the display panel.

In the meantime, the driving method of the present invention will be described with reference to the drawings. In the reset period PR1 of the first subfield, the scan electrodes Y1, ..., Yn have a sustain discharge voltage, that is, a high level of the sustain pulse. A rising pulse rising from (Vs) to a rising maximum voltage (Vs + Vset) is applied, and a falling pulse falling from the sustain discharge voltage (Vs) is applied. The application period of the falling pulse is divided into a first period T1 that gradually falls and a second period T2 that rapidly falls to maintain the first voltage, where the first voltage is equal to the low level Vscl of the scan pulse. Do. On the other hand, the sustain electrodes (X1, ..., Xn) is applied to the bias voltage (Vb) from the application of the falling pulse, but is preferably floated for at least the second period (T2). For example, the sustain discharge voltage Vs is approximately 200V, the low level Vscl of the scanning pulse is approximately -175V, the lowest level of the first period T1 of the falling pulse is approximately -163V, and the first period. The potential difference ΔV between the lowest level of T1 and the low level Vscl of the scanning pulse is approximately 12V, and the bias voltage Vb is lowered to approximately 92V unlike the example of FIG. 5, and is floated in the second period T2. In this case, a voltage drop effect of approximately 5V occurs in the second period T2, and finally, the potential difference between the scan electrode and the sustain electrode becomes approximately 262V (92V + 175− (5V) = 262V}). As a result, erroneous discharges do not occur between the scan electrode and the sustain electrode during the second period T2, and wall charges are appropriately erased by the application of the falling pulse, so that the address discharge is stably performed. Meanwhile, it is also possible that the sustain electrodes X1,..., Xn are floated during the first period T1 and the second period T2.

In the address period PA1 of the first subfield, scan pulses having a high level Vsch and a low level Vscl are sequentially applied to the scan electrodes Y1,..., And Yn, and the address electrodes ( The display data signal having the high level Va is applied to A1, ..., Am in accordance with the scan pulse, and the bias voltage Vb is applied to the sustain electrodes X1, ..., Xn. Due to the application of the scan pulse and the display data signal, the address discharge is performed, but by the stable reset discharge in the reset period, the address discharge is also stably performed.

In the sustain period PS1 of the first subfield, the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn have a high level Vs and a low level Vg. Alternating holding pulses are applied alternately.

In the reset period PR2 of the second subfield, only the falling pulse is applied to the scan electrodes Y1, ..., Yn, and the selective reset driving method is applied. The reset period PR2 of the second subfield is the same as in the reset period PR1 of the first subfield, and the falling pulse application period is drastically lowered from the first period T1 in which the falling pulse gradually falls. It is divided into a second period T2 for maintaining the voltage. In addition, a bias voltage Vb applied to the sustain electrodes X1, ..., Xn is applied, and the sustain electrodes X1, ..., Xn are floated for at least the second period T2. As a result, erroneous discharge between the scan electrode and sustain electrode is prevented, the wall transfer in the discharge cell is appropriately erased by the application of the falling pulse, and address discharge is stably performed.

The address period PA2 and the sustain period PS2 of the second subfield are the same as the address period PA1 and the sustain period PS1 of the first subfield. However, the length of the sustain pulse applied to the sustain period PS2 of the second subfield is determined according to the assigned gray scale weight.

Although FIG. 6 illustrates a selective reset method, it may be possible to apply both a rising pulse and a falling pulse to each subfield.

In addition, the driving method of FIG. 6 illustrates only a driving method of the plasma display panel having a three-electrode structure, but is not limited thereto. That is, in the driving method of the two-electrode plasma display panel including only the scan electrodes extending in one direction and the address electrodes extending across the scan electrodes, a reset pulse, that is, a rising pulse and Apply only the falling pulse or the falling pulse, but the application period of the falling pulse is divided into a first period of gradually falling and a second period of rapidly falling to maintain the first voltage as shown in FIG. 6, and a bias voltage is applied to the address electrodes. At least the second period may float the address electrodes to prevent erroneous discharge in the reset period. Meanwhile, in the address period, a scan pulse may be applied to the scan electrodes, a display data signal may be applied to the address electrodes, and a sustain pulse may be applied to the scan electrodes in the sustain period.

According to the present invention as described above, the following effects can be obtained.

First, the driving period is divided into a first period T1 in which the falling pulse applied to the scan electrodes is gradually lowered and a second period T2 in which the first voltage Vscl is maintained to be rapidly lowered during the reset period. Since the sustain electrodes X1, ..., Xn are floated for at least the second period, no erroneous discharge occurs between the scan electrode and the sustain electrode, and wall charges are properly erased in the discharge cell after the end of the reset period. Address discharge is stably performed in the address period.

Secondly, the driving method of the present invention also employs a selective reset driving method, so that the initialization of the discharge cells can be efficiently performed, and a shorter reset period can be assigned as an address period, thereby driving a high-quality plasma display panel. Do.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (5)

Discharge cells are defined in an area where a plurality of electrodes cross each other, and a unit frame displaying an image is divided into a plurality of subfields, and each subfield has to be turned on during a reset period in which all of the discharge cells are initialized. A method of driving a plasma display panel divided into an address period for distinguishing a cell from a cell that should not be turned on, and a sustain period for performing a sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on, In the reset period, a falling pulse is applied to a first electrode of the plurality of electrodes, and the applying period of the falling pulse is divided into a first period of gradually falling and a second period of rapidly falling to maintain the first voltage. And a bias voltage is applied to the second electrode extending parallel to the first electrode among the plurality of electrodes from the falling pulse, and the second electrode is floated for at least a second period. How to drive the panel. The method of claim 1, In the address period, a scan pulse having a low level is sequentially applied to the first electrode, and a scan pulse having a low level is sequentially applied to the third electrode, and the third electrode extends to cross the first electrode and the second electrode. And a display voltage signal having a high level in response to the scanning pulse, and applying the bias voltage to the second electrode. The method of claim 1, And a sustain pulse having a high level and a low level is alternately applied to the first electrode and the second electrode in the sustain period. The method of claim 1, And the second electrode is floated during the first period and the second period. The method of claim 1, And during the reset period of the first subfield of the plurality of subfields, a rising pulse is further applied before the falling pulse is applied to the first electrode.

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