KR20050067308A - Method for fabricating liquid crystal display panel improving process of making wires - Google Patents

Abstract

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display panel, the method comprising: providing a first substrate divided into a pixel portion and a pad portion while simplifying a metal wiring forming process while maintaining a contact resistance as in the prior art; Forming a metal line including a gate / data line and a gate / data pad line in the pixel portion and the pad portion of the first substrate, respectively; Forming a switching device including a gate electrode and a source / drain electrode in a pixel portion of the first substrate; Depositing an interlayer insulating film on the entire surface of the first substrate; Coating a photosensitive material on the entire surface of the first substrate on which the interlayer insulating film is deposited; Forming a contact hole for exposing a part of the drain electrode of the pixel part by patterning the interlayer insulating film using a photolithography process, and forming a pad part contact hole for exposing a part of the gate pad wiring and the data pad wiring of the pad part; step; Depositing a conductive metal on the entire surface of the photoresist pattern including the contact hole; Removing the photoresist pattern on portions other than the contact hole region to leave a conductive metal layer only on the exposed drain electrode, gate pad wiring, and data pad wiring surfaces; And a pixel electrode connected to the drain electrode through the conductive metal layer in the pixel portion of the first substrate, and a gate pad electrode and data respectively connected to the gate pad wiring and the data pad wiring through the conductive metal layer in the pad portion. Forming a pad electrode.

Description

Manufacturing method of liquid crystal display panel which improved wiring formation process {METHOD FOR FABRICATING LIQUID CRYSTAL DISPLAY PANEL IMPROVING PROCESS OF MAKING WIRES}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display panel, and more particularly, to a method for manufacturing a liquid crystal display panel in which a process of forming metal wiring is simplified while maintaining a contact resistance as it is.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

To this end, the liquid crystal display device is a liquid crystal display panel which largely injects liquid crystal between an array substrate and a color filter substrate to output an image, and is installed on a rear surface of the liquid crystal display panel to provide light over the entire surface of the panel. A backlight unit for emitting a light emitting device, and a lower cover and a top case for supporting the liquid crystal display panel and each corner portion of the backlight unit to be fixed to each other.

Hereinafter, the liquid crystal display panel will be described in detail with reference to FIG. 1.

1 is a plan view schematically illustrating a structure of a general liquid crystal display panel.

As shown in the drawing, the liquid crystal display panel is largely formed of a color filter substrate 5 and an array substrate 10 and a liquid crystal layer (liquid crystal layer) formed between the color filter substrate 5 and the array substrate 10. 50).

The color filter substrate 5 distinguishes between a color filter 7 including a sub-color filter (red, green, blue) that implements color and the sub-color filter, and transmits the light passing through the liquid crystal layer 50. It is composed of a black matrix (6) for blocking the, and a transparent common electrode (8) for applying a voltage to the liquid crystal layer (50).

In addition, the array substrate 10 includes a plurality of gate lines 16, data lines 17, and gate lines 16 arranged vertically and horizontally on the substrate 10 to define a plurality of pixel regions 19. A thin film transistor (TFT) 20, which is a switching element formed at an intersection region of the data line 17, and a pixel electrode 18 formed on the pixel region 19 are formed.

The color filter substrate 5 and the array substrate 10 configured as described above are joined to face each other by sealants (not shown) formed on the outer side of the image display area to form a liquid crystal display panel. It is made through a bonding key (not shown) formed on the color filter substrate 5 or the array substrate 10.

In this case, the manufacturing process of the liquid crystal display panel basically requires a plurality of mask processes (ie, photolithography process), deposition, and etching processes to fabricate an array substrate including a thin film transistor. There is a need for a method of simplifying the series of manufacturing processes.

On the other hand, the gate wiring and the data wiring of the array substrate are required to suppress signal delay and disconnection, respectively, as a means for transmitting scan signals and data signals.

In particular, the wires must have a pad portion for receiving a signal from the outside or transmitting a signal to the outside, and the material used for the pad portion wire has a specific resistance of a certain level or less and is not easily oxidized. Should not be easily broken during manufacture.

Currently, a large area liquid crystal display panel employs a variety of multilayered metal wirings.

However, such a multi-layered wiring must be subjected to a plurality of deposition processes for depositing a multilayer metal film and a plurality of etching processes such as wet etching and dry etching for patterning the multilayer metal film. There is a problem.

As a result, the production yield is lowered and there is a problem of increasing the manufacturing time and cost of the liquid crystal display panel.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing a liquid crystal display panel which simplifies the process of forming metal wiring while maintaining the same contact resistance as before.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the manufacturing method of the liquid crystal display panel of the present invention comprises the steps of providing a first substrate divided into a pixel portion and a pad portion, each of the gate / data line and the pixel portion and the pad portion of the first substrate; Forming a metal line formed of a gate / data pad line, forming a switching element formed of a gate electrode and a source / drain electrode in a pixel portion of the first substrate, and depositing an interlayer dielectric layer on the entire surface of the first substrate Forming a contact hole exposing a part of the drain electrode of the pixel portion by patterning the interlayer dielectric layer by using a photolithography process; and applying a photosensitive material to the entire surface of the first substrate on which the interlayer dielectric layer is deposited. Forming a pad part contact hole exposing a part of the gate pad wire and the data pad wire of the pad part, wherein the contact hole is formed; Depositing a conductive metal on the entire surface of the photoresist pattern including an inside of the photoresist; removing the photoresist pattern outside the contact hole region to leave a conductive metal layer on the exposed drain electrode, gate pad wiring, and data pad wiring surface; 1, a pixel electrode connected to the drain electrode through the conductive metal layer is formed in the pixel portion of the substrate, and a gate pad electrode and a data pad electrode connected to the gate pad wiring and the data pad wiring through the conductive metal layer, respectively. Forming and bonding the first substrate and the second substrate which is a color filter substrate.

In this case, the forming of the metal wiring on the first substrate may include forming a plurality of gate lines on the pixel portion of the first substrate, and simultaneously forming gate pad wirings connecting the ends of the gate lines to the pad portion. And forming a plurality of data lines at the pixel portion of the first substrate and at the same time forming a data pad wiring connecting the ends of the respective data lines.

The forming of the switching element in the pixel portion of the first substrate may include forming a gate electrode connected to the gate line in each pixel region of the pixel portion, and a gate insulating film interposed therebetween. The method may include forming an active layer and an ohmic contact layer, and forming a source electrode and a drain electrode connected to the data line in each pixel area of the pixel unit.

The metal wire may be formed of a low resistance metal material such as aluminum or an aluminum alloy including aluminum-neodymium, and the data line including the drain electrode may be formed on the barrier metal layer such as molybdenum. The material may be formed of a double metal layer formed thereon.

In addition, the pixel electrode, the gate pad electrode, and the data pad electrode may be formed of a transparent metal material such as indium tin oxide, indium zinc oxide, or indium tin zinc oxide.

In addition, the conductive metal may be formed of a barrier metal such as molybdenum, chromium, or tungsten to reduce contact resistance between the metal wiring and the upper transparent electrode.

On the other hand, the photoresist pattern of the portion other than the contact hole region and the conductive metal deposited on the photoresist pattern may be simultaneously removed using a lift-off process, and the conductive metal material may be removed by using a stripper and ultrasonic waves in the lift-off process. A crack may be formed in the deposited photoresist pattern to remove it.

In this case, when the interlayer insulating layer is patterned, the edge region of the photoresist pattern may be exposed by overetching the interlayer insulating layer, and then the lift-off process may be performed.

Hereinafter, the present invention will be described in detail.

2A is a plan view schematically illustrating a general liquid crystal display panel structure.

As shown in the figure, the liquid crystal display panel 100 is largely a liquid crystal formed between an array substrate 110 and a color filter substrate 105 including a driving circuit unit and the array substrate 110 and the color filter substrate 105. It consists of layers (not shown).

The array substrate 110 is arranged horizontally and horizontally on the substrate 110 to define a plurality of gate lines 116, data lines 117, and the gate lines 116 and data lines that define a plurality of pixel regions 119. A thin film transistor (not shown), which is a switching element formed at an intersection region 117, and a pixel electrode (not shown) formed on the pixel region 119.

In this case, one side of the long side and one side of the array substrate 110 protrude relative to the color filter substrate 105 so that a driving circuit unit for driving the liquid crystal display panel is positioned. The gate pad part 106 is formed on one protruding short side of the substrate 110, and the data pad part 107 is formed on one protruding one side of the substrate 110.

In addition, the gate pad part 106 supplies a scan signal supplied from a gate driving circuit part (not shown) to the gate line 116 of each pixel area 119 of the pixel part which is an image display area, and the data pad part ( 107 supplies image information supplied from the data driver circuit unit (not shown) to the data line 117 of the pixel region 119.

Although not shown in the drawing, a color filter for implementing color and a common electrode which is a counter electrode of the pixel electrode formed on the array substrate 110 are formed in the image display area of the color filter substrate 105.

The array substrate 110 and the color filter substrate 105 configured as described above are joined to face each other by a sealant (not shown) formed on the outer side of the image display area to form the liquid crystal display panel 100. The bonding is performed through a bonding key (not shown) formed on the array substrate 110 or the color filter substrate 105.

Next, FIG. 2B is an enlarged plan view illustrating one pixel of the liquid crystal display panel illustrated in FIG. 2A and shows a part of the array substrate including the gate pad part and the data pad part.

As shown in the drawing, the array substrate is vertically and horizontally arranged on the substrate to drive the gate line 116 and the data line 117, which define one pixel area, and the gate line 116 and the data line 117. A gate pad portion and a data pad portion for connecting to a circuit portion (not shown), a thin film transistor which is a switching element formed at an intersection of the gate line 116 and the data line 117, and a pixel electrode 118 formed on the pixel region Consists of

The thin film transistor includes a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a drain electrode 123 connected to the pixel electrode 118. In addition, the thin film transistor may include a gate insulating film (not shown) for insulating the gate electrode 121 and the source / drain electrodes 122 and 123 and a source electrode 122 by a gate voltage supplied to the gate electrode 121. And an active layer 124 forming a conductive channel between the drain electrode and the drain electrode 123.

In this case, an interlayer insulating film (not shown) having a contact hole 140 is formed on the drain electrode 123, and the drain electrode 123 and the pixel electrode 118 are electrically connected through the contact hole 140. Will be.

Meanwhile, the gate line 116 and the data line 117 extend toward the driving circuit unit to form the gate pad wiring 116P and the data pad wiring 117P, respectively, and the gate pad wiring 116P and the data pad wiring ( The 117P receives scan signals and image information from the driving device through the gate pad electrode 121P and the data pad electrode 122P formed on the wirings 116P and 117P, respectively.

That is, an interlayer insulating film having a pad contact hole 140P is formed on the gate pad wiring 116P and the data pad wiring 117P, and the data and the gate pad wiring 116P are connected through the pad contact hole 140P. The pad wiring 117P is electrically connected to the gate pad electrode 121P and the data pad electrode 122P, respectively.

In addition, the gate pad electrode 121P and the data pad electrode 122P may be simultaneously formed of a transparent conductive material such as indium tin oxide together with the pixel electrode 118 of the pixel portion.

As described above, the gate pad wiring 116P, the data pad wiring 117P, and the drain electrode 123 are all the same, and the gate pad electrode 121P, the data pad electrode 122P, and the pixel electrode 118 are respectively formed on the same. It is electrically connected to a transparent conductive material, such as the contact resistance between the two metals is a very important factor that determines the image quality of the liquid crystal display panel with the specific resistance of the metal wiring.

Accordingly, the present invention provides a method of manufacturing a liquid crystal display panel by simplifying the manufacturing process by applying a single (or two-layer) metal wiring while maintaining the contact resistance as it is. That is, in the present invention, the manufacturing process is performed by depositing a barrier metal layer such as molybdenum at several to 500 kV in a state where the photoresist film remains after contact opening, and removing the photoresist film remaining on the portion other than the contact region and the barrier metal deposited on the photoresist film together. It relates to a technique for forming a simplified metallization.

In detail, after forming a metal wiring using a low-resistance aluminum-based metal material to reinforce the physical properties of the metal material and to improve the contact resistance with the upper transparent electrode (for example, indium-tin oxide). A barrier metal layer is formed on the metal wiring. In this case, the barrier metal layer may be formed using a lift off process that does not require an additional mask process and an etching process, thereby reducing the manufacturing process and cost of the liquid crystal display panel.

Hereinafter, exemplary embodiments of a method of manufacturing a liquid crystal display panel according to the present invention will be described in detail with reference to the accompanying drawings.

3A to 3J are cross-sectional views sequentially illustrating a manufacturing process of a liquid crystal display panel according to a first exemplary embodiment of the present invention. A process of manufacturing an array substrate of a pixel unit on the left side and an array substrate of a gate pad unit and a data pad unit on the right side. The process of manufacturing this is shown together.

First, as shown in FIG. 3A, the gate electrode 121 is formed in the pixel portion of the substrate 110 made of a transparent insulating material such as glass, and the gate pad wiring 116P is formed in the gate pad portion. The gate electrode 121 and the gate pad wiring 116P may be formed of a single layer of a low resistance metal material such as aluminum, aluminum-neodymium (˜4.7 × 10 ⁻⁶ Ωcm ⁻¹ ), or the like.

That is, a low resistance metal material such as aluminum or an aluminum alloy (eg, aluminum-neodymium) is deposited on the substrate 110 by using physical vapor deposition (PVD) such as sputtering. Patterning is performed by a wet etching method or a dry etching method to form a gate line including the gate electrode 121 and a gate pad line 116P connected to an external driving circuit at an end of the gate line.

For reference, the etching technique is a method of implementing a desired thin film pattern by selectively removing the thin film according to the pattern formed by the photoresist using a physical or chemical reaction, leaving the thin film of the portion where the photoresist pattern is formed The thin film in the portion without the photoresist is removed. In addition, the etching process includes a dry etching method using gas plasma and a wet etching method using a chemical solution.

Both wet etching and dry etching may be performed for the etching of the metal layer. However, when the isotropic etching characteristic of the wet etching is used, a tapered gate electrode 121 is advantageous for preventing short-circuits of various films formed on the gate electrode 121. Can be formed. The wet etching is a method of removing a thin film in accordance with a photoresist pattern by using a chemical solution, and has advantages such as good selectivity, etching uniformity at a large area, and low cost.

Meanwhile, a gate layer 121 and 116P may be formed on the glass substrate 110 after forming a buffer layer made of a silicon oxide layer (SiO ₂ ). The buffer layer serves to block impurities such as sodium (natrium) from the glass substrate 110 from penetrating into the upper layer during the process.

Next, as shown in FIG. 3B, the first insulating film 115a, the amorphous silicon thin film 124a, and the n + amorphous silicon thin film 125, which are a gate insulating film, are continuously formed on the entire surface of the substrate 110 on which the gate electrode 121 is formed. E). In this case, only the first insulating layer 115a is deposited on the entire surface of the substrate 110 on which the gate pad wiring 116P is formed.

The amorphous silicon thin film 124a is patterned and used as an active layer of a thin film transistor, and the n + amorphous silicon thin film 125 is formed for ohmic contact between a source / drain electrode and a source / drain region of the active layer.

Next, as shown in FIG. 3C, the first insulating film 115a, the amorphous silicon thin film 124a, and the n + amorphous silicon thin film 125 of the pixel portion are patterned using a photolithography process to form an active pattern in the pixel portion. 124 is formed.

Thereafter, as illustrated in FIG. 3D, a low resistance metal material 130 such as aluminum or an aluminum alloy is deposited on the entire surface of the substrate 110 by a sputtering method.

In this case, before depositing the low resistance metal material 130, a barrier metal layer such as molybdenum may be formed to improve contact resistance with the lower active layer 124.

Next, as illustrated in FIG. 3E, the conductive metal 130 is patterned using a photolithography process to cross the gate line with the gate line to define a pixel region, and the data line and the data line. A source electrode 122 and a drain electrode 123 are formed to be connected to each other, and a data pad line 117P is formed at the end of the data line to connect to an external driving circuit. Thereafter, the n + amorphous silicon thin film 125 is etched using the source / drain electrodes 122 and 123 as the mask to expose the active pattern 124 of the pixel portion.

Next, as shown in FIG. 3F, a second insulating film 115b, which is an interlayer insulating film, is deposited on the entire surface of the substrate 110, and then a photosensitive material such as a photoresist 170 is coated.

The second insulating film 115b may be formed of an inorganic insulating film, such as a silicon oxide film or a silicon nitride film, and an organic insulating film, such as benzocyclobutene (BCB) having a low dielectric constant, may be formed on the inorganic insulating film to achieve high opening ratio.

3G to 3I sequentially illustrate a process of forming a contact hole and a barrier metal layer in one photo process using a lift-off process.

First, as shown in FIG. 3G, a portion of the drain electrode 123 is exposed to the pixel portion of the second insulating layer 115b through an exposure and development process using a mask on the coated photoresist 170. The pad portion contact hole 140P exposing a part of the gate pad wiring 116P and the data pad wiring 117P is formed in the contact hole 140 and the gate pad portion and the data pad portion.

At this time, the etching of the second insulating film 115b may be wet etching or dry etching, but a dry etching method may be used to form a pattern that matches the pattern of the photoresist 170. The plasma etching method exhibiting the isotropic etching characteristic of the dry etching has the advantage of less physical impact due to less impact on the underlying layer and selective etching.

Thereafter, as illustrated in FIG. 3H, a conductive metal 180 such as molybdenum, chromium, and tungsten (W) is deposited on the entire surface of the photoresist 170 pattern including the contact holes 140 and 140P. .

The conductive metal layer 180 and the drain electrode 123 and the gate wiring pad (116P) and the data line pad (117P) and the metal wiring and an upper indium is formed in the same - the contact resistance of the oxide (to 10 - Tin ^{- 3} Ωcm ^-2 ) as a barrier metal to improve. In this case, the barrier metal may lower the contact resistance to about 10 ⁻⁶ Ωcm ⁻² even if only a few atomic layers exist, and also play an effective role in preventing corrosion.

Next, as shown in FIG. 3I, the photoresist 170 on which the conductive metal 180 is deposited is lifted off to the photoresist 170 and the photoresist 170 remaining in the portion other than the contact region. The deposited conductive metal 180 is removed together. At this time, the conductive metal 180 remains on the exposed drain electrode 123 surface of the pixel portion to form the barrier metal layer 180d, and the exposed gate pad electrode 116P and the data pad electrode 117P of the pad portion. A conductive metal remains on the surface to form the pad barrier metal layer 180P.

In the lift-off process, the conductive metal material 180 is formed to a predetermined thickness on the photosensitive material such as the photoresist 170 and then precipitated in a solution such as a stripper to thereby expose the photosensitive material on which the metal material 180 is deposited. The material 170 is removed at the same time as the metal material 180. In this case, the lower electrode, that is, the drain electrode 123, the gate pad electrode 116P, and the data pad are formed through the contact holes 140 and 140P. The conductive metal material 180 deposited on the surface of the electrode 117P is not removed and remains to form the barrier metal layers 180d and 180P.

In this case, an ultrasonic wave may be used to easily remove the photoresist 170 on which the conductive material 180 other than the contact region is deposited.

In addition, the removal of the photoresist 170 on which the conductive material 180 is deposited is performed through cracks formed in the photoresist 170 by strippers and ultrasonic waves.

Finally, as shown in FIG. 3J, indium-tin-oxide, indium-zinc-oxide (IZO), or indium-tin-zinc-oxide (Indium-Tin) is formed on the entire surface of the substrate 110. Depositing a transparent conductive material such as -Zinc-Oxide (ITZO), and then forming a pixel electrode 118 connected to the barrier metal layer 180d through the contact hole 140 of the pixel portion using a photolithography process. The gate pad electrode 121P and the data pad electrode 122P connected to the pad barrier metal layer 180d are formed through the pad contact holes 140P of the gate pad part and the data pad part.

At this time, the gate pad wiring 116P and the data pad wiring 117P are electrically connected to the gate pad electrode 121P and the data pad electrode 122P, respectively, and the molybdenum layer lowers the contact resistance of the two metal layers. Improves contact characteristics.

If the barrier metal layer is formed by using a lift-off process on the metal wiring layer after forming the metal wiring as a single layer or a double metal layer as described above, the contact resistance of the metal wiring is the same as before. It is possible to simplify the forming process while maintaining the quality. As a result, the overall manufacturing process and cost of the liquid crystal display panel can be reduced.

That is, conventionally, the formation of the double or triple metal wiring requires two and three metal material deposition processes and at least two and three etching processes, respectively, using a lift-off process as described above. When the barrier metal layer is formed, the same double layer or triple layer may be obtained by only one etching process. That is, the barrier metal layer (for example, molybdenum layer) formed by the lift-off process serves to reduce contact resistance between two metals, in particular, the pixel electrode and the aluminum-based metal, which is a low resistance metal, to pattern the contact hole. Since it is formed using the photoresist pattern applied at the time, there is an advantage that no additional etching process is required.

Meanwhile, the photoresist may not be properly removed due to the conductive metal material deposited on the inner side of the contact hole, that is, the side of the second insulating layer during the lift-off process as described above. 2, an embodiment of preventing the above problem by preventing a conductive metal material from being deposited on the side of the insulating film will be described.

4A to 4E are cross-sectional views sequentially illustrating a manufacturing process of a liquid crystal display panel according to a second exemplary embodiment of the present invention, and the same manufacturing process is performed to FIGS. 3A to 3E of the first exemplary embodiment.

That is, after passing through the same manufacturing process as that shown in FIGS. 3A to 3E, as shown in FIG. 4A, a second insulating layer 215b, which is an interlayer insulating layer, is deposited on the entire surface of the substrate 210. A photosensitive material such as resist 270 is applied.

Next, as shown in FIG. 4B, a portion of the drain electrode 223 is disposed in the pixel portion of the second insulating layer 215b through an exposure and development process using a mask on the applied photoresist 270. A pad portion contact hole 240P for exposing a portion of the gate pad wiring 216P and the data pad wiring 217P is formed in the contact hole 240 to be exposed and the gate pad portion and the data pad portion, respectively.

At this time, in the present embodiment, all the desired contact hole patterns 240 and 240P are formed so as not to deposit the conductive metal material on the side surface of the second insulating layer of the contact hole region, and then the etching process is performed. The insulating layer 215b is overetched to cause the photoresist 270 pattern edge region to protrude.

Thereafter, as illustrated in FIG. 4C, conductive metals 280 such as molybdenum, chromium, and tungsten are deposited on the entire surface of the photoresist 270 including the contact holes 240 and 240P.

In this case, the conductive metal material 280 is not deposited on the lower portion of the edge region of the photoresist 270 pattern (ie, the side surface of the second insulating layer 215b in the contact hole 240 and 240P regions).

Next, as shown in FIG. 4D, the photoresist 270 on which the conductive metal 280 is deposited is lifted off to the photoresist 270 and the photoresist 270 remaining in the portion other than the contact region. The deposited conductive metal 280 is removed together. At this time, the conductive metal 280 remains on the exposed drain electrode 223 surface of the pixel portion to form the barrier metal layer 280d, and the exposed gate pad electrode 216P and the data pad electrode 217P of the pad portion. A conductive metal remains on the surface to form the pad barrier metal layer 280P.

Finally, as shown in FIG. 4E, a transparent conductive material such as indium tin oxide, indium zinc oxide, or indium tin zinc oxide is deposited on the entire surface of the substrate 210, and then a photolithography process is performed. A pixel electrode 218 connected to the barrier metal layer 280d through the contact hole 240 of the pixel portion is formed, and through the pad portion contact hole 240P of the gate pad portion and the data pad portion, respectively. A gate pad electrode 221P and a data pad electrode 222P connected to the pad part barrier metal layer 280d are formed.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, in the method of manufacturing the liquid crystal display panel of the present invention, the barrier metal layer is formed by using a lift-off process to maintain the contact resistance of the metal wiring as in the past, and to improve the manufacturing process and cost of the liquid crystal display panel. Provides savings.

In addition, the manufacturing method of the liquid crystal display panel of the present invention can form a barrier metal layer without an additional mask process using a lift-off process after forming a multi-layer metal wiring in a single layer or a double metal layer.

That is, conventionally, the formation of the double or triple metal wiring requires two and three metal material deposition processes and at least two and three etching processes, respectively, using a lift-off process as described above. When the barrier metal layer is formed, the same double layer or triple layer may be obtained by only one etching process. That is, the barrier metal layer (for example, molybdenum layer) formed by the lift-off process serves to reduce contact resistance between two metals, in particular, the pixel electrode and the aluminum-based metal, which is a low resistance metal, to pattern the contact hole. Since it is formed using the photoresist pattern applied at the time, there is an advantage that no additional etching process is required.

1 is a perspective view schematically showing a general liquid crystal display panel.

2A is a plan view schematically illustrating the structure of a liquid crystal display panel.

FIG. 2B is an enlarged plan view of one pixel of the liquid crystal display panel illustrated in FIG. 2A; FIG.

3A to 3J are cross-sectional views sequentially illustrating a manufacturing process of a liquid crystal display panel according to a first embodiment of the present invention.

4A through 4E are cross-sectional views sequentially illustrating a manufacturing process of a liquid crystal display panel according to a second exemplary embodiment of the present invention.

** Explanation of symbols for main parts of drawings **

110,210: Array board 116P, 216P: Gate pad wiring

117P, 217P: Data pad wiring 118,218: Pixel electrode

121,221 gate electrode 122,222 source electrode

123,223: Drain electrode 121P, 221P: Gate pad electrode

122P, 22P: Data pad electrode 140, 240: Contact hole

140P, 240P: Pad contact hole 170,270: Photoresist

180,280: conductive metal 180d, 280d: barrier metal layer

180P, 280P: Pad part barrier metal layer

Claims (10)

Providing a first substrate divided into a pixel portion and a pad portion; Forming a metal line including a gate / data line and a gate / data pad line in the pixel portion and the pad portion of the first substrate, respectively; Forming a switching device including a gate electrode and a source / drain electrode in a pixel portion of the first substrate; Depositing an interlayer insulating film on the entire surface of the first substrate; Coating a photosensitive material on the entire surface of the first substrate on which the interlayer insulating film is deposited; Patterning the interlayer insulating layer using a photolithography process to form a contact hole exposing a part of the drain electrode of the pixel part, and forming a pad part contact hole exposing a portion of the pad pad gate pad wiring and the data pad wiring. step; Depositing a conductive metal on the entire surface of the photoresist pattern including the contact hole; Removing the photoresist pattern of portions other than the contact hole region to leave a conductive metal layer on the exposed drain electrode, gate pad wiring, and data pad wiring surface; A pixel electrode connected to the drain electrode through the conductive metal layer in the pixel portion of the first substrate, and a gate pad electrode and a data pad respectively connected to the gate pad wiring and the data pad wiring through the conductive metal layer in the pad portion. Forming an electrode; And A method of manufacturing a liquid crystal display panel comprising bonding the first substrate and a second substrate which is a color filter substrate. The method of claim 1, wherein the forming of the metal wiring on the first substrate comprises: forming a plurality of gate lines in the pixel portion of the first substrate and simultaneously connecting gate pad wirings connected to end portions of the gate lines in the pad portion; And forming a plurality of data lines at the pixel portion of the first substrate, and simultaneously forming data pad wires connected to the ends of the data lines. The method of claim 1, wherein the forming of the switching device in the pixel portion of the first substrate is performed. Forming a gate electrode connected to the gate line in each pixel region of the pixel portion; Forming an active layer and an ohmic contact layer having a gate insulating layer interposed therebetween; And And forming a source electrode and a drain electrode connected to the data line in each pixel region of the pixel portion. The method of claim 1, wherein the metal wiring is formed of a low resistance metal material such as aluminum or an aluminum alloy including aluminum-neodymium. The method of claim 4, wherein the data line including the drain electrode is formed of a double metal layer having the low resistance metal material formed on a barrier metal layer such as molybdenum. The liquid crystal of claim 1, wherein the pixel electrode, the gate pad electrode, and the data pad electrode are formed of a transparent metal material such as indium tin oxide, indium zinc oxide, or indium tin zinc oxide. Manufacturing method of display panel. The method of claim 1, wherein the conductive metal is formed of a barrier metal such as molybdenum, chromium, or tungsten to reduce contact resistance between the metal wiring and the upper transparent electrode. The method of claim 1, wherein the photoresist pattern of the portion other than the contact hole region and the conductive metal deposited on the photoresist pattern are simultaneously removed using a lift-off process. The method of claim 8, wherein in the lift-off process, a crack is formed on the photoresist pattern on which the conductive metal material is deposited by using a stripper and ultrasonic waves to remove the crack. The method of claim 1, wherein when the interlayer insulating layer is patterned, the edge layer of the photoresist pattern is exposed by overetching the interlayer insulating layer.