KR20050011602A - 씨모스 박막 트래지스터 및 이를 사용한 디스플레이디바이스 - Google Patents
씨모스 박막 트래지스터 및 이를 사용한 디스플레이디바이스 Download PDFInfo
- Publication number
- KR20050011602A KR20050011602A KR1020030050772A KR20030050772A KR20050011602A KR 20050011602 A KR20050011602 A KR 20050011602A KR 1020030050772 A KR1020030050772 A KR 1020030050772A KR 20030050772 A KR20030050772 A KR 20030050772A KR 20050011602 A KR20050011602 A KR 20050011602A
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- South Korea
- Prior art keywords
- thin film
- film transistor
- type thin
- active channel
- anisotropic
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
Abstract
Description
결정립의 형태 | P형 박막트랜지스터의 Vth | N형 박막트랜지스터의 Vth |
도 2a (이방성) | -4.82 | 1.41 |
도 2b (이방성) | -4.01 | 2.34 |
도 2c (이방성) | -5.84 | 0.92 |
도 2d (등방성) | -11.60 | 7.90 |
Claims (9)
- P형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립은 이방성 형태의 결정립 구조를 가지며, N형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립은 등방성 형태의 결정립 구조를 가지는 것을 특징으로 하는 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 이방성 형태의 결정립 구조는 상기 등방성 형태의 결정립 구조보다 입자 크기가 더 큰 것인 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 등방성 형태의 결정립 구조의 결정립의 평균 입자 크기는 1 ㎛ 이하이고, 상기 이방성 형태의 결정립 구조의 결정립의 평균 입자 크기는 2 ㎛ 이상인 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 P형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립은 SLS(Sequential Lateral Solidification)법에 의하여 형성되고, 상기 N형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립은 ELA(Eximer LaserAnnealing)법에 의하여 형성되는 것인 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 P형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립과 상기 N형 박막 트랜지스터의 액티브 채널에 형성되는 다결정 실리콘 결정립이 동일한 레이저 결정화법에 의하여 형성되는 경우 상기 P형 박막 트랜지스터의 액티브 채널에 조사되는 에너지가 상기 N형 박막 트랜지스터의 액티브 채널에 조사되는 에너지보다 더 큰 것인 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 이방성 형태의 결정 구조는 유사 육각형 형태, 이방성 실린더 형태, 또는 유사 사각형 형태 중 하나이며, 상기 등방성 형태의 결정 구조는 등축정(equaxed) 형태인 CMOS 박막 트랜지스터.
- 제 1항에 있어서,상기 CMOS 박막 트랜지스터는 LDD 구조 또는 오프-셋 구조를 포함하는 것인 CMOS 박막 트랜지스터.
- 제 1항의 CMOS 박막 트랜지스터를 사용하는 것을 특징으로 하는 디스플레이 디바이스.
- 제 8항에 있어서,상기 디스플레이 디바이스는 액정 표시 소자 또는 유기 전계 발광 디스플레이 디바이스인 디스플레이 디바이스.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030050772A KR100542989B1 (ko) | 2003-07-23 | 2003-07-23 | 씨모스 박막 트래지스터 및 이를 사용한 디스플레이디바이스 |
US10/872,495 US8441049B2 (en) | 2003-07-16 | 2004-06-22 | Flat panel display device comprising polysilicon thin film transistor and method of manufacturing the same |
CNB2004100712426A CN1324696C (zh) | 2003-07-16 | 2004-07-16 | 包括多晶硅薄膜晶体管的平板显示装置及其制造方法 |
US13/864,040 US8987120B2 (en) | 2003-07-16 | 2013-04-16 | Flat panel display device comprising polysilicon thin film transistor and method of manufacturing the same |
Applications Claiming Priority (1)
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KR1020030050772A KR100542989B1 (ko) | 2003-07-23 | 2003-07-23 | 씨모스 박막 트래지스터 및 이를 사용한 디스플레이디바이스 |
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KR20050011602A true KR20050011602A (ko) | 2005-01-29 |
KR100542989B1 KR100542989B1 (ko) | 2006-01-20 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100739985B1 (ko) * | 2006-09-04 | 2007-07-16 | 삼성에스디아이 주식회사 | 트랜지스터, 이의 제조 방법 및 이를 구비한 평판 표시장치 |
US8134152B2 (en) | 2009-01-13 | 2012-03-13 | Samsung Mobile Display Co., Ltd. | CMOS thin film transistor, method of fabricating the same and organic light emitting display device having laminated PMOS poly-silicon thin film transistor with a top gate configuration and a NMOS oxide thin film transistor with an inverted staggered bottom gate configuration |
US8421090B2 (en) | 2009-09-03 | 2013-04-16 | Samsung Display Co., Ltd. | Organic light emitting diode display and method of manufacturing the same |
US8455876B2 (en) | 2009-08-25 | 2013-06-04 | Samsung Display Co., Ltd. | Organic light emitting diode display and method of manufacturing the same |
-
2003
- 2003-07-23 KR KR1020030050772A patent/KR100542989B1/ko active IP Right Grant
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100739985B1 (ko) * | 2006-09-04 | 2007-07-16 | 삼성에스디아이 주식회사 | 트랜지스터, 이의 제조 방법 및 이를 구비한 평판 표시장치 |
US8134152B2 (en) | 2009-01-13 | 2012-03-13 | Samsung Mobile Display Co., Ltd. | CMOS thin film transistor, method of fabricating the same and organic light emitting display device having laminated PMOS poly-silicon thin film transistor with a top gate configuration and a NMOS oxide thin film transistor with an inverted staggered bottom gate configuration |
US8455876B2 (en) | 2009-08-25 | 2013-06-04 | Samsung Display Co., Ltd. | Organic light emitting diode display and method of manufacturing the same |
US8421090B2 (en) | 2009-09-03 | 2013-04-16 | Samsung Display Co., Ltd. | Organic light emitting diode display and method of manufacturing the same |
Also Published As
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KR100542989B1 (ko) | 2006-01-20 |
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