KR20040110694A - Apparatus and Method of Driving Liquid Crystal Display Device - Google Patents

Abstract

PURPOSE: An apparatus and a method for driving a LCD(Liquid Crystal Display) with reduced manufacturing cost are provided to reduce the number of data lines and ICs(Integrated Circuits) by driving three sub-circuits using a data line. CONSTITUTION: Pixels(20) include red, green, and blue sub-pixels and are arranged in form of a matrix. Data lines(DL1-DLm/3) supply video signals to the red, green, and blue sub-pixel. Gate lines(GL1-GL2n) are respectively connected to the respective pixels arranged at an i-th horizontal line. A control power supply(18) supplies control power to the red and blue sub-pixels. A data driver(14) supplies the video signal to the data line. A gate driver(16) supplies a gate signal to the date line. The data driver sequentially transmits a red video signal supplied to the red sub-pixel, a green video signal supplied to the green sub-pixel, and a blue video signal supplied to the blue sub-pixel to the data line during a first horizontal period.

Description

Driving apparatus and driving method of liquid crystal display device {Apparatus and Method of Driving Liquid Crystal Display Device}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device and a driving method of a liquid crystal display device, and more particularly, to a driving device and a driving method of a liquid crystal display device capable of reducing the number of data lines and data integrated circuits.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel having a pixel matrix and a driving circuit for driving the liquid crystal panel. The driving circuit drives the pixel matrix so that the image information is displayed on the display panel.

1 is a view showing a conventional liquid crystal display device.

Referring to FIG. 1, a conventional liquid crystal display device includes a liquid crystal panel 2, a data driver 4 for driving data lines DL1 to DLm of the liquid crystal panel 2, and a liquid crystal panel 2. A gate driver 6 for driving the gate lines GL1 to GLn is provided.

The liquid crystal panel 2 is a thin film transistor TFT formed at an intersection of the gate lines GL1 to GLn and the data lines DL1 to DLm, and a liquid crystal connected to the thin film transistor TFT and arranged in a matrix form. Cells Clc.

The gate driver 6 sequentially supplies gate signals to the gate lines GL1 to GLn in accordance with a control signal from a timing controller (not shown). The data driver 4 converts the data R, G, and B supplied from the timing controller into a video signal, which is an analog signal, for one horizontal line every one horizontal period in which the gate signal is supplied to the gate lines GL1 to GLn. Is supplied to the data lines DL1 to DLm.

The thin film transistor TFT supplies data from the data lines DL1 to DLm to the liquid crystal cell Clc in response to gate signals from the gate lines GL1 to GLn. The liquid crystal cell Clc may be equivalently represented by the liquid crystal capacitor Clc since the liquid crystal cell Clc is composed of a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor TFT. The liquid crystal cell includes a storage capacitor (not shown) connected to the previous gate line to maintain the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

Since the liquid crystal cells of the conventional liquid crystal display are positioned at the intersections of the gate lines GL1 to GLn and the data lines DL1 to DLm, the number of data lines DL1 to DLm is equal to (m). G) form a vertical line. In other words, the liquid crystal cells are arranged in a matrix to form m vertical lines and n horizontal lines.

As can be seen here, m data lines DL1 to DLm are conventionally required to drive m vertical liquid crystal cells. Therefore, in the related art, a plurality of data lines DL1 to DLm are formed to drive the liquid crystal panel 2, and thus, a process time and a manufacturing cost are wasted. In addition, a large number of data driver integrated circuits (hereinafter referred to as "ICs") must be included in the data driver 4 to drive each of the m data lines DL1 to DLm. There is a problem that should be.

Accordingly, it is an object of the present invention to provide a driving device and a driving method of a liquid crystal display device capable of reducing the number of data lines and data integrated circuits.

1 is a view showing a conventional liquid crystal display device.

2 is a view showing a liquid crystal display device according to an embodiment of the present invention.

FIG. 3 shows details of the subpixels shown in FIG. 2; FIG.

4 is a diagram illustrating a gate signal and a video signal supplied to the gate line and the data lines shown in FIG.

<Description of Symbols for Main Parts of Drawings>

2,12 liquid crystal panel 4,14 data driver

6,16: gate driver 18: control power supply

20: pixel 22,24,26: cell driver

In order to achieve the above object, the driving apparatus of the liquid crystal display device of the present invention includes pixels including red subpixels, green subpixels and blue subpixels, and arranged in a matrix; One data line for supplying a video signal to the red subpixel, the green subpixel, and the blue subpixel included in the pixel; two gate lines connected to each of pixels arranged in the i-th horizontal line; A control power supply for supplying control power to the red subpixel and the blue subpixel; A data driver for supplying a video signal to the data line; A gate driver is provided to supply a gate signal to the gate line.

The data driver sequentially supplies a red video signal supplied to the red subpixel, a green video signal supplied to the green subpixel, and a blue video signal supplied to the blue subpixel as data lines for one horizontal period.

The gate driver supplies first and second gate signals that overlap one third period to two gate lines during one horizontal period.

The first gate signal is supplied to the first gate line of the two gate lines for 2/3 periods, and the second gate line is overlapped with the first gate signal for 1/3 periods to the second gate line of the two gate lines for 2/3 periods. While the second gate signal is supplied.

The red subpixel is connected to the data line and is turned on when the first gate signal is supplied, and the first thin film transistor is turned on when the first gate signal is supplied, and the capacitor is connected to the first gate. A second thin film transistor for supplying a signal and a third thin film transistor turned on by a voltage supplied to the capacitor, wherein the red video signal supplied to the data line is configured to supply the first thin film transistor and the third thin film transistor. Via the liquid crystal cell via.

The red subpixel further includes a fourth thin film transistor to be turned on when the second gate signal is supplied to supply control power to the third thin film transistor, and the third thin film transistor is turned on when the control power is supplied. Is off.

The green subpixel is connected to the data line and is turned on when the second gate signal is supplied. The first thin film transistor is connected to the first thin film transistor and is turned on when the first gate signal is supplied. The green video signal having the two thin film transistors and supplied to the data line is supplied to the liquid crystal cell via the first and second thin film transistors.

The blue subpixel is turned on when the second gate signal is supplied, and the third thin film transistor for supplying the second gate signal to a capacitor connected to the blue subpixel is turned on by the voltage supplied to the capacitor. The blue video signal provided with the thin film transistor and supplied to the data line is supplied to the liquid crystal cell via the first thin film transistor and the fourth thin film transistor.

The blue subpixel further includes a fifth thin film transistor that is turned on when the first gate signal is supplied to supply control power to the fourth thin film transistor, and the fifth thin film transistor is turned on when the control power is supplied. Is off.

In the driving method of the liquid crystal display of the present invention, the red, green, and blue video signals are time-divided and supplied to one data line during one horizontal period, and i (i is a natural number during the first one-third horizontal period of one horizontal period). The i-th gate line and i + 1 forming the same horizontal line during the middle third of the one-horizontal period, and the red video signal being supplied to the red sub-pixel by the first gate signal supplied to the) th gate line. Supplying the green video signal to the green sub-pixel by the first and second gate signals supplied to the first gate line, and supplying the i + 1 th gate line to the i + 1 th gate line for the second half of the one horizontal period. And supplying the blue video signal to the blue subpixel by the gate signal.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 2 to 4.

2 is a view showing a liquid crystal display device according to an embodiment of the present invention.

2, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel 12, a data driver 14 for driving data lines DL1 to DLm / 3 of the liquid crystal panel 12. And a gate driver 16 for driving the gate lines GL1 to GL2n of the liquid crystal panel 12, and a control power supply unit 18 for controlling the pixels 20 of the liquid crystal panel 12.

The pixels 20 are arranged in a matrix form on a plurality of horizontal lines and vertical lines. Each of the pixels 20 includes a red subpixel R, a green subpixel G, and a blue subpixel B. The pixels 20 are connected to one data line DL that forms a vertical line and two gate lines GL that form a horizontal line.

That is, in the present invention, the three subpixels R, G, and B included in the pixels 20 are driven by one data line DL. Here, the red subpixel R and the green subpixel G are directly connected to the data line DL, and the blue subpixel B is connected to the data line DL through the green subpixel G. As such, when three sub-pixels R, G, and B are connected to one data line DL, the number of data lines DL of the present invention can be reduced to one third compared to the related art.

Meanwhile, in the present invention, each of the subpixels R, G, and B is connected to two gate lines GL (that is, two gate lines GL form one horizontal line). When the two gate lines GL form one horizontal line, the number of gate lines GL of the present invention is doubled than before. Here, the number of integrated circuits included in each of the drivers 14 and 16 is as follows.

For example, an integrated circuit having 384 channels is used, and the data driver 4 of the XGA-class conventional liquid crystal panel 2 having a resolution of 1024 × 768 requires 1024 × 3 = 3027 channels. Integrated circuits are included. In addition, the gate driver 6 requires 768 channels, and thus includes two integrated circuits. That is, a total of 10 integrated circuits are conventionally used to drive the XGA-class liquid crystal panel 2.

Meanwhile, an integrated circuit having 384 channels is used and the data driver 14 of the liquid crystal panel 12 of the XGA-class present invention having a resolution of 1024 × 768 requires 1024 channels, and thus includes three integrated circuits. do. The gate driver 16 requires 768 × 2 = 1536 channels, and thus includes four integrated circuits. That is, a total of seven integrated circuits are used for the XGA-class liquid crystal panel 12 of the present invention, and thus manufacturing cost can be reduced as compared with the conventional liquid crystal display device.

The gate driver 16 supplies gate signals to the gate lines GL1 to GL2n according to a control signal from a timing controller (not shown). Here, the gate signals supplied to the two gate lines GL forming one horizontal line overlap each other for a predetermined period.

The data driver 14 converts the data R, G, and B supplied from the timing controller into a video signal, which is an analog signal, and supplies the video signal to the data line DL during one horizontal period in which the gate signal is supplied. Here, three video signals are sequentially supplied to one data line DL during one horizontal period.

The control power supply 18 supplies the control power to the red subpixel R and the blue subpixel B through the control power line V_off. Here, among the thin film transistors included in the red subpixel R and the blue subpixel B, the thin film transistor supplied with the control power is turned off.

FIG. 3 is a diagram illustrating the pixel 20 illustrated in FIG. 2 in detail.

Referring to FIG. 3, the pixel 20 of the present invention includes a red subpixel R, a green subpixel G, and a blue subpixel B. As shown in FIG.

The red subpixel R includes a liquid crystal cell Clc and a red cell driver 22 for driving the liquid crystal cell Clc.

The liquid crystal cell Clc is equivalently represented by the liquid crystal capacitor Clc because the liquid crystal cell Clc is composed of a common electrode Vcom facing each other with a liquid crystal interposed therebetween and a pixel electrode connected to the red cell driver 22. The liquid crystal cell Clc includes a storage capacitor Cst connected to the previous gate line GLi to maintain the red video signal charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The red cell driver 22 includes a first thin film transistor T1 installed to be connected between i (i is a natural number) + first gate line GLi + 1 and the data line DL, and a control power supply line V_off. The fourth thin film transistor T4 provided to be connected to the second thin film transistor T4 provided between the fourth thin film transistor T4 and the first thin film transistor T1, the fourth thin film transistor T4, and the fourth thin film transistor T4. The third thin film transistor T3 provided between the i + 1 th gate line GLi + 1 and the first capacitor C1 provided between the third thin film transistor T3 and the fourth thin film transistor T4 are disposed. Equipped.

The first thin film transistor T1 and the third thin film transistor T3 are turned on when the gate signal is supplied to the i + 1 th gate line GLi + 1. The fourth thin film transistor T4 is turned on when the gate signal is supplied to the i + 2th gate line Gli + 2. The second thin film transistor T3 is turned on when the third thin film transistor T3 is turned on, and is turned off when the fourth thin film transistor T4 is turned on. The red video signal supplied from the data line DL is supplied to the liquid crystal cell Clc via the first thin film transistor T1 and the second thin film transistor T2.

The green subpixel G includes a liquid crystal cell Clc and a green cell driver 24 for driving the liquid crystal cell Clc.

The liquid crystal cell Clc is equivalently represented by the liquid crystal capacitor Clc because the liquid crystal cell Clc is composed of a common electrode Vcom facing each other with a liquid crystal interposed therebetween and a pixel electrode connected to the green cell driver 24. The liquid crystal cell Clc includes a storage capacitor Cst connected to the previous gate line GLi to maintain the green video signal charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The green cell driver 24 is set differently from the red cell driver 22. The green cell driver 24 includes a fifth thin film transistor T5, a fifth thin film transistor T5, and a liquid crystal, which are installed to be connected between the i + 2 th gate line GLi + 2 and the data line DL. The sixth thin film transistor T6 is provided to be connected between the cells Clc.

The fifth thin film transistor T5 is turned on when the gate signal is supplied to the i + 2th gate line GLi + 2. The sixth thin film transistor T6 is turned on when the gate signal is supplied to the i + 1th gate line GLi + 1. The green video signal supplied from the data line DL is supplied to the liquid crystal cell Clc via the fifth thin film transistor T5 and the sixth thin film transistor T6.

The blue subpixel B includes a liquid crystal cell Clc and a blue cell driver 26 for driving the liquid crystal cell Clc.

The liquid crystal cell Clc is equivalently represented by the liquid crystal capacitor Clc because the liquid crystal cell Clc is composed of a common electrode Vcom facing each other with a liquid crystal interposed therebetween and a pixel electrode connected to the blue cell driver 26. The liquid crystal cell Clc includes a storage capacitor Cst connected to the previous gate line GLi to maintain the blue video signal charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The blue cell driver 26 is set differently from the red cell driver 22 and the green cell driver 24.

The blue cell driver 26 includes a seventh thin film transistor T7 connected to the i + 1 th gate line GLi + 1, an eighth thin film transistor T8 connected to the green cell driver 24, and a seventh thin film driver T7. And a second capacitor C2 provided to be connected between the eighth thin film transistors T7 and T8, and an eighth thin film transistor T8, a second capacitor C2, and a control power supply line V_off. 9 thin film transistor T9 is provided.

The seventh thin film transistor T7 is turned on when the gate signal is supplied to the i + 2th gate line GLi + 2. The ninth thin film transistor T9 is turned on when the gate signal is supplied to the i + 1th gate line GLi + 1. The eighth thin film transistor T8 is turned on when the seventh thin film transistor T8 is turned on, and is turned off when the ninth thin film transistor T9 is turned on. The blue video signal supplied from the data line DL is supplied to the liquid crystal cell Clc via the fifth thin film transistor T5 and the eighth thin film transistor T8.

Such a process of supplying a video signal to the subpixels R, G, and B of the present invention will be described in detail with reference to FIG. 4. First, the first and second gate signals GS1 and GS2 are supplied to the two gate lines GLi + 1 and GLi + 2. Each of the first gate signal GS1 and the second gate signal GS2 is supplied for 2/3 horizontal periods. Here, since the first gate signal GS1 is supplied first and the second gate signal GS2 is supplied later, the first and second gate signals GS1 and GS2 overlap for one-third horizontal period. In other words, the first gate signal GS1 is supplied for the first 1/3 period of one horizontal period, and the first and second gate signals GS1 and GS2 are supplied for the middle 1/3 period. The second gate signal GS2 is supplied during the last 1/3 period.

The red, green, and blue video signals are sequentially supplied to one data line DL for one horizontal period. Here, the red, green, and blue video signals are time-divided by one-third horizontal period to one data line DL.

First, the first gate signal GS1 is supplied to an i + 1 th gate line GLi + 1 of two gate lines forming a horizontal line. The red video signal is supplied to the data line DL for one third horizontal period.

When the first gate signal GS1 is supplied, the first and third thin film transistors T1 and T3 are turned on. When the third thin film transistor T3 is turned on, the first gate signal GS1 is supplied to the first capacitor C1 via the third thin film transistor T3 so that a predetermined voltage is applied to the first capacitor C1. The second thin film transistor T2 is turned on by the voltage charged in the first capacitor C1. When the second thin film transistor T2 is turned on, the red video signal supplied to the data line DL is supplied to the liquid crystal cell Clc via the first thin film transistor T1 and the second thin film transistor T2. .

On the other hand, when the first gate signal GS1 is supplied, the sixth thin film transistor T6 is turned on. At this time, since the fifth thin film transistor T5 maintains the turn-off state, the red video signal is not supplied to the green subpixel G. When the first gate signal GS1 is supplied, the ninth thin film transistor T9 is turned on. At this time, since the fifth thin film transistor T5 maintains the turn-off state, the red video signal is not supplied to the blue subpixel B. That is, the red video signal is supplied to the red subpixel R during the first half of the one horizontal period.

Thereafter, the second gate signal GS2 is supplied to the i + 2 th gate line GLi + 2 so as to overlap the first gate signal GS1 supplied to the i + 1 th gate line GLi + 1. The green video signal is supplied to the data line DL.

When the first and second gate signals GS1 and GS2 are supplied, the fifth and sixth thin film transistors T5 and T6 are turned on. When the fifth and sixth thin film transistors T5 and T6 are turned on, the green video signal supplied to the data line DL is supplied to the green subpixel G through the fifth and sixth thin film transistors T5 and T6. It is supplied to the liquid crystal cell Clc.

Meanwhile, when the first and second gate signals GS1 and GS2 are supplied, the first thin film transistor T1, the third thin film transistor T3, and the fourth thin film transistor T4 are turned on. When the fourth thin film transistor T4 is turned on, the control power from the control power supply line V_off is supplied to the second thin film transistor T2, and accordingly, the second thin film transistor T2 is turned off. Therefore, the green video signal supplied to the data line DL is not supplied to the red subpixel R. When the first and second gate signals GS1 and GS2 are supplied, the seventh and ninth thin film transistors T7 and T9 are turned on. When the ninth thin film transistor T9 is turned on, the control power from the control power supply line V_off is supplied to the eighth thin film transistor T8, and accordingly, the eighth thin film transistor T8 is turned off. Therefore, the green video signal supplied to the data line DL is not supplied to the blue subpixel B.

Thereafter, the first gate signal GS1 supplied to the i + 1 th gate line GLi + 1 is turned off. At this time, the second gate signal GS2 maintains the turn-on state as the i + 2 th gate line GLi + 2. The blue video signal is supplied to the data line DL.

When the second gate signal GS2 is supplied, the fifth thin film transistor T5 and the seventh thin film transistor T7 are turned on. When the seventh thin film transistor T7 is turned on, the second gate signal GS2 is supplied to the second capacitor C2 via the seventh thin film transistor T7 so that a predetermined voltage is applied to the second capacitor C2. The eighth thin film transistor T8 is turned on by the voltage charged in the second capacitor C2. When the eighth thin film transistor T8 is turned on, the blue video signal supplied to the data line DL is transferred to the liquid crystal cell Clc of the blue subpixel B through the fifth and eighth thin film transistors T5 and T8. Is supplied.

On the other hand, when the second gate signal GS2 is supplied, the fourth thin film transistor T4 is turned on. When the fourth thin film transistor T4 is turned on, the control power from the control power supply line V_off is supplied to the second thin film transistor T2, and accordingly, the second thin film transistor T2 is turned off. Therefore, the blue video signal supplied to the data line DL is not supplied to the red subpixel R. When the second gate signal GS2 is supplied, the fifth thin film transistor T5 is turned on. In this case, since the sixth thin film transistor T6 maintains the turn-off state, the blue video signal supplied to the data line DL may not be supplied to the green subpixel G.

As described above, since the three subpixels R, G, and B are driven by one data line, the number of data lines and the corresponding integrated circuits can be reduced. In addition, since any one of the three subpixels R, G, and B is selected using the gate signals supplied to the two gate lines forming the horizontal line, the video signal supplied by being time-divided into the data lines is a desired subpixel ( R, G, B) can be supplied.

As described above, according to the driving apparatus and driving method of the liquid crystal display according to the present invention, since three sub-channels included in one pixel are driven by one data line, the number of data lines and integrated circuits can be reduced. As a result, manufacturing costs can be reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (10)

Pixels including a red subpixel, a green subpixel, and a blue subpixel, and arranged in a matrix; One data line for supplying a video signal to the red subpixel, the green subpixel and the blue subpixel included in the pixel; two gate lines connected to each of the pixels arranged in an i (i is a natural number) horizontal line; A control power supply for supplying control power to the red and blue subpixels; A data driver for supplying the video signal to the data line; And a gate driver for supplying a gate signal to the gate line. The method of claim 1, The data driver sequentially supplies a red video signal supplied to the red subpixel, a green video signal supplied to the green subpixel, and a blue video signal supplied to the blue subpixel to the data line for one horizontal period. A drive device for a liquid crystal display device. The method of claim 2, And the gate driver supplies first and second gate signals overlapping the two gate lines for one third period during the one horizontal period. The method of claim 3, wherein The first gate signal is supplied to the first gate line of the two gate lines for 2/3 periods, and the second gate line is overlapped with the first gate signal for 1/3 periods to the second gate line of the two gate lines. And the second gate signal is supplied for a period of / 3 periods. The method of claim 4, wherein The red subpixel A first thin film transistor connected to the data line and turned on when the first gate signal is supplied; A second thin film transistor for supplying the first gate signal to a capacitor connected to itself by being turned on when the first gate signal is supplied; A third thin film transistor turned on by the voltage supplied to the capacitor, And the red video signal supplied to the data line is supplied to the liquid crystal cell via the first thin film transistor and the third thin film transistor. The method of claim 5, The red subpixel And a fourth thin film transistor for turning on when the second gate signal is supplied to supply the control power to the third thin film transistor, wherein the third thin film transistor is turned on when the control power is supplied. A drive device for a liquid crystal display device, characterized in that off. The method of claim 4, wherein The green subpixel A first thin film transistor connected to the data line and turned on when the second gate signal is supplied; A second thin film transistor connected to the first thin film transistor and turned on when the first gate signal is supplied; And the green video signal supplied to the data line is supplied to the liquid crystal cell via the first and second thin film transistors. The method of claim 7, wherein The blue subpixel A third thin film transistor for supplying the second gate signal to a capacitor connected to itself by being turned on when the second gate signal is supplied; A fourth thin film transistor turned on by the voltage supplied to the capacitor, And the blue video signal supplied to the data line is supplied to the liquid crystal cell via the first thin film transistor and the fourth thin film transistor. The method of claim 8, The blue subpixel And a fifth thin film transistor for turning on when the first gate signal is supplied to supply the control power to the fourth thin film transistor, wherein the fifth thin film transistor is turned off when the control power is supplied. Driving device of the liquid crystal display device characterized in that. Supplying red, green, and blue video signals by time division into one data line for one horizontal period; Supplying the red video signal to a red subpixel by a first gate signal supplied to an i (i is a natural number) gate line during the first one-third horizontal period of the first horizontal period; The green video signal is supplied to the green sub-pixel by first and second gate signals supplied to the i-th gate line and the i + 1-th gate line forming the same horizontal line during the first half of the first horizontal period. Step being made, And supplying the blue video signal to the blue sub-pixel by the second gate signal supplied to the i + 1 th gate line during the second half of the first horizontal period. Driving method.