KR20040059858A - Method for making capacitor mim in semiconductor - Google Patents
Method for making capacitor mim in semiconductor Download PDFInfo
- Publication number
- KR20040059858A KR20040059858A KR1020020086363A KR20020086363A KR20040059858A KR 20040059858 A KR20040059858 A KR 20040059858A KR 1020020086363 A KR1020020086363 A KR 1020020086363A KR 20020086363 A KR20020086363 A KR 20020086363A KR 20040059858 A KR20040059858 A KR 20040059858A
- Authority
- KR
- South Korea
- Prior art keywords
- film
- depositing
- semiconductor
- imd
- metal film
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
본 발명은 반도체의 엠아이엠(Metal Insulator Metal, MIM) 커패시터 제작방법에 관한 것으로, 특히 안정된 커패시터 특성을 갖으며, 후속 공정에 디펙트 소스(defect source)로 소자 특성을 저하시키지 않으면서 MIN을 형성할 수 있도록하는 방법에 관한 것이다.The present invention relates to a method of manufacturing a metal insulator metal (MIM) capacitor of a semiconductor, and particularly has a stable capacitor characteristics, to form a MIN without deteriorating device characteristics as a defect source in a subsequent process It is about how to help.
통상적으로, 반도체 장치는 MIN 구조 또는 PIP 구조를 사용하고 있는데, 이중에서 MIN 구조에 관한 것이다. 이러한 MIN 구조를 제작함에 있어서, 인슐레이터(Insulator)를 정확하게 식각 및 습식 공정을 수행하지 못하였다.Typically, a semiconductor device uses a MIN structure or a PIP structure, of which relates to the MIN structure. In manufacturing the MIN structure, the insulator was not accurately etched and wetted.
즉, MIN 구조는 도 1을 참조하면, 커패시터 특성이 안정적이지 못하다.That is, in the MIN structure, referring to FIG. 1, the capacitor characteristics are not stable.
다시 말해서, 도 1a에 도시된 바와 같이, 아무리 식각(etch)을 유니폼(uniform)하게 하더라도, 건식(dry) 공정 및 습식(wet) 공정을 완벽하게 수행할 수 없기 때문이다.In other words, as shown in FIG. 1A, no matter how uniform the etch, the dry process and the wet process cannot be performed perfectly.
보다 구체적으로 설명하면, 도 1b에 도시된 바와 같이, 커패시터 물질인 질화막(nitride)(10)이 형성된 후, 서브 메탈 RIE(20)를 진행하므로, 플라즈마 데미지(plasma damage) 및 습식 크리닝(wet cleanning)에 의한 어택(attack)을 받을 수밖에 없는 구조이다.More specifically, as shown in FIG. 1B, after the nitride material 10, which is a capacitor material, is formed, the sub-metal RIE 20 is performed, so that plasma damage and wet cleaning are performed. It is a structure that is forced to receive an attack by).
이러한 일련의 공정으로는 안정적인 커패시터 특성을 갖게 할 수 없다는 문제점이 있다.There is a problem that such a series of processes cannot have stable capacitor characteristics.
따라서, 본 발명은 상술한 문제점을 해결하기 위해 안출된 것으로서, 그 목적은 서브 메탈 막과 질화막(nitride)을 증착한 후, PR 패턴을 이용하여 서브 메탈 막을 우선 식각한 후, IMD 막을 식각 백(etch back) 공정을 이용하여 식각을 실시하여 질화막을 완전히 제거한 상태에서, MIN 구조를 순차적으로 증착하고 PR 마스크를 이용하여 MIN을 형성하도록 하는 반도체의 엠아이엠 커패시터 제작방법을 제공함에 있다.Accordingly, the present invention has been made to solve the above-described problems, the object of which is to deposit a sub metal film and a nitride film (nitride), and then first etching the sub metal film using a PR pattern, and then IMD film is etched back ( In the state that the nitride film is completely removed by etching using the etch back) process, to provide a method for manufacturing a semiconductor capacitor of a semiconductor to sequentially deposit the MIN structure and form the MIN using a PR mask.
상술한 목적을 달성하기 위한 본 발명에서 반도체의 엠아이엠 커패시터 제작방법은 산화막(oxide) 상에 순차적으로 서브 메탈 막을 증착(deposition)하고, 서브 메탈 막 상에 질화막(nitride)을 증착한 후, PR 패턴을 이용하여 서브 메탈 막을 우선 식각을 실시하는 단계; 서브 메탈 막을 우선 식각을 실시한 상태에서 IMD 막을 증착하는 단계; IMD 막을 식각 백(etch back) 공정을 이용하여 식각을 실시하여 질화막을 완전히 제거하는 단계; 질화막이 제거된 상태에서, MIN 구조를 순차적으로 증착하는 단계; 증착된 MIN 구조에서 PR 마스크를 이용하여 MIN을 형성하는 단계를 포함하는 것을 특징으로 한다.In the present invention for achieving the above-described object, a method of fabricating an MEM capacitor of a semiconductor is deposited on the oxide (oxide) in sequence (deposition), and after depositing a nitride (nitride) on the sub-metal film, PR First etching the sub metal film using the pattern; Depositing an IMD film in a state in which the sub metal film is first etched; Etching the IMD film using an etch back process to completely remove the nitride film; Sequentially depositing the MIN structure with the nitride film removed; Forming a MIN using a PR mask in the deposited MIN structure, characterized in that it comprises.
도 1은 종래 반도체의 엠아이엠 커패시터 제작방법의 공정 과정에 대하여 도시한 도면이며,1 is a view showing a process of the conventional manufacturing method of the IC capacitor of the semiconductor,
도 2는 본 발명에 따른 반도체의 엠아이엠 커패시터 제작방법의 공정 과정에 대하여 도시한 도면이다.2 is a view showing a process of the manufacturing method of the M capacitor of the semiconductor according to the present invention.
<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>
10 : 질화막 20 : 서브 메탈 RIE10: nitride film 20: submetal RIE
30 : 우선 식각 40 : IMD 막30: first etching 40: IMD film
50 : 커패시터 물질인 질화막 60 : Ti막50 nitride film as a capacitor material 60 Ti film
70 : TiN막70 TiN film
이하, 첨부된 도면을 참조하여 본 발명에 따른 실시 예를 상세하게 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2는 본 발명에 따른 반도체의 MIM 커패시터 제작방법의 공정 과정에 대하여 도시한 도면이다.2 is a view illustrating a process of manufacturing a MIM capacitor of a semiconductor according to the present invention.
즉, 도 2a를 참조하면, 산화막(oxide) 상에 순차적으로 서브 메탈 막(Ti막, TiN막, AlCu막, Ti막, TiN막)을 증착(deposition)하고, 이어서 질화막(nitride)(10)을 증착한 후, PR 패턴을 이용하여 서브 메탈 막을 우선 식각을 실시한다(30).That is, referring to FIG. 2A, a submetal film (Ti film, TiN film, AlCu film, Ti film, TiN film) is sequentially deposited on an oxide, followed by a nitride film 10. After deposition, the sub metal film is first etched using the PR pattern (30).
이후, 도 2b와 같이, IMD 막(40)을 증착하고, 도 2c에 도시된 바와 같이, IMD 막(40)을 식각 백(etch back) 공정을 이용하여 식각을 실시한다. 이때,질화막(10)을 완전히 제거한다.Thereafter, as shown in FIG. 2B, the IMD film 40 is deposited, and as shown in FIG. 2C, the IMD film 40 is etched using an etch back process. At this time, the nitride film 10 is completely removed.
상술한 바와 같은 공정을 완료한 후, 도 2d에 도시된 바와 같이, MIN 구조, 즉 커패시터 물질인 질화막(50)과, Ti막(60)과, TiN막(70)을 순차적으로 증착(deposition)한다.After completing the above-described process, as shown in FIG. 2D, the MIN structure, that is, the nitride film 50, which is a capacitor material, the Ti film 60, and the TiN film 70 are sequentially deposited. do.
다음으로, 도 2e에 도시된 바와 같이, PR 마스크를 이용하여 MIN을 형성하는데, 이때 질화막(50)을 완전히 제거하지 않고 남겨야 한다. 여기서, 식각 백(etch back)을 수행하지 않고 PR 마스크(mask)를 이용하여도 된다.Next, as shown in FIG. 2E, the MIN is formed using a PR mask, which should be left without completely removing the nitride film 50. Here, a PR mask may be used without performing etch back.
그러므로, 본 발명은 서브 메탈 막과 질화막(nitride)을 증착한 후, PR 패턴을 이용하여 서브 메탈 막을 우선 식각한 후, IMD 막을 식각 백(etch back) 공정을 이용하여 식각을 실시하여 질화막을 완전히 제거한 상태에서, MIN 구조를 순차적으로 증착하고 PR 마스크를 이용하여 MIN을 형성함으로써, MIN 특성의 안정성 및 향상성을 도모할 수 있는 효과가 있다.Therefore, in the present invention, after depositing the sub metal film and the nitride film, the sub metal film is first etched using the PR pattern, and the IMD film is etched using the etch back process to completely etch the nitride film. In the removed state, by sequentially depositing the MIN structure and forming the MIN using a PR mask, there is an effect that the stability and improvement of the MIN characteristics can be achieved.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020086363A KR100701367B1 (en) | 2002-12-30 | 2002-12-30 | Method for making capacitor mim in semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020086363A KR100701367B1 (en) | 2002-12-30 | 2002-12-30 | Method for making capacitor mim in semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040059858A true KR20040059858A (en) | 2004-07-06 |
KR100701367B1 KR100701367B1 (en) | 2007-03-28 |
Family
ID=37351822
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020020086363A KR100701367B1 (en) | 2002-12-30 | 2002-12-30 | Method for making capacitor mim in semiconductor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100701367B1 (en) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20040056958A (en) * | 2002-12-24 | 2004-07-01 | 주식회사 하이닉스반도체 | Method for MIM capacitor of semiconductor device |
-
2002
- 2002-12-30 KR KR1020020086363A patent/KR100701367B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100701367B1 (en) | 2007-03-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109243971B (en) | Low-angle etching method for dielectric film of semiconductor device | |
US20080085606A1 (en) | Method for Fabricating a Structure for a Semiconductor Component, and Semiconductor Component | |
KR100456829B1 (en) | MIM capacitor compatible to dual damascene and method for fabricating the same | |
KR100482029B1 (en) | Method for forming mim capacitor | |
KR20050022475A (en) | Method for manufacturing a semiconductor device having capacitor | |
KR100924879B1 (en) | Method for fabricating mim structure capacitor | |
US20090160022A1 (en) | Method of fabricating mim structure capacitor | |
KR20040059858A (en) | Method for making capacitor mim in semiconductor | |
KR100638983B1 (en) | Method of fabricating metal-insulator-metal capacitor | |
KR100618691B1 (en) | Method for fabricating capacitor of semiconductor device | |
KR100618679B1 (en) | Capacitor forming method | |
KR100327425B1 (en) | Method for fabricating capacitor of semiconductor device | |
KR100791676B1 (en) | Method for forming capacitor | |
KR100688786B1 (en) | Method for manufacturing metal insulator metal capacitor | |
KR100859254B1 (en) | Method of manufacturing a capacitor in a semiconductor device | |
JPH03248429A (en) | Manufacture of semiconductor device | |
KR100529624B1 (en) | Method for fabricating the MIM capacitor in semiconductor device | |
KR100291190B1 (en) | Method of manufacturing semiconductor memory device | |
KR20010063707A (en) | Method of manufacturing a capacitor in a semiconductor device | |
KR0154931B1 (en) | A method for patterning a metallic layer | |
KR100688724B1 (en) | Method for manufacturing high volume mim capacitor | |
KR20030056118A (en) | Method for fabricating semiconductor device | |
KR20040059860A (en) | Method for manufacturing mim capacitor in a semiconductor stack structure | |
KR20030000950A (en) | Method for manufacturing semiconductor device | |
KR20030057204A (en) | semiconductor capacitor manufacturing method using wet etching or chemical dry etching of an insulating layer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
N231 | Notification of change of applicant | ||
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20120221 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |