KR20040058686A - Method for fabricating cmos image sensor with improved margin of silicide process - Google Patents

Abstract

PURPOSE: A method for manufacturing a CMOS image sensor is provided to improve process margin by previously forming a silicide layer on a gate polysilicon layer. CONSTITUTION: An isolation layer(23) is formed to define an active and field region of a substrate(21). A gate polysilicon layer is deposited on the active region. A silicide layer(25) is formed on the gate polysilicon layer. A gate electrode(24) of a transfer transistor is formed by patterning the gate polysilicon layer. A photodiode(26) and a floating diffusion region(28) are formed in an epitaxial layer(22). A silicide layer is formed on the floating diffusion region.

Description

Method for fabricating cmos image sensor with improved margin of silicide process

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a CMOS image sensor, and in particular, by forming silicide in advance before patterning the gate polysilicon, a process margin of forming a silicide on the active region excluding the photodiode and on top of the gate polysilicon It relates to a method for manufacturing a CMOS image sensor with improved).

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. Among them, a charge coupled device (CCD) includes individual metal-oxide-silicon (MOS) capacitors. A device in which charge carriers are stored and transported in a capacitor while being in close proximity to each other. Complementary MOS image sensors use CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. A device employing a switching scheme that creates MOS transistors as many as pixels and sequentially detects outputs using the MOS transistors.

CCD (charge coupled device) has many disadvantages such as complicated driving method, high power consumption, high number of mask process steps, complicated process, and difficult to implement signal processing circuit in CCD chip. In order to overcome such drawbacks, the development of a CMOS image sensor using a sub-micron CMOS manufacturing technology has been studied in recent years. The CMOS image sensor forms an image by forming a photodiode and a MOS transistor in a unit pixel and sequentially detects signals in a switching method, and implements an image by using a CMOS manufacturing technology, which consumes less power and uses 30 to 40 masks as many as 20 masks. Compared to CCD process that requires two masks, the process is very simple, and it is possible to make various signal processing circuits and one chip, which is attracting attention as the next generation image sensor.

FIG. 1A is a circuit diagram showing a unit pixel composed of one photodiode PD and four MOS transistors in a conventional CMOS image sensor, and includes a photodiode 100 for generating photocharges by receiving light. The transfer transistor 101 for transporting the photocharges collected from the photodiode 100 to the floating diffusion region 102 and the potential of the floating diffusion region 102 to a desired value are discharged to discharge the floating diffusion region 102. A reset transistor 103 for resetting the drive transistor, a drive transistor 104 serving as a source follower buffer amplifier, and a select transistor enabling addressing as a switching role. 105). Outside the unit pixel, a load transistor 106 is formed to read an output signal. The three nodes 110, 111, and 112 are separately shown, which will be described later with reference to FIG. 1B.

Conventionally, in the silicide forming process of the CMOS image sensor having such unit pixels, silicide is not formed on the active region of the unit pixel, but silicide is formed only on the gate polysilicon. Since the photodiode is formed on the active region of the pixel region, silicide was not formed on all active regions in order to prevent the optical characteristics of the image sensor from deteriorating.

This will be described with reference to FIG. 1B. FIG. 1B is a layout diagram showing unit pixels formed according to the prior art, in which an isolation defining an active region in which a photodiode and a diffusion region are to be formed, and polysilicon constituting a gate of each transistor are shown. It is. For reference, the gate spacer is not shown in FIG. 1B.

Referring to this, a square active region forms the photodiode 100, and the active region forming the photodiode is bent in a 'b' shape on the upper surface thereof and then extended in the X-axis direction. The gate polysilicon 101 of the transfer transistor Tx is formed over a bottleneck of a portion where the active region constituting the photodiode is bent by a letter 'a', and the floating diffusion region 102 is formed of the gate polysilicon 101 of the transfer transistor. The substrate is laid out at 90 ° from the Y-axis direction in contact with the other side to be in contact with one side of the gate polysilicon 103 of the reset transistor.

In the floating diffusion region 102, an FD contact 110 is formed to electrically connect the floating diffusion region 102 and the gate polysilicon 104 of the drive transistor Dx. Next, the active region formed on the other side of the gate polysilicon 103 of the reset transistor Rx extends in the X-axis direction and is formed downward by 90 ° in the Y-axis direction from the middle to form the drive transistor Dx. It meets the gate polysilicon 104.

A V _DD contact 111 for applying a power supply voltage is formed in an active region of the reset transistor Rx extending in the X-axis direction from the other side of the gate polysilicon 103, and the gate of the drive transistor Dx is formed. In the polysilicon 104, a contact 114 for electrical connection with the floating diffusion region 102 is formed.

The active region that meets the gate polysilicon 104 of the drive transistor Dx continues to extend in the Y-axis direction to meet the gate polysilicon 105 of the select transistor Sx, and furthermore, the gate of the select transistor Sx. The Sx contact 112 is formed in the active region formed over the polysilicon 105. The Sx contact 112 is a contact for outputting the unit pixel.

Conventionally, in the unit pixel formed as described above, silicide is formed on the remaining active regions except for the photodiode 100 so as to lower contact resistance, and silicide is also formed on the gate polysilicon 101, 103, 104, and 105. It became. Here, in particular, referring to the gate polysilicon 101 of the transfer transistor, it can be seen that silicide is formed in all regions of the gate polysilicon 101 of the transfer transistor.

However, as shown in FIG. 1B, it is not easy to form silicide only in the gate polysilicon 101 of the transfer transistor adjacent to the photodiode 100, as shown in FIG. 1B. Many disadvantages occurred.

This will be described with reference to FIGS. 1C to 1D. FIG. 1C is a diagram illustrating a cross section of the photodiode 100 and the transfer transistor 101 in the layout diagram shown in FIG. 1B, which illustrates an ideal case where silicide is formed.

Referring to this, an epitaxial layer 12 is formed on the substrate 11, and a device isolation layer 13 defining an active region and a field region is formed in a predetermined region of the epitaxial layer 12. In addition, the gate polysilicon 14 of the transfer transistor is formed on the epitaxial layer 12, and the spacers 16 are formed on both sidewalls of the gate polysilicon. The spacer 16 here typically has a width d of about 0.1 μm.

The photodiode 15 is formed in the epi layer 12 between the device isolation layer 13 and the gate polysilicon 14, and the floating diffusion region 17 is formed on the other side of the gate polysilicon 14. The silicide 20 is formed on the gate polysilicon 14 and on the floating diffusion region 17.

As described above, a method of forming silicide will be described with reference to FIG. 1D. First, after the gate electrode, the photodiode, the floating diffusion region, etc. are formed, the silicide prevention layer 18 is formed on the entire structure as shown in FIG. 1D. The silicide prevention layer 18 is an oxide film or a nitride film-based film, and functions to prevent the silicide forming metal material from reacting with silicon. An anti reflection coating may be used together.

Next, a silicide block mask 19 is formed to cover only the photodiode 15. Since the gate electrode 14 is adjacent to each other in the photodiode 15 and the transfer transistor, one side of the silicide block mask 19 is accurately formed. There was no alignment on the spacers 16. That is, the equipment used to form the silicide block mask 19 is a stepper, and considering the accuracy of the stepper equipment or the overlay margin, the silicide block on the spacer having a width of about 0.1 μm One side of the mask 19 is not exactly aligned, but a lot of cases are formed by being biased toward the a side or b side.

If one side of the silicide block mask 19 is aligned in the a direction toward the center of the gate electrode 14, the silicide prevention layer existing on the gate electrode in the subsequent silicide prevention layer 18 removal process. All of 18 is not removed, and some remain on the gate electrode 14. In this case, a problem occurs in that silicide is not formed in the entire region of the gate electrode.

If one side of the silicide block mask 19 is oriented in the b-side direction and is aligned with the photodiode 15 outside the width of the spacer 16, in the subsequent removal process of the silicide prevention film 18, the upper portion of the photodiode Since the part of the silicide prevention layer which should remain on the substrate is partially removed, silicide is formed on a part of the surface of the photodiode.

As described above, the process margin is very small in the related art, so the reliability of the process is reduced, and thus the performance of the image sensor is deteriorated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and provides a method for manufacturing a CMOS image sensor, in which silicide is formed on the gate polysilicon in advance and the gate polysilicon is subsequently patterned, thereby improving the process margin of the silicide process. For that purpose.

1A is a circuit diagram showing the configuration of a unit pixel of a conventional CMOS image sensor;

1B is a layout diagram showing unit pixels of a CMOS image sensor formed according to a conventional silicide forming method;

1C to 1D are process flowcharts showing a conventional silicide forming method;

2A to 2D are flowcharts illustrating a silicide forming method of a CMOS image sensor according to an embodiment of the present invention;

* Description of the symbols for the main parts of the drawings *

21: substrate

22: epi layer

23: device isolation film

24: gate electrode of the transfer transistor

25: silicide

26: photodiode

27: spacer

28: floating diffusion area

29: silicide prevention film

30: first mask

In accordance with another aspect of the present invention, there is provided a method of manufacturing a CMOS image sensor, the method comprising: applying a gate polysilicon on a substrate on which a device isolation film defining an active region and a field region is formed; Forming silicide on the gate polysilicon; Patterning the gate polysilicon; Forming a related device including a photodiode on the substrate; And forming silicide on the active region except for the photodiode.

The present invention relates to a method for manufacturing a CMOS image sensor in which silicide is formed on the gate polysilicon in advance and the gate polysilicon is subsequently patterned to improve the process margin of the silicide process.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention.

2A to 2D are diagrams illustrating a silicide forming method of a CMOS image sensor according to an exemplary embodiment of the present invention.

First, as shown in FIG. 2A, a low concentration epitaxial layer 22 is formed on a relatively high concentration semiconductor substrate 21. The reason for using the low concentration epi layer 22 on the high concentration substrate 21 is as follows. First, since the low concentration epi layer exists, the depletion region of the photodiode can be increased largely and deeply to collect photocharges. This is because the ability of the photodiode for photodiode can be increased, and secondly, if the substrate 21 has a high concentration at the bottom of the epi layer 22, the charge is discharged before the charge is diffused to neighboring pixel units. This is because the fast recombination can reduce the random diffusion of the photocharges, thereby reducing the change in the transfer function of the photocharges.

Next, a device isolation layer 23 defining an active region and a field region is formed in a predetermined region of the epi layer. A device isolation film using a trench structure may be used as the device isolation film, or a device isolation film may be manufactured using a thermal oxide film.

Next, after the gate polysilicon 24 is coated on the epi layer 22, the silicide 25 is formed on the gate polysilicon 24. Cobalt silicide or titanium silicide may be used as the silicide 25. Next, the gate polysilicon 24 having the silicide 25 formed thereon is patterned to form the gate electrode 22 of the transistor. 2A does not show the gate insulating film.

Next, as shown in FIG. 2B, a photodiode 26 is formed inside the epitaxial layer 22 between the device isolation layer 23 and the gate electrode 24. In FIG. 2B, only the gate electrode 24 of the transfer transistor is shown among the transistors constituting the unit pixel, and the remaining transistors are not shown. Next, spacers 27 are formed on both sidewalls of the gate electrode 24, and floating diffusion regions 28 are formed on the other side of the gate electrode 24.

Next, as shown in FIG. 2C, the silicide prevention layer 29 is formed over the entire structure. Subsequently, a first mask 30 covering only the photodiode 26 is formed on the silicide prevention layer 29, wherein one side of the first mask 30 may not be exactly aligned with the spacer 27.

That is, in one embodiment of the present invention, since silicide is already formed on the gate electrode, one side of the first mask may be aligned to the gate electrode, and thus, the process margin may increase. According to one embodiment of the present invention, in addition to the conventional process margin of 0.1 μm, the process margin increases by the length of the gate electrode 24.

After the first mask 30 is formed in this manner, as illustrated in FIG. 2D, an etching process of using the first mask 30 as an etching barrier is performed to remove the silicide prevention layer 29. Subsequently, when the silicide forming process is performed, the silicide 25 is formed on the active region of the unit pixel including the floating diffusion region 28.

As described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and the present invention may be variously substituted, modified, and changed without departing from the spirit of the present invention. It will be apparent to those of ordinary skill in the art.

Application of the present invention can increase the process margin in the silicide forming process in the finer CMOS image sensor can improve the reliability of the process, thereby improving the performance of the image sensor.

Claims (3)

In the method of manufacturing the CMOS image sensor, Applying a gate polysilicon on a substrate on which a device isolation film defining an active region and a field region is formed; Forming silicide on the gate polysilicon; Patterning the gate polysilicon; Forming a related device including a photodiode on the substrate; And Forming silicide on the active region excluding the photodiode Method for manufacturing a CMOS image sensor comprising a. The method of claim 1, Forming silicide on the active region except for the photodiode, Forming a silicide prevention layer on the entire structure including the gate electrode and the photodiode; Forming a first mask arranged on the gate electrode to cover only the photodiode; Selectively removing the silicide prevention layer using the first mask; And Forming silicide on the active region excluding the photodiode and the gate electrode Method of manufacturing a CMOS image sensor further comprises. The method according to claim 1 or 2, The silicide is a method of manufacturing a CMOS image sensor, characterized in that the cobalt silicide or titanium silicide.