KR20040056199A - 반도체 소자의 퓨즈 형성 방법 - Google Patents
반도체 소자의 퓨즈 형성 방법 Download PDFInfo
- Publication number
- KR20040056199A KR20040056199A KR1020020082767A KR20020082767A KR20040056199A KR 20040056199 A KR20040056199 A KR 20040056199A KR 1020020082767 A KR1020020082767 A KR 1020020082767A KR 20020082767 A KR20020082767 A KR 20020082767A KR 20040056199 A KR20040056199 A KR 20040056199A
- Authority
- KR
- South Korea
- Prior art keywords
- fuse
- forming
- layer
- semiconductor device
- material layer
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (4)
- 하층 절연 물질층상에 퓨즈 형성 영역을 사이에 갖는 하층 메탈 배선층을 형성하는 단계;전면에 제 1 절연층,퓨즈 형성용 물질층을 차례로 형성하는 단계;퓨즈 형성용 물질층을 선택적으로 식각하여 퓨즈를 형성하는 단계;전면에 제 2 절연층을 형성하고 상기 퓨즈가 노출되도록 콘택홀들을 형성하고 콘택홀들을 매립하는 제 1,2 퓨즈 단자를 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 퓨즈 형성 방법.
- 제 1 항에 있어서, 제 1,2 퓨즈 단자는 상부 메탈 배선층 형성과 동시에 동일 물질로 형성하는 것을 특징으로 하는 반도체 소자의 퓨즈 형성 방법.
- 제 1 항에 있어서, 퓨즈를 하층 메탈 배선과 배선 사이에 위치시키는 것을 특징으로 하는 반도체 소자의 퓨즈 형성 방법.
- 제 1 항에 있어서, 하층 메탈상에 위치하는 퓨즈 형성용 물질층을 CMP 공정으로 평탄화하여 제거하는 것을 특징으로 하는 반도체 소자의 퓨즈 형성 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020082767A KR100954417B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 소자의 퓨즈 형성 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020082767A KR100954417B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 소자의 퓨즈 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040056199A true KR20040056199A (ko) | 2004-06-30 |
KR100954417B1 KR100954417B1 (ko) | 2010-04-26 |
Family
ID=37348601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020020082767A KR100954417B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 소자의 퓨즈 형성 방법 |
Country Status (1)
Country | Link |
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KR (1) | KR100954417B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100929627B1 (ko) * | 2006-10-31 | 2009-12-03 | 주식회사 하이닉스반도체 | 반도체 소자의 퓨즈박스 및 그의 형성방법 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3170101B2 (ja) * | 1993-04-15 | 2001-05-28 | 株式会社東芝 | 半導体装置及びその製造方法 |
KR100216544B1 (ko) | 1995-12-13 | 1999-08-16 | 정선종 | 평면형 안티퓨즈 소자의 제조방법 |
US6518642B2 (en) * | 2001-06-06 | 2003-02-11 | Samsung Electronics Co., Ltd. | Integrated circuit having a passive device integrally formed therein |
-
2002
- 2002-12-23 KR KR1020020082767A patent/KR100954417B1/ko active IP Right Grant
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100929627B1 (ko) * | 2006-10-31 | 2009-12-03 | 주식회사 하이닉스반도체 | 반도체 소자의 퓨즈박스 및 그의 형성방법 |
Also Published As
Publication number | Publication date |
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KR100954417B1 (ko) | 2010-04-26 |
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