KR20040045695A - Method for forming mim capacitor - Google Patents

Abstract

PURPOSE: A method for forming an MIM(Metal Insulator Metal) capacitor is provided to be capable of preventing the under-cut of a dielectric layer and restraining the generation of a bridge phenomenon. CONSTITUTION: The first metal layer, a dielectric layer, and the second metal layer are sequentially deposited on a semiconductor substrate(20). An upper electrode(23a) is formed by selectively patterning the second metal layer. An insulating layer is deposited on the entire surface of the resultant structure. An insulating spacer(25a) is formed at the sidewall of the upper layer by carrying out a blanket-etching process on the insulating layer. Then, the dielectric layer is selectively etched. A lower electrode(21a) is formed by selectively patterning the first metal layer. Preferably, the insulating layer is one selected from a group consisting of an oxide layer, a nitride layer, and nitride oxide layer.

Description

Method for forming MIM capacitor

The present invention relates to a method for forming a metal-insulator-metal (MIM) capacitor, and more particularly, to a method for preventing a short bridge caused by etching of a dielectric film.

Analog Capacitors applied to CMOS IC Logic devices that require high precision are used in Advanced Analog MOS Technology, especially in the field of A / D converters or switching capacitor filters. It is a key factor. The structure of the analog capacitor is PIP (Poly-Insulator-Poly), PIM (Poly-Insulator-Metal), MIP (Metal-Insulator-Poly) and MIM (Metal-Metal) Insulator-Metal) has been used.

Among them, the MIM structure has a low series resistance, so that a capacitor having a high Q (Quality Factor) value can be realized, and in particular, a low thermal budget, a low Vcc, and a small parasitics. Since it has a component (Parastic Resistance & Capacitance), it is widely used as an analog capacitor structure.

In order to form such a MIM capacitor, the following process is conventionally performed.

1A to 1D are cross-sectional views illustrating processes for forming a conventional MIM capacitor.

First, as shown in FIG. 1A, the first metal film 11 for the lower electrode, the dielectric film 12, and the second metal film 13 for the upper electrode are formed on the semiconductor substrate 10 having a predetermined underlayer. ) In turn.

Next, as shown in FIG. 1B, in the state where a photoresist pattern (not shown) is formed on the second metal film according to a known photolithography process, the photoresist pattern is used as an etching barrier. The second metal film and the dielectric film are etched, thereby forming the upper electrode 13a.

Next, as shown in FIG. 1C, the first metal film is patterned by a known process in a state where the photoresist pattern used as the etch barrier is removed to form the lower electrode 11a and the circuit wiring 11b. As a result, the MIM capacitor 14 is constituted.

Then, as shown in FIG. 1D, the interlayer insulating film 15 is deposited on the substrate resultant up to this step, and then the surface thereof is planarized through a known chemical mechanical polishing (CMP) process. Then, the interlayer insulating layer 15 is etched to form contact holes exposing the lower electrode 11a and the upper electrode 13a of the MIM capacitor 14 and the circuit wiring 11b, and conducting the conductive holes in the contact holes. A material, for example tungsten, is embedded to form a tungsten plug 16. Subsequently, metal interconnects 17 which are individually contacted with the tungsten plugs 16 are formed on the interlayer insulating film 15 according to a known process to complete the formation of the MIM capacitor.

However, according to the conventional MIM capacitor forming method described above, etching of the dielectric film including the second metal film for the upper electrode is usually performed using high pressure equipment, in which case, the undercut of the dielectric film on the pattern sidewalls is undercut. As a result, the field concentration phenomenon occurs in the undercut region, causing breakdown under low voltage.

On the other hand, in the case of using low pressure or middle pressure equipment, the above problems can be solved. However, if the low pressure or medium pressure equipment is used in this way, sputtering is relatively more likely than when using high pressure equipment. ) Occurs severely, and the lower electrode material is sputtered and redeposited on the sidewall of the MIM capacitor, causing a short bridge.

Accordingly, an object of the present invention is to provide a MIM capacitor forming method capable of preventing the occurrence of a short bridge while preventing undercut of a dielectric film.

1A to 1D are cross-sectional views illustrating a conventional MIM capacitor forming method.

2A to 2F are cross-sectional views illustrating a method of forming an M capacitor according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

20 semiconductor substrate 21 first metal film

21a: lower electrode 22: dielectric film

23: second metal film 23a: upper electrode

24 photosensitive film pattern 25 insulating film

25a: insulating film spacer 30: MIM capacitor

In order to achieve the above object, the present invention comprises the steps of depositing a first metal film, a dielectric film and a second metal film on a semiconductor substrate; Patterning the second metal film to form an upper electrode; Depositing an insulating film on the upper electrode and the dielectric film; Blanket etching the insulating film to form insulating film spacers on sidewalls of the upper electrode; Etching the dielectric film; And forming a lower electrode by patterning the first metal layer.

Here, any one of an oxide film, a nitride film, and an oxynitride film is used as the insulating film.

In addition, forming the insulating film spacer by etching the insulating film and etching the dielectric film may be performed simultaneously under the same etching conditions when the insulating film and the dielectric film are made of the same material.

According to the present invention, the dielectric film is etched by using low pressure or medium voltage equipment with the insulating film spacer formed on the sidewall of the upper electrode, thereby preventing undercut during the etching of the dielectric film. The occurrence of short bridges due to redeposition can also be prevented.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views illustrating a method of forming a MIM capacitor according to an embodiment of the present invention.

Referring to FIG. 2A, a semiconductor substrate 20 having a predetermined underlayer (not shown) is provided. Then, the first metal film 21 for the lower electrode, the dielectric film 22 and the second metal film 23 for the upper electrode are sequentially deposited on the semiconductor substrate 20.

Referring to FIG. 2B, a photosensitive film pattern 24 defining an upper electrode formation region is formed on the second metal film according to a known process. Then, the second metal film is etched using the photoresist pattern 24 as an etch barrier, thereby forming the upper electrode 23a.

Referring to FIG. 2C, an insulating film 25 is deposited on the upper electrode 23a and the exposed dielectric film 22 while removing the photoresist pattern used as an etch barrier. Herein, any one of an oxide film, a nitride film, and an oxynitride film is used as the insulating film 25.

Referring to FIG. 2D, the insulating film is blanket-etched, thereby forming the insulating film spacer 25a on the sidewall of the upper electrode 23a.

Referring to FIG. 2E, the dielectric film 22 is etched according to a known process using the upper electrode 23a including the insulating film spacer 25a as an etching barrier. In this case, the dielectric layer 22 is etched using low or medium pressure equipment, not conventional high pressure equipment. In this case, in the past, a short bridge was generated by redeposition of sputtered lower electrode materials. In the present invention, the insulating film spacer 25a is formed on the sidewall of the upper electrode 23a, although the sputtering of the lower electrode material and the redeposition of the sputtered material occur due to the use of low or medium pressure equipment. A shot bridge between 23a and the lower electrode to be formed later is not caused.

Referring to FIG. 2F, the first metal film is patterned according to a known process to form the lower electrode 21a and the circuit wiring 21b. As a result, the MIM capacitor 30 is formed.

Subsequently, although not shown, an interlayer insulating film is deposited on the substrate resultant up to the step, and then the surface thereof is planarized through a CMP process, and then the lower electrode, the upper electrode, and the circuit wiring of the MIM capacitor are disposed in the interlayer insulating film. Forming contact plugs which are in contact with each other, and then forming metal wirings which are individually contacted with each contact plug on the interlayer insulating film, completes the formation of the MIM capacitor according to the present invention.

As described above, the present invention forms a spacer on the sidewall after the formation of the upper electrode, and in this state by etching the dielectric film using low or medium pressure equipment, by using the low or medium pressure equipment, the dielectric film It is possible to prevent undercuts during etching, and also to prevent short bridges due to redeposition of sputtered lower electrode materials through the formation of the insulating film spacers.

In addition, this invention can be implemented in various changes in the range which does not deviate from the summary.

Claims (3)

Sequentially depositing a first metal film, a dielectric film, and a second metal film on a semiconductor substrate; Patterning the second metal film to form an upper electrode; Depositing an insulating film on the upper electrode and the dielectric film; Blanket etching the insulating film to form insulating film spacers on sidewalls of the upper electrode; Etching the dielectric film; And And forming a lower electrode by patterning the first metal layer. The method of claim 1, wherein the insulating film is any one selected from the group consisting of an oxide film, a nitride film, and a nitride oxide film. The MIM capacitor of claim 1, wherein forming the insulating film spacer by etching the insulating film and forming the insulating film spacer, and etching the dielectric film are performed simultaneously under the same etching conditions when the insulating film and the dielectric film are made of the same material. Formation method.