KR20040012677A - 동적 버스 반전을 사용한 동시 스위칭 출력 노이즈 감소장치 및 방법 - Google Patents

동적 버스 반전을 사용한 동시 스위칭 출력 노이즈 감소장치 및 방법 Download PDF

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Publication number
KR20040012677A
KR20040012677A KR10-2003-7006227A KR20037006227A KR20040012677A KR 20040012677 A KR20040012677 A KR 20040012677A KR 20037006227 A KR20037006227 A KR 20037006227A KR 20040012677 A KR20040012677 A KR 20040012677A
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KR
South Korea
Prior art keywords
bit
data
inversion
bus transaction
inversion signal
Prior art date
Application number
KR10-2003-7006227A
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English (en)
Korean (ko)
Inventor
볼크앤드류
라자파스린바산
Original Assignee
인텔 코오퍼레이션
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Application filed by 인텔 코오퍼레이션 filed Critical 인텔 코오퍼레이션
Publication of KR20040012677A publication Critical patent/KR20040012677A/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
KR10-2003-7006227A 2000-11-07 2001-10-12 동적 버스 반전을 사용한 동시 스위칭 출력 노이즈 감소장치 및 방법 KR20040012677A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US70822100A 2000-11-07 2000-11-07
US09/708,221 2000-11-07
PCT/US2001/031816 WO2002039290A2 (en) 2000-11-07 2001-10-12 Method and apparatus for reducing simultaneous switching output noise using dynamic bus inversion

Publications (1)

Publication Number Publication Date
KR20040012677A true KR20040012677A (ko) 2004-02-11

Family

ID=24844882

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2003-7006227A KR20040012677A (ko) 2000-11-07 2001-10-12 동적 버스 반전을 사용한 동시 스위칭 출력 노이즈 감소장치 및 방법

Country Status (6)

Country Link
KR (1) KR20040012677A (zh)
CN (1) CN1483166A (zh)
AU (1) AU2002211646A1 (zh)
DE (1) DE10196834T1 (zh)
GB (1) GB2387943A (zh)
WO (1) WO2002039290A2 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100845141B1 (ko) * 2007-01-17 2008-07-10 삼성전자주식회사 싱글 레이트 인터페이스 장치, 듀얼 레이트 인터페이스장치 및 듀얼 레이트 인터페이싱 방법
KR100877680B1 (ko) * 2006-04-04 2009-01-09 삼성전자주식회사 반도체 장치 사이의 단일형 병렬데이터 인터페이스 방법,기록매체 및 반도체 장치
US7541947B2 (en) 2006-05-27 2009-06-02 Samsung Electronics Co., Ltd. Semiconductor devices, a system including semiconductor devices and methods thereof
US7688102B2 (en) 2006-06-29 2010-03-30 Samsung Electronics Co., Ltd. Majority voter circuits and semiconductor devices including the same
US8552891B2 (en) 2006-05-27 2013-10-08 Samsung Electronics Co., Ltd. Method and apparatus for parallel data interfacing using combined coding and recording medium therefor
WO2020205060A1 (en) * 2019-03-29 2020-10-08 Intel Corporation Minimum input/output toggling rate for interfaces

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1380961B1 (en) * 2002-07-10 2006-04-05 STMicroelectronics S.r.l. Process and device for reducing bus switching activity and computer program product therefor
JP2004080553A (ja) 2002-08-21 2004-03-11 Nec Corp データ出力回路及びデータ出力方法
DE60209690D1 (de) * 2002-09-25 2006-05-04 St Microelectronics Srl Verfahren und Gerät, um ein digitales Signal über einem Rechnerbus zu übertragen und Rechnerprogrammprodukt dafür
DE60221396D1 (de) 2002-09-25 2007-09-06 St Microelectronics Srl Verfahren und Gerät, um digitales Signal über einem Rechnerbus zu übertragen und Rechnerprogrammprodukt dafür
KR100459726B1 (ko) * 2002-10-05 2004-12-03 삼성전자주식회사 멀티-비트 프리페치 반도체 장치의 데이터 반전 회로 및데이터 반전 방법
US6992506B2 (en) 2003-03-26 2006-01-31 Samsung Electronics Co., Ltd. Integrated circuit devices having data inversion circuits therein with multi-bit prefetch structures and methods of operating same
DE602005004408T2 (de) * 2004-06-21 2008-05-21 Nxp B.V. Datenverarbeitungssystem und verfahren zur verbindungs-arbitrierung
US7764792B1 (en) 2005-01-13 2010-07-27 Marvell International Ltd. System and method for encoding data transmitted on a bus
US7869525B2 (en) * 2005-08-01 2011-01-11 Ati Technologies, Inc. Dynamic bus inversion method and system
KR100621353B1 (ko) 2005-11-08 2006-09-07 삼성전자주식회사 데이터 반전 확인 기능을 가지는 데이터 입출력 회로 및이를 포함하는 반도체 메모리 장치
CN101788967B (zh) * 2010-03-09 2012-02-08 西安电子科技大学 抗串扰片上总线编解码方法及其编解码装置
US8260992B2 (en) * 2010-04-12 2012-09-04 Advanced Micro Devices, Inc. Reducing simultaneous switching outputs using data bus inversion signaling
CN103885913B (zh) * 2014-03-26 2017-01-04 中国科学院声学研究所 总线编解码装置及其方法
KR20160058503A (ko) * 2014-11-17 2016-05-25 에스케이하이닉스 주식회사 반도체 메모리 장치
US10623200B2 (en) * 2018-07-20 2020-04-14 Nvidia Corp. Bus-invert coding with restricted hamming distance for multi-byte interfaces

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0520650A1 (en) * 1991-06-19 1992-12-30 AT&T Corp. Low power signaling using gray codes
JPH0969075A (ja) * 1995-08-31 1997-03-11 Nippon Telegr & Teleph Corp <Ntt> バス回路
US5960468A (en) * 1997-04-30 1999-09-28 Sony Corporation Asynchronous memory interface for a video processor with a 2N sized buffer and N+1 bit wide gray coded counters

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100877680B1 (ko) * 2006-04-04 2009-01-09 삼성전자주식회사 반도체 장치 사이의 단일형 병렬데이터 인터페이스 방법,기록매체 및 반도체 장치
US7541947B2 (en) 2006-05-27 2009-06-02 Samsung Electronics Co., Ltd. Semiconductor devices, a system including semiconductor devices and methods thereof
US7830280B2 (en) 2006-05-27 2010-11-09 Samsung Electronics Co., Ltd. Semiconductor devices, a system including semiconductor devices and methods thereof
US8552891B2 (en) 2006-05-27 2013-10-08 Samsung Electronics Co., Ltd. Method and apparatus for parallel data interfacing using combined coding and recording medium therefor
US9048855B2 (en) 2006-05-27 2015-06-02 Samsung Electronics Co., Ltd Method and apparatus for parallel data interfacing using combined coding and recording medium therefor
US7688102B2 (en) 2006-06-29 2010-03-30 Samsung Electronics Co., Ltd. Majority voter circuits and semiconductor devices including the same
KR100845141B1 (ko) * 2007-01-17 2008-07-10 삼성전자주식회사 싱글 레이트 인터페이스 장치, 듀얼 레이트 인터페이스장치 및 듀얼 레이트 인터페이싱 방법
US7746890B2 (en) 2007-01-17 2010-06-29 Samsung Electronics Co., Ltd. Interface device and inter-chip communication interface apparatus to control data transfer between chips
WO2020205060A1 (en) * 2019-03-29 2020-10-08 Intel Corporation Minimum input/output toggling rate for interfaces
US10963405B2 (en) 2019-03-29 2021-03-30 Intel Corporation Minimum input/output toggling rate for interfaces

Also Published As

Publication number Publication date
WO2002039290A2 (en) 2002-05-16
GB0312605D0 (en) 2003-07-09
WO2002039290A3 (en) 2003-04-03
DE10196834T1 (de) 2003-11-13
CN1483166A (zh) 2004-03-17
GB2387943A (en) 2003-10-29
AU2002211646A1 (en) 2002-05-21

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