KR20040000069A - Semiconductor memory device and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A semiconductor memory device and a fabricating method therefor are provided to prevent the generation of a bridge between storage node electrodes due to a shaking phenomenon of the storage node electrodes by supporting the storage node electrodes by means of a support bar. CONSTITUTION: A semiconductor memory device includes a plurality of storage node electrodes(120) and a plurality of support bars(135). The storage node electrodes(120) are arranged in a predetermined rule on a semiconductor substrate. The storage node electrodes(120) have the constant height and the cylindrical shape, respectively. The support bars(135) are located on short axes of the storage node electrodes(120). The storage node electrodes(120) located at left sides and right sides of the support bars(135) are supported by the support bars(135).

Description

Semiconductor memory device and method for manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly, to a semiconductor memory device capable of preventing the storage node electrode from falling over and a method of manufacturing the same.

As semiconductor devices are highly integrated, the area occupied by unit cells is decreasing. On the other hand, since the driving capability of the DRAM is determined by the capacitance of the capacitor, various efforts have been made to increase the capacitance despite the reduction in the area occupied by the capacitor. As part of this effort, in order to increase the effective area of the storage node electrode of the capacitor, three-dimensional storage such as concave type, cylinder type, fin type or box type The node electrode is formed. Among them, concave-type storage node electrodes are easily planarized, and less problems such as oxidation due to misalignment occur, which are frequently used in high-density memory devices.

Here, a semiconductor memory device having a general concave storage node electrode will be described with reference to FIG. 1.

As illustrated in FIG. 1, an interlayer insulating layer 12 is formed on a semiconductor substrate 10 provided with a circuit element (not shown) such as a MOS transistor. The storage node contact pads 14 are provided in the interlayer insulating layer 12. This storage node contact pad 14, as is known, connects the source region (not shown) of the selected MOS transistor with the storage node electrode to be formed later. A cup-shaped concave storage node electrode 16 is formed on a portion of the storage node contact 14 and the interlayer insulating layer 12. The concave storage node electrode 16 is formed in the following manner. First, a mold oxide (not shown) having a predetermined thickness is deposited on the interlayer insulating layer 12 including the storage node contact pads 14. Next, the mold oxide layer is etched to expose the storage node contact pads 14 to define an area where the storage node electrodes are to be formed. Thereafter, a conductive layer (not shown) and a buffer insulating film (not shown) are sequentially formed on the mold oxide layer so as to be in contact with the exposed storage node contact pads 14. Subsequently, the conductive layer and the insulating film for node separation are chemical mechanical polishing (hereinafter referred to as CMP) so that the mold oxide film surface is exposed. Then, the insulating film for separating nodes and the mold oxide film are removed in a known manner, thereby forming the storage node electrode 16 in the form of a concave.

However, conventional concave storage node electrodes have the following problems.

That is, as the degree of integration of current semiconductor memory devices increases, the pitch D of the wiring and the distance D between the storage node electrodes 16 should be reduced in view of the density, while the storage node electrodes have high capacitance. You must increase its height to get it. In this way, if the area of the storage node electrode is reduced and only the height is increased, the aspect ratio is increased so that the storage node electrode 16 falls toward another adjacent storage node electrode 16 even if a slight impact is applied. do. This causes a bridge with another adjacent storage node electrode 16.

Furthermore, since the storage node electrode 16 has a high aspect ratio, the storage node electrode 16 can be bent toward another adjacent storage node electrode 16, making it difficult to secure a distance D from the adjacent storage node electrode 16.

Accordingly, an object of the present invention is to provide a semiconductor memory device capable of preventing the storage node electrode from falling while maintaining a fine pitch between the storage node electrodes.

Another object of the present invention is to provide a method of manufacturing the semiconductor memory device.

1 is a cross-sectional view of a semiconductor memory device having a storage node electrode having a general concave shape.

2A to 2D are plan views of storage node electrodes according to Embodiment 1 of the present invention.

3A to 3D are cross-sectional views of FIGS. 2A to 2D taken along the y-y 'direction.

4A to 4D are cross-sectional views of FIGS. 2A to 2D taken along the x-x 'direction.

5 is a plan view of a storage node electrode for describing a second embodiment of the present invention.

6 is a cross-sectional view taken along the line y-y 'of FIG. 5.

FIG. 7 is a cross-sectional view taken along the line x-x 'of FIG. 5.

8 is a plan view of a storage node electrode for explaining a third embodiment of the present invention.

9 is a plan view illustrating a modification of FIG. 8.

10 is a plan view of a storage node electrode for explaining a fourth exemplary embodiment of the present invention.

FIG. 11 is a cross-sectional view taken along the line y-y 'of FIG. 10, and FIG. 12 is a cross-sectional view taken along the line x-x' of FIG. 10.

(Explanation of symbols for the main parts of the drawing)

100 semiconductor substrate 115 mold oxide film

120: storage node electrode 125: buffer insulating film

135,136: support bar

Other objects and novel features as well as the objects of the present invention will become apparent from the description of the specification and the accompanying drawings.

Among the inventions disclosed herein, an outline of representative features is briefly described as follows.

According to an aspect of the present invention, a semiconductor memory device includes a semiconductor substrate, a plurality of storage node electrodes arranged in a predetermined shape on the semiconductor substrate, and having a predetermined height and having a cylindrical shape, and the storage node electrodes. And a support bar terminating in the short axis direction of the storage node electrode, wherein left and right storage node electrodes are supported by the support bar around the support bar.

The support bar terminates the center of the storage node electrode. In addition, the support bar has a depth smaller than the depth of the storage node electrode, the depth of the support bar is preferably 0.01㎛ to 5㎛. Moreover, it is preferable that the width | variety of a support bar is 10 nm-100 nm.

The support bar may be formed of an insulator, for example, a silicon nitride film.

The display device may further include a support bar crossing the center of the storage node electrode, and the upper and lower storage node electrodes are supported around the support bar by the crossing support bar.

The planar surface of the storage node electrode has an elliptical cylinder shape.

In addition, a semiconductor memory device according to another embodiment of the present invention, a semiconductor substrate, a plurality of storage node electrodes arranged in a predetermined shape on the semiconductor substrate, having a predetermined height and a cylindrical shape, and the storage node And a support bar dividing an electrode in an oblique direction, and both storage node electrodes are supported by the support bar around the support bar. In this case, the storage node electrode may have a circular cylinder shape.

In addition, a semiconductor memory device according to another embodiment of the present invention, a semiconductor substrate, a plurality of storage node electrodes arranged in a predetermined shape on the semiconductor substrate, and having a predetermined height in the form of a cylinder, and the storage node And a support bar supporting an electrode, wherein the support bar coincides with a short diameter of the storage node electrode and is formed therein, and a second bar disposed in line with the first bar and interposed between adjacent storage node electrodes. And a bar.

In addition, a method of manufacturing a semiconductor memory device according to another aspect of the present invention is as follows. First, a mold oxide film is formed on a semiconductor substrate, and then the mold oxide film is partially etched to define a storage node electrode region. Then, the conductive layer for the storage node electrode is deposited on the storage node electrode region and the mold oxide layer, and then a buffer insulating layer is formed on the conductive layer for the storage node electrode. Thereafter, the buffer insulating layer and the conductive layer for the storage node electrode are chemically mechanically polished to form storage node electrodes, one for each storage node electrode region, and the mold oxide layer and the buffer insulating layer are partially etched to form grooves. Subsequently, an insulating material is embedded in the groove to form a support bar, and the mold oxide film and the buffer insulating film are etched.

In the forming of the groove, the mold oxide layer and the buffer insulating layer may be etched, and the storage node electrode may be partially etched to form a groove in the storage node electrode.

The insulator constituting the support bar is preferably formed of a material having a different etching selectivity from the mold oxide film and the buffer insulating film.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

Here, the embodiments of the present invention can be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements. In addition, where a layer is described as being "on" another layer or semiconductor substrate, a layer may exist in direct contact with the other layer or semiconductor substrate, or a third layer therebetween. Can be done.

(Example 1)

2A to 2D are plan views of storage node electrodes according to Embodiment 1 of the present invention, and FIGS. 3A to 3D are cross-sectional views of FIGS. 2A to 2D taken along the y-y 'direction, and FIG. 4A. 4D is a cross-sectional view taken along the line xx 'of FIGS. 2A to 2D.

First, referring to FIGS. 2A, 3A, and 4A, an interlayer insulating layer 105 is formed on a semiconductor substrate 100, for example, a silicon substrate on which a MOS transistor (not shown) and a bit line (not shown) are formed. ). An etch stop layer 107 is formed on the interlayer insulating layer 105. The storage node contact pads 110 are formed in a known manner so as to be in contact with predetermined portions of the etch stop layer 107 and the interlayer insulating layer 105, preferably source regions of the MOS transistors. Next, a mold oxide layer 115 is formed on the storage node contact pad 110 and the etch stop layer 107. Since the mold oxide film 115 determines the height of the storage node electrode to be formed later, the mold oxide film 115 is formed to have a predetermined thickness in consideration of capacitance. Thereafter, in order to define a region where the storage node electrode is to be formed, the mold oxide layer 115 is etched to expose the storage node contact pad 110. A conductive layer (not shown) for a storage node electrode and a buffer insulating layer 125 for separating a node are deposited on the surface of the mold oxide film 115 to be in contact with the exposed contact pad 110. The buffer insulating layer 125 and the conductive layer for the storage node electrode are CMP to expose the surface of the mold oxide film 115 to form a node-separated storage node electrode 120. In this case, as illustrated in FIG. 2A, the storage node electrode 120 is a cylinder having an elliptical shape in planar shape, and is disposed in a matrix form at predetermined intervals. In addition, a buffer insulating layer 125 is embedded in the storage node electrode 120 having a cylindrical shape.

Referring to FIGS. 2B, 3B, and 4B, predetermined portions of the mold oxide film 115, the buffer insulating film 125, and the storage node electrode 120 are etched to shorten the grooves in the short direction of the storage node electrode 120. 130). The short groove 130 is formed to terminate the center of the storage node electrode 120. Here, as shown in FIG. 2B, the short groove 130 is connected to the short groove 130 of the storage node electrode 120 arranged in the lower row of the storage node electrode 120, and has a linear shape as a whole. The short groove 130 has a predetermined width and has a depth smaller than that of the buffer insulating layer 125. The width and depth of the short groove 130 will be described later. Here, the storage node electrode indicated by the dotted line in FIG. 3B represents the storage node electrode positioned on the side surface of the short groove 130.

As shown in Figs. 2C, 3C, and 4C, an insulating film is deposited so that the short axis groove 130 is sufficiently filled. In this case, an insulating film having an etch selectivity with the mold oxide film 115 and the buffer insulating film 125 may be used, for example, a silicon nitride film (SiN) may be used. Next, the insulating film is etched back to form the support bar 135. The support bar 135 is formed to bisect the elliptical cylinder-shaped storage node electrode 120 in left and right directions.

Next, referring to FIGS. 2D, 3D, and 4D, the mold oxide film 115 on both sides of the storage node electrode 120 and the buffer insulating layer 125 inside the storage node electrode 120 are removed by a known wet etching method. . Accordingly, only the storage node electrode 120 and the support bar 135 remain on the interlayer insulating layer 105 and the etch stop layer 107. In this case, the support bar 135 is fixed by the left ellipse portion 120a and the right ellipse portion 120b of the storage node electrode 120. In addition, since the left ellipse portion 120a and the right ellipse portion 120b of the storage node electrode 120 are also fixed by the support bar 135, it is prevented from shaking or falling toward other adjacent storage node electrodes.

Here, the width W of the support bar 135 may be about 10 nm to 100 nm, and the depth d1 may be shallower than the depth of the entire storage node electrode 120 and may have a depth of about 0.01 μm to 5 μm. have. In addition, the distance d2 from the bottom of the support bar 135 to the bottom of the storage node electrode 120 may have a depth of 5 μm or less.

In addition, the support bar 135 may be formed of any other insulating film in addition to the silicon nitride film.

(Example 2)

FIG. 5 is a plan view of a storage node electrode for explaining a second embodiment of the present invention, FIG. 6 is a cross-sectional view cut along the yy 'direction of FIG. 5, and FIG. 7 is a cross-sectional view cut along the xx' direction of FIG. to be.

5 to 7, in the present embodiment, the support bars 135 and 140 are formed not only in the short axis direction of the storage node electrode 120 but also in the long axis direction. That is, the short supporting bar 135 (hereinafter referred to as the short supporting bar) is disposed to terminate the center of the storage node electrode 120, and the long supporting bar 140 (hereinafter referred to as the long supporting bar) is the storage node electrode 120. It is arranged to cross the center of. Accordingly, the left and right storage node electrodes 120a and 120b are supported by the single-axis support bar 135 on the basis of the short-axis support bar 135, and the upper and lower storage node electrodes 120c on the basis of the long-axis support bar 140. 120d is supported by the long axis support bar 140. Therefore, since the support bars 135 and 140 are formed in the short axis and long axis directions, the storage node electrodes 120 may be prevented from falling in the left and right directions. In addition, the width and depth of the support bars 135 and 140 in the short axis and long axis directions may be the same as the width and depth of the first embodiment.

(Example 3)

FIG. 8 is a plan view of a storage node electrode for explaining a third embodiment of the present invention, and FIG. 9 is a plan view illustrating a modification of FIG. 8.

Referring to FIG. 8, the storage node electrode 121 is formed in a circular cylinder shape. The support bar 150 is formed in an oblique direction of the storage node electrode 121. Even when the support bar 121 is formed in the diagonal direction, the storage node electrodes 121 on both sides of the support 121 are prevented from falling down by the support 150. In this case, the storage node electrode 121 may also be formed in the shape of an elliptical cylinder.

In addition, as illustrated in FIG. 9, the support bars 150 and 160 may be disposed to be orthogonal to each other while having a diagonal shape. Even if formed in this way, the same effect can be obtained. At this time, the width and depth of the support bar (150, 160) is the same as the above-described embodiment.

(Example 4)

FIG. 10 is a plan view of a storage node electrode for explaining a fourth exemplary embodiment of the present invention, FIG. 11 is a cross-sectional view taken along the line yy 'of FIG. 10, and FIG. 12 is a cross-sectional view taken along the line xx' of FIG. to be.

Referring to FIG. 10, the storage node electrodes 120 are arranged in an elliptical cylinder shape as described above. In this case, the storage node electrodes 120 are arranged in a matrix form as described above. The support bar 136 includes a first bar 136a fitted inside the storage node electrode 120 so as to be parallel to a short axis of the storage node electrode 120, and storage adjacent to and parallel to the short axis of the storage node electrode 120. And a second bar 136b sandwiched between the node electrodes 120. At this time, the first bar 136a and the second bar 136b are preferably placed in a straight line, and these bars 136a and 136b support the storage node electrode 120. At this time, the depth and width of the support bar 136 is the same as the depth and width of the support bar described above.

How to form the support bar 136 in this structure is as follows.

As illustrated in FIGS. 2A, 3A, and 4A, the storage node electrode 120 is formed in the mold oxide film 115 and the buffer insulating film 125 by the above-described method. Next, the mold oxide film 115 and the buffer insulating film 125 are partially etched to form a short groove (not shown). At this time, it is important that the storage node electrode 120 is not etched when the short groove is formed. In addition, a groove formed in the storage node electrode 120, that is, in the buffer insulating layer 125, is referred to as a first uniaxial groove (not shown), and is formed outside the storage node electrode 120, that is, in the mold oxide film 115. The groove formed is called a second shortened groove (not shown). Thereafter, an insulator, for example a silicon nitride film, is embedded in the first and second shortened grooves in a known manner to form a support bar 136, as shown in FIGS. 11 and 12.

In this case, the first bar 136a formed in the storage node electrode 120 is formed to match the short diameter of the storage node electrode 120, and the storage node electrode 120 is formed in the storage node electrode 120. 120) to prevent the fall. In addition, the second bar 136b formed outside the storage node electrode 120, that is, between the storage node electrodes 120 may support the adjacent storage node electrodes 120, and between the storage node electrodes 120. It acts as a gap retainer to maintain the gap.

As such, the same effect may be achieved without penetrating the storage node electrode 120.

As described in detail above, according to the present invention, the insulating film support bar is formed in the short axis direction and / or the long axis direction or the diagonal direction of the storage node electrode. As a result, the storage node electrode is supported by the support bar, and thus, a phenomenon in which the storage node is swayed or collapsed in the left, right, up and down directions can be prevented. Thus, in the highly integrated memory device, bridges with adjacent other storage node electrodes are prevented.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. .

Claims (30)

Semiconductor substrates; A plurality of storage node electrodes arranged on the semiconductor substrate with a predetermined rule and having a predetermined height and formed in a cylinder shape; And A support bar terminating the storage node electrode in a minor direction of the storage node electrode, The left and right storage node electrodes are supported by the support bar around the support bar. The method of claim 1, And the support bar terminates at the center of the storage node electrode. The method of claim 1, And the support bar has a depth shallower than that of the storage node electrode. The method of claim 3, wherein The depth of the support bar is a semiconductor memory device, characterized in that 0.01㎛ to 5㎛. The method of claim 1, The width of the support bar is a semiconductor memory device, characterized in that 10nm to 100nm. The method of claim 1, The support bar is a semiconductor memory device, characterized in that formed with an insulator. The method of claim 6, The support bar is a semiconductor memory device, characterized in that formed of a silicon nitride film. The method of claim 1, A support bar traversing the center of the storage node electrode; The upper and lower storage node electrodes are supported by the transversing support bar around the support bar. The method according to claim 1 or 8, And the planar surface of the storage node electrode has an elliptical cylinder shape. Semiconductor substrates; A plurality of storage node electrodes arranged on the semiconductor substrate with a predetermined rule and having a predetermined height and formed in a cylinder shape; And A support bar dividing the storage node electrode in an oblique direction; Both storage node electrodes are supported by the support bar around the support bar. The method of claim 10, And the support bar has a depth shallower than a height of the storage node electrode. The method of claim 11, The depth of the support bar is a semiconductor memory device, characterized in that 0.01㎛ to 5㎛. The method of claim 10, The width of the support bar is a semiconductor memory device, characterized in that 10nm to 100nm. The method of claim 10, The support bar is a semiconductor memory device, characterized in that formed with an insulator. The method of claim 14, The support bar is a semiconductor memory device, characterized in that formed of a silicon nitride film. The method of claim 10, And the storage node electrode has a circular cylinder shape. Semiconductor substrates; A plurality of storage node electrodes arranged on the semiconductor substrate with a predetermined rule and having a predetermined height and formed in a cylinder shape; And A support bar for supporting the storage node electrode, The support bar may include a first bar which is formed within the first bar and coincides with a diameter of the storage node electrode, and includes a second bar which is disposed in a line with the first bar and interposed between adjacent storage node electrodes. device. The method of claim 17, And the support bar has a depth shallower than that of the storage node electrode. The method of claim 18, The depth of the support bar is a semiconductor memory device, characterized in that 0.01㎛ to 5㎛. The method of claim 17, The width of the support bar is a semiconductor memory device, characterized in that 10nm to 100nm. The method of claim 17, The support bar is a semiconductor memory device, characterized in that formed with an insulator. The method of claim 21, The support bar is a semiconductor memory device, characterized in that formed of a silicon nitride film. Forming a mold oxide film on the semiconductor substrate; Etching a portion of the mold oxide layer to define a storage node electrode region; Depositing a conductive layer for a storage node electrode on the storage node electrode region and a mold oxide layer; Forming a buffer insulating layer on the conductive layer for the storage node electrode; Chemical mechanical polishing the buffer insulating layer and the conductive layer for the storage node electrode to form storage node electrodes, one for each storage node electrode region; Etching a predetermined portion of the mold oxide film and the buffer insulating film to form a groove; Filling an insulating material in the groove to form a support bar; And And etching the mold oxide film and the buffer insulating film. The method of claim 23, And forming a groove in the storage node electrode by etching the mold oxide film and the buffer insulating film at the same time as forming the groove, and partially etching the storage node electrode. Manufacturing method. The method of claim 23, And the groove is formed to have a depth shallower than that of the storage node electrode. The method of claim 25, The groove is formed to have a depth of about 0.01㎛ 5㎛ method of manufacturing a semiconductor memory device. The method of claim 26, And the groove is formed to have a width of about 10 nm to 100 nm. The method of claim 23, The insulating material constituting the support bar is formed of a material having a different etching selectivity from the mold oxide film and the buffer insulating film. The method of claim 25, The insulating material constituting the support bar is formed of a silicon nitride film. The method of claim 23, The method of claim 1, wherein the buffer insulating layer and the mold oxide layer are selectively removed by a wet etching method.