KR20030064914A - A Plasma Display Device - Google Patents
A Plasma Display Device Download PDFInfo
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- KR20030064914A KR20030064914A KR1020020004983A KR20020004983A KR20030064914A KR 20030064914 A KR20030064914 A KR 20030064914A KR 1020020004983 A KR1020020004983 A KR 1020020004983A KR 20020004983 A KR20020004983 A KR 20020004983A KR 20030064914 A KR20030064914 A KR 20030064914A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/298—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels
- G09G3/2983—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels using non-standard pixel electrode arrangements
- G09G3/2986—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels using non-standard pixel electrode arrangements with more than 3 electrodes involved in the operation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2927—Details of initialising
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/20—Constructional details
- H01J11/22—Electrodes, e.g. special shape, material or configuration
- H01J11/28—Auxiliary electrodes, e.g. priming electrodes or trigger electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
Abstract
Description
본 발명은 플라즈마 표시 장치에 관한 것으로, 보다 상세하게는 모든 방전셀의 방전조건을 균일하게 하기 위한 리셋방전으로부터 발생된 광량을 최소화함으로써 배경휘도를 감소시켜 콘트라스트를 향상시킬 수 있는 플라즈마 표시 장치에 관한 것이다.The present invention relates to a plasma display device, and more particularly, to a plasma display device capable of improving contrast by reducing background luminance by minimizing the amount of light generated from a reset discharge for uniformizing discharge conditions of all discharge cells. will be.
도 1은 일반적인 교류형 면방전 플라즈마 디스플레이 패널의 개략적인 구성을 나타낸 도로서, 전면 글라스 기판(1), 전면 글라스 기판 상에 형성된 어드레스 전극(3), 전면 글라스 기판에 대향하는 배면 글라스 기판(2), 배면 글라스 기판 상에 서로 평행하게 배치되는 X전극(7)과 Y전극(8), 상기 X전극(7) 및 Y전극(8)을 덮도록 형성된 유전체층(6), 유전체층(6) 상에 MgO 보호층, 및 상기 전면 글라스 기판(1)과 배면 글라스 기판 사이에 배치되어 방전공간을 구획하는 격벽(4)을 포함하여 구성된다.FIG. 1 is a view showing a schematic configuration of a general AC surface discharge plasma display panel, and includes a front glass substrate 1, an address electrode 3 formed on the front glass substrate, and a back glass substrate 2 facing the front glass substrate. On the back glass substrate, the X electrode 7 and the Y electrode 8 arranged in parallel with each other, the dielectric layer 6 and the dielectric layer 6 formed to cover the X electrode 7 and the Y electrode 8 And a barrier rib 4 disposed between the front glass substrate 1 and the rear glass substrate to partition the discharge space.
도 2는 도 1의 플라즈마 디스플레이 패널의 구동 전극들의 배치를 나타낸 도로서, 서로 평행하게 배열된 복수의 어드레스 전극들(A1, A2, A3, …, Am-1, Am), 상기 어드레스 전극들에 대략 수직으로 교차하도록 배열된 복수의 X-전극과 Y-전극들(Y1, Y2, Y3, …, Yn-1, Yn)로 구성된다. 복수의 X-전극들과 Y-전극들 및 어드레스 전극들의 교차지점에 방전셀이 형성되며, Y-전극은 스캔전극이고 X-전극들은 공통으로 접속된 공통전극이다.FIG. 2 is a diagram illustrating an arrangement of driving electrodes of the plasma display panel of FIG. 1, wherein a plurality of address electrodes A1, A2, A3,..., Am-1, Am are arranged in parallel with each other. It consists of a plurality of X-electrodes and Y-electrodes Y1, Y2, Y3, ..., Yn-1, Yn arranged to intersect substantially vertically. A discharge cell is formed at the intersection of the plurality of X-electrodes, the Y-electrodes and the address electrodes, the Y-electrode is a scan electrode and the X-electrodes are commonly connected common electrodes.
도 3은 도 1 및 도 2의 플라즈마 디스플레이 패널의 구동을 위한 어드레스-서스테인 분리 구동방법을 나타내는 것으로서, 영상신호 1 필드를 8개의 서브필드로 분리하고, 각 서브필드는 전면기입 기간(리셋기간), 어드레스 기간 및 서스테인 기간으로 구성된다. 전면기입 기간은 도 2의 모든 방전셀을 방전시켜 방전셀들의 초기화하는 리셋기간이며, 어드레스 기간은 입력되는 영상신호에 따라 표시를 원하는 방전셀들 지정하며, 서스테인 기간은 어드레스 기간에서 지정된 방전셀들에 서스테인하는 기간이다. 각 서브필드의 서스테인 기간은 표시기간으로서의 웨이트 값이 할당되어 있어, 이들 서브필드들을 조합하여 다계조를 표현하게 된다.3 is a diagram illustrating an address-sustain separation driving method for driving the plasma display panel of FIGS. 1 and 2, wherein the video signal 1 field is divided into eight subfields, and each subfield is a full write period (reset period). , Address period and sustain period. The front write period is a reset period in which all of the discharge cells in FIG. 2 are discharged to initialize the discharge cells. The address period specifies discharge cells desired for display according to an input image signal, and the sustain period specifies discharge cells specified in the address period. It is a period of sustaining. In the sustain period of each subfield, a weight value as a display period is assigned, and these subfields are combined to express multi-gradation.
콘트라스트는 상술한 다계조 표현 시에 8개의 서브필드를 모든 온(ON) 시킨 상태의 최대 휘도와 8개의 서브필드 모두를 오프(OFF)시킨 최소 휘도 비로써 나타낸다. 따라서, 최대 휘도를 높이거나 최소 휘도를 낮춘다면 콘트라스트가 향상될 수 있다. 상기 최소 휘도에 영향을 미치는 인자로는 리셋방전, 어드레싱 방전이 해당되며. 이들은 실제 표시 휘도에 작용하지 못하면서 빛을 내는 방전이 최소 휘도를 나쁘게 한다. 리셋 방전은 모든 셀들을 350V 이상의 고전압을 인가하기 때문에 많은 빛을 내기 때문에 콘트라스트 저하에 가장 큰 요인이 되고 있다.Contrast is expressed as the maximum luminance in which all eight subfields are turned on and the minimum luminance ratio in which all eight subfields are turned off in the multi-gradation representation described above. Therefore, the contrast can be improved if the maximum brightness is increased or the minimum brightness is lowered. Factors affecting the minimum luminance include reset discharge and addressing discharge. They do not affect the actual display brightness, but the light-emitting discharge makes the minimum brightness worse. Reset discharge is the biggest factor in contrast reduction because a lot of light is emitted because all cells apply a high voltage of 350V or more.
본 발명의 목적은 상술한 콘트라스트 저하 문제를 해결하기 위한 것으로, 모든 방전셀의 방전조건을 균일하게 하기 위한 리셋방전으로부터 발생된 광량을 최소화함으로써 배경휘도를 감소시켜 콘트라스트를 향상시킬 수 있는 플라즈마 표시 장치를 제공하는 데에 있다.SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described problem of lowering the contrast, and to reduce the background luminance by minimizing the amount of light generated from the reset discharge to make the discharge conditions of all the discharge cells uniform. Is in providing.
도 1은 일반적인 교류형 면방전 PDP의 개략적 구성을 나타낸 도,1 is a diagram showing a schematic configuration of a typical AC surface discharge PDP;
도 2는 PDP를 구동하기 위한 전극 배열을 나타낸 도,2 is a diagram showing an electrode arrangement for driving a PDP;
도 3은 어드레스 서스테인 분리 구동방법의 서브필드 구조를 나타낸 도,3 is a diagram illustrating a subfield structure of an address sustain separation driving method;
도 4는 종래의 일반적인 플라즈마 표시 패널의 구조를 나타낸 도,4 is a view showing the structure of a conventional plasma display panel according to the related art;
도 5는 도 4에 나타낸 플라즈마 표시 패널의 구동 파형을 나타내는 도,FIG. 5 is a diagram showing driving waveforms of the plasma display panel shown in FIG. 4;
도 6은 본 발명의 일 실시예에 따른 플라즈마 표시 패널의 구조를 나타낸 도,6 illustrates a structure of a plasma display panel according to an embodiment of the present invention;
도 7은 본 발명의 다른 실시예에 따른 플라즈마 표시 패널의 n조를 나타낸 도, 및7 is a view showing n sets of a plasma display panel according to another exemplary embodiment of the present invention; and
도 8은 도 6 및 도7에 나타낸 본 발명에 따른 플라즈마 표시 패널의 구동 파형을 나타낸 도이다.FIG. 8 is a view showing driving waveforms of the plasma display panel according to the present invention shown in FIGS. 6 and 7.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
1: 전면 글라스 기판 2: 배면 글라스 기판1: front glass substrate 2: back glass substrate
3: 어드레스 전극4: 격벽3: address electrode 4: partition wall
5: 형광체6: 유전체층5: phosphor 6: dielectric layer
7: 스캔전극(Y-전극)8: 서스테인전극(X-전극)7: Scan electrode (Y-electrode) 8: Sustain electrode (X-electrode)
10: 블랙매트릭스11: 리셋전극10: black matrix 11: reset electrode
상기 목적을 달성하기 위한 본 발명의 기술적 해결수단은, 일정 간격을 두고 배치된 1쌍의 기판, 상기 한 기판에 형성된 복수의 어드레스 전극들, 다른 기판에 상기 어드레스 전극에 교차하도록 형성된 복수의 스캔전극과 서스테인 전극, 상기 어드레스 전극과 스캔전극-서스테인 전극의 교차점에 형성된 방전셀 및 상기 방전셀과 방전셀 사이에 형성된 블랙매트릭스를 포함하는 플라즈마 표시 장치에 있어서, 상기 블랙매트릭스 상에는 상기 스캔전극-서스테인 전극과 평행한 방향으로 연장하는 리셋전극이 형성되고; 입력되는 영상신호의 1 필드를 각각 휘도 웨이트를 갖는 복수의 서브필드로 분할하고; 상기 각각의 서브필드는 모든 방전셀의 방전상태를 균일하게 하기 위한 리셋기간, 스캔전극들에 순차적으로 스캔펄스를 인가함과 동시에 입력되는 영상데이터 신호 펄스를 복수 어드레스 전극들에 인가하여 표시하고자할 방전셀을 지정하는 어드레스 기간, 및 상기 지정된 방전셀들에 해당 서브필드의 휘도 웨이트에 따라 서스테인 펄스를 스캔전극과 서스테인 전극에 교번으로 인가하는 서스테인기간을 포함하며; 상기 리셋 기간에 리셋펄스를 상기 블랙매트릭스 상의 리셋전극에 인가하여 리셋방전을 수행하는 것을 특징으로 한다.Technical solution of the present invention for achieving the above object is a pair of substrates arranged at a predetermined interval, a plurality of address electrodes formed on the one substrate, a plurality of scan electrodes formed to cross the address electrode on the other substrate And a sustain electrode, a discharge cell formed at the intersection of the address electrode and the scan electrode-sustain electrode, and a black matrix formed between the discharge cell and the discharge cell, wherein the scan electrode-sustain electrode is formed on the black matrix. A reset electrode extending in a direction parallel to the second electrode; Dividing one field of an input video signal into a plurality of subfields each having a luminance weight; Each of the subfields is to be reset and to sequentially apply scan pulses to the scan electrodes and to simultaneously apply the input image data signal pulses to the plurality of address electrodes. An address period for designating a discharge cell, and a sustain period for alternately applying a sustain pulse to the scan electrode and the sustain electrode in accordance with the luminance weight of the subfield corresponding to the specified discharge cells; In the reset period, a reset pulse is applied to a reset electrode on the black matrix to perform reset discharge.
또한, 상기 인접하는 2개의 방전셀들 사이의 블랙매트릭스 상에 형성된 리셋전극을 상기 인접하는 2개의 방전셀 중 어느 하나에 더 가깝게 배치하는 것이 바람직하다.In addition, it is preferable to arrange the reset electrode formed on the black matrix between the two adjacent discharge cells closer to any one of the two adjacent discharge cells.
또한, 상기 인접하는 2개의 방전셀들 사이의 블랙매트릭스 상에 형성된 리셋전극을 상기 인접하는 2개의 방전셀 사의 중앙에 배치시켜 하나의 리셋전극으로 동시에 인접하는 방전셀들 모두를 리셋시킬 수 있다.In addition, the reset electrodes formed on the black matrix between the two adjacent discharge cells may be disposed in the center of the two adjacent discharge cells to reset all of the adjacent discharge cells simultaneously with one reset electrode.
이하, 상기 구성에 따른 본 발명의 실시예에 대하여 첨부된 도면을 참조하여 설명하기로 한다.Hereinafter, embodiments of the present invention according to the above configuration will be described with reference to the accompanying drawings.
도 4는 종래의 일반적인 플라즈마 표시 패널의 구조를 나타낸 도이고, 도 5는 도 4에 나타낸 플라즈마 표시 패널의 구동 파형을 나타내는 도이다.4 is a diagram illustrating a structure of a conventional plasma display panel, and FIG. 5 is a diagram illustrating driving waveforms of the plasma display panel illustrated in FIG. 4.
도 4에 나타낸 바와 같이, 하나의 방전셀은 1개의 스캔전극(7)과 서스테인전극(8) 및 1개의 어드레스전극(3)의 교차점에 형성되며, 블랙매트릭스(10)는 방전셀 사이에 스캔전극(7)과 서스테인전극(8)에 평행하게 배열된다.As shown in Fig. 4, one discharge cell is formed at the intersection of one scan electrode 7, the sustain electrode 8 and one address electrode 3, and the black matrix 10 is scanned between the discharge cells. It is arranged parallel to the electrode 7 and the sustain electrode (8).
도 3에 나타낸 바와 같이 입력되는 영상신호 1필드는 다수의 서브필드로 분할되고, 각각의 서브필드는 리셋기간, 어드레스 기간 및 서스테인기간으로 구성되며, 각각의 서브필드의 서스테인 기간은 각 휘도 웨이트가 서로 다르게 설정하여 각각의 서브필드를 조합하여 다계조를 표시한다.As shown in Fig. 3, an input video signal field is divided into a plurality of subfields, and each subfield is composed of a reset period, an address period, and a sustain period, and each sustain field of each subfield has a luminance weight. Set differently and combine each subfield to display multi gradation.
도 5에 나타낸 바와 같이, 리셋기간에는 먼저 X 서스테인전극에 소거펄스를 인가하여 이전 서브필드이 표시를 중단시킨 후 Y 스캔전극에 350V 이상의 고전압 펄스를 인가하여 리셋방전을 모든 셀에 걸쳐 수행함으로써 모든 셀의 방전조건을초기화한다.As shown in Fig. 5, in the reset period, an erase pulse is first applied to the X sustain electrode to stop the display of the previous subfield, and then a high-voltage pulse of 350 V or more is applied to the Y scan electrode to perform reset discharge across all cells. Initialize the discharge condition.
이 때, 도 4에 나타낸 바와 같이 리셋방전은 스캔전극(7)과 서스테인전극(8) 및 스캔전극(7)과 어드레스전극 사이에서 일어나는데, 이 중 스캔전극(7)과 서스테인전극(8) 사이의 리셋방전에서 발생된 광은 대부분 전면의 투명전극을 통해 외부로 방출되어 콘트라스를 저해하게 된다.At this time, as shown in FIG. 4, the reset discharge occurs between the scan electrode 7 and the sustain electrode 8, and between the scan electrode 7 and the address electrode, among which the scan electrode 7 and the sustain electrode 8 are located. Most of the light generated from the reset discharge of the light is emitted to the outside through the transparent electrode on the front surface to inhibit the contrast.
도 6은 본 발명의 일 실시예에 따른 플라즈마 표시 패널의 구조를 나타낸 것으로, 방전셀과 방전셀 사이의 블랙매트릭스 상에 리셋전극(11)을 스캔전극(7)과 서스테인전극(8)에 평행하게 형성하되 인접 방전 셀 중 스캔전극 측에 더 가깝게 형성한다.6 illustrates a structure of a plasma display panel according to an exemplary embodiment of the present invention, in which a reset electrode 11 is parallel to a scan electrode 7 and a sustain electrode 8 on a black matrix between the discharge cell and the discharge cell. It is formed to be closer to the scan electrode side of the adjacent discharge cells.
도 7은 본 발명의 다른 실시예에 따른 플라즈마 표시 패널의 구조를 나타낸 것으로, 방전셀과 방전셀 사이의 블랙매트릭스 상에 리셋전극(11)을 인접하는 방전셀들의 스캔전극(7)과 스캔전극(8)에 평행하게 형성하되, 인접 방전 셀 사이의 중앙에 폭 넓게 형성한다.7 illustrates a structure of a plasma display panel according to another exemplary embodiment of the present invention, in which scan electrodes 7 and scan electrodes of discharge cells adjacent to the reset electrode 11 are disposed on a black matrix between the discharge cells and the discharge cells. It is formed parallel to (8), but is formed in the center between adjacent discharge cells widely.
도 8은 도 6 및 도7에 나타낸 본 발명에 따른 플라즈마 표시 패널의 구동 파형을 나타낸 도로서, 먼저 X 서스테인 전극에 소거펄스를 인가하여 이전 서브필드이 표시를 중단시킨 후, 리셋전극(11)에 350V 이상의 고전압 펄스를 인가하여 리셋방전을 모든 셀에 걸쳐 수행함으로써 모든 셀의 방전조건을 초기화한다.FIG. 8 is a view showing driving waveforms of the plasma display panel according to the present invention shown in FIGS. 6 and 7. First, an erase pulse is applied to the X sustain electrode to stop display of the previous subfield, and then the reset electrode 11 is applied to the reset electrode 11. The reset discharge is applied to all the cells by applying a high voltage pulse of 350V or higher to initialize the discharge conditions of all the cells.
따라서, 본 발명에 의하면, 상술한 바와 같이, 블랙매트릭스 상에 리셋전극을 형성한 후 리셋전압을 인가하여 리셋방전을 수행함으로써, 리셋방전에 의해 발생된 광량의 상당부분을 블랙매트릭스에 의해 차단함으로써 최소 휘도(배경휘도)를 감소시켜 콘트라스트가 좋은 고화질의 플라즈마 표시 장치를 제공할 수 있다.Therefore, according to the present invention, as described above, by forming a reset electrode on the black matrix and then applying a reset voltage to perform a reset discharge, by blocking a substantial part of the amount of light generated by the reset discharge by the black matrix. It is possible to provide a high quality plasma display device having good contrast by reducing the minimum luminance (background luminance).
이상에서 본 발명은 기재된 실시예로서 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail as the embodiments described above, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical spirit of the present invention, and such modifications and modifications belong to the appended claims.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010029355A (en) * | 1999-09-30 | 2001-04-06 | 구자홍 | Method Of Driving Plasma Display Panel In High Speed And Apparatus Thereof |
| KR20010087719A (en) * | 2000-03-08 | 2001-09-21 | 구자홍 | Plasma display panel and driving method thereof |
| KR20020021485A (en) * | 2000-09-15 | 2002-03-21 | 김순택 | Plasma display panel having assistance electrode for reset, and drive method therefor |
| KR20020069424A (en) * | 2001-02-26 | 2002-09-04 | 엘지전자 주식회사 | Plasma display panel and method for driving the same |
| JP2003058105A (en) * | 2001-08-14 | 2003-02-28 | Sony Corp | Driving method for plasma display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010029355A (en) * | 1999-09-30 | 2001-04-06 | 구자홍 | Method Of Driving Plasma Display Panel In High Speed And Apparatus Thereof |
| KR20010087719A (en) * | 2000-03-08 | 2001-09-21 | 구자홍 | Plasma display panel and driving method thereof |
| KR20020021485A (en) * | 2000-09-15 | 2002-03-21 | 김순택 | Plasma display panel having assistance electrode for reset, and drive method therefor |
| KR20020069424A (en) * | 2001-02-26 | 2002-09-04 | 엘지전자 주식회사 | Plasma display panel and method for driving the same |
| JP2003058105A (en) * | 2001-08-14 | 2003-02-28 | Sony Corp | Driving method for plasma display device |
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