KR20020060345A - Manufacturing method for metal line on display panel - Google Patents
Manufacturing method for metal line on display panel Download PDFInfo
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- KR20020060345A KR20020060345A KR1020010001370A KR20010001370A KR20020060345A KR 20020060345 A KR20020060345 A KR 20020060345A KR 1020010001370 A KR1020010001370 A KR 1020010001370A KR 20010001370 A KR20010001370 A KR 20010001370A KR 20020060345 A KR20020060345 A KR 20020060345A
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- photosensitive resin
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 112
- 239000002184 metal Substances 0.000 title claims abstract description 112
- 238000004519 manufacturing process Methods 0.000 title description 11
- 238000000034 method Methods 0.000 claims abstract description 45
- 239000011347 resin Substances 0.000 claims abstract description 45
- 229920005989 resin Polymers 0.000 claims abstract description 45
- 239000011521 glass Substances 0.000 claims abstract description 19
- 238000005530 etching Methods 0.000 claims abstract description 16
- 229910052709 silver Inorganic materials 0.000 claims abstract description 14
- 239000004332 silver Substances 0.000 claims abstract description 14
- 238000007772 electroless plating Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 18
- 238000000151 deposition Methods 0.000 claims description 12
- 238000004544 sputter deposition Methods 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 2
- 229910045601 alloy Inorganic materials 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 238000000313 electron-beam-induced deposition Methods 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 238000007733 ion plating Methods 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 238000007747 plating Methods 0.000 abstract description 25
- 230000001376 precipitating effect Effects 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 48
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 11
- 238000007639 printing Methods 0.000 description 7
- 239000010949 copper Substances 0.000 description 4
- 239000011241 protective layer Substances 0.000 description 4
- 238000005245 sintering Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000007935 neutral effect Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- LFAGQMCIGQNPJG-UHFFFAOYSA-N silver cyanide Chemical compound [Ag+].N#[C-] LFAGQMCIGQNPJG-UHFFFAOYSA-N 0.000 description 2
- 229940098221 silver cyanide Drugs 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Gas-Filled Discharge Tubes (AREA)
Abstract
Description
본 발명은 표시소자의 금속전극 형성방법에 관한 것으로, 특히 대화면 디스플레이의 금속전극을 도금액의 농도나 시간에 의한 제약없이 형성할 수 있는 표시소자의 금속전극 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a metal electrode of a display element, and more particularly, to a method of forming a metal electrode of a display element in which the metal electrode of a large-screen display can be formed without limitation by the concentration or time of the plating liquid.
도1a 내지 도1d는 종래 스퍼터링법을 이용한 금속전극 제조공정 수순단면도로서, 이에 도시한 바와 같이 유리기판(11)의 상부에 시드금속층(12)을 증착하는 단계(도1a)와; 상기 시드금속층(12)의 상부에 금속을 스퍼터링증착하여 그 시드금속층(12)의 상부전면에 위치하는 금속전극층(13)을 형성하는 단계(도1b)와; 상기 금속전극층(13)의 상부전면에 감광성수지(14)를 도포하고, 노광 및 현상하여 상기 금속전극층(13)의 상부일부에만 위치하는 패턴을 형성하는 단계(도1c)와; 상기 감광성 수지(14) 패턴을 식각마스크로 사용하는 식각공정으로 상기 금속전극층(13)과 그 하부의 시드금속층(12)을 패터닝하여 금속전극을 형성하고, 상기 감광성 수지(14)를 제거하는 단계(도1d)로 구성된다.1A to 1D are cross-sectional views of a metal electrode manufacturing process using a conventional sputtering method, as shown in the steps of depositing a seed metal layer 12 on the glass substrate 11 (FIG. 1A); Sputter depositing and depositing a metal on top of the seed metal layer 12 to form a metal electrode layer 13 located on the top surface of the seed metal layer 12 (FIG. 1B); Applying a photosensitive resin (14) to the upper surface of the metal electrode layer (13), exposing and developing to form a pattern located only on a part of the upper portion of the metal electrode layer (13); Forming a metal electrode by patterning the metal electrode layer 13 and the seed metal layer 12 thereunder in an etching process using the photosensitive resin 14 pattern as an etching mask, and removing the photosensitive resin 14 It consists of (FIG. 1D).
이하, 상기와 같은 종래 스퍼터링법을 이용한 금속전극 제조방법을 좀 더 상세히 설명한다.Hereinafter, the metal electrode manufacturing method using the conventional sputtering method as described above will be described in more detail.
먼저, 도1a에 도시한 바와 같이 유리기판(11)의 상부전면에 금속전극과 유리기판(11)의 접착성 및 금속전극의 증착속도를 향상시키기 위해 진공증착법을 이용하여 시드금속층(12)을 증착한다.First, as shown in FIG. 1A, the seed metal layer 12 is formed by using a vacuum deposition method to improve the adhesion between the metal electrode and the glass substrate 11 and the deposition rate of the metal electrode on the upper surface of the glass substrate 11. Deposit.
그 다음, 도1b에 도시한 바와 같이 스퍼터링법으로 그 두께가 수㎛에 달하는 금속전극층(13)을 스퍼터링법으로 증착하여 상기 시드금속층(12)의 상부전면에 위치시킨다.Next, as shown in FIG. 1B, a metal electrode layer 13 having a thickness of several micrometers is deposited by sputtering and placed on the top surface of the seed metal layer 12 by sputtering.
이때, 스퍼터링법을 이용하여 금속전극층(13)을 형성하는 과정은 그 증착속도가 느려 시간의 소요가 많으며, 얻어진 막의 스트레스 제어가 용이하지 않은 단점이 있다.At this time, the process of forming the metal electrode layer 13 by the sputtering method takes a long time because the deposition rate is slow, there is a disadvantage that the stress control of the obtained film is not easy.
그 다음, 도1c에 도시한 바와 같이 상기 금속전극층(13)의 상부전면에 감광성 수지(14)를 도포하고, 노광 및 현상하여 상기 금속전극층(13)의 상부일부에만 위치하는 패턴을 형성한다.Next, as shown in FIG. 1C, the photosensitive resin 14 is coated on the upper surface of the metal electrode layer 13, and exposed and developed to form a pattern positioned only on a part of the upper portion of the metal electrode layer 13.
그 다음, 도1d에 도시한 바와 같이 상기 감광성 수지(14) 패턴을 식각마스크로 사용하는 식각공정으로 상기 노출된 금속전극층(13)과 그 하부의 시드금속층(12)을 식각하고, 상기 감광성 수지(14) 패턴을 제거하여 금속전극을 형성하게 된다.Next, as illustrated in FIG. 1D, the exposed metal electrode layer 13 and the seed metal layer 12 below are etched by an etching process using the photosensitive resin 14 pattern as an etching mask, and the photosensitive resin is etched. (14) A metal electrode is formed by removing the pattern.
상기한 바와 같이 스퍼터링법을 이용하여 금속전극을 형성하는 방법은 스퍼터링법의 특성상 두꺼운 금속전극을 형성하는데 시간이 지연되며, 식각공정을 사용하여 식각에 의한 손실이 많은 문제점이 있다.As described above, the method of forming the metal electrode using the sputtering method is delayed in forming a thick metal electrode due to the characteristics of the sputtering method, and there is a problem in that the loss due to etching is large using the etching process.
도2a 내지 도2c는 스크린 인쇄법을 이용한 종래 금속전극 제조공정 수순단면도로서, 이에 도시한 바와 같이 유리기판(21)의 상부에 인쇄마스크(22)를 실장하고, 그 인쇄마스크(22)의 상부측에 전극형성용 페이스트(23)를 도포하는 단계(도2a)와; 상기 인쇄마스크(22)를 제거하여 상기 유리기판(21)의 상부일부에전극형성용 페이스트(23)을 잔존시키는 단계(도2b)와; 상기 전극형성용 페이스트(23)를 소성하여 금속전극(24)을 형성하는 단계(도2c)로 구성된다.2A through 2C are cross-sectional views of a conventional metal electrode manufacturing process using a screen printing method, in which a printing mask 22 is mounted on an upper portion of a glass substrate 21, and an upper portion of the printing mask 22 is shown. Applying an electrode forming paste 23 to the side (FIG. 2A); Removing the printing mask 22 and leaving an electrode forming paste 23 on an upper portion of the glass substrate 21 (FIG. 2B); The electrode forming paste 23 is fired to form a metal electrode 24 (FIG. 2C).
이하, 상기와 같이 구성된 종래 스크린 인쇄법을 이용한 금속전극 제조방법을 좀 더 상세히 설명한다.Hereinafter, the metal electrode manufacturing method using the conventional screen printing method configured as described above will be described in more detail.
먼저, 도2a에 도시한 바와 같이 유리기판(21)의 상부에 일부에 천공이 형성된 인쇄마스크(22)를 실장하고, 그 상부에 금속이 포함된 페이스트(23)를 도포하여, 상기 인쇄마스크(22)의 천공부분을 통해 페이스트(23)가 일정한 두께로 상기 유리기판(21)의 상부에 도포되도록 한다.First, as shown in FIG. 2A, a printing mask 22 having a perforation formed on a portion of the glass substrate 21 is mounted, and a paste 23 containing metal is applied on the upper portion of the glass substrate 21 to form the printing mask ( Through the perforated portion 22, the paste 23 is applied to the upper portion of the glass substrate 21 to a predetermined thickness.
그 다음, 도2b에 도시한 바와 같이 상기 인쇄마스크(22)를 제거하여, 상기 유리기판(21)의 상부일부에 페이스트(23)가 잔존하도록 한다.Next, as shown in FIG. 2B, the printing mask 22 is removed to allow the paste 23 to remain on an upper portion of the glass substrate 21.
그 다음, 도2c에 도시한 바와 같이 특정한 소결온도에서 상기 잔존하는 페이스트(23)를 소성하여 금속전극(24)을 형성한다.Then, as shown in FIG. 2C, the remaining paste 23 is fired at a specific sintering temperature to form a metal electrode 24. As shown in FIG.
이와 같이 스크린 인쇄법을 사용하여 금속전극을 형성하는 방법은 높은 소결온도의 사용으로 에너지 비용이 증가하는 문제점과 아울러 페이스트 패턴을 소결하여 그 페이스트 패턴이 수축되어, 인쇄마스크(22) 패턴과 금속전극의 크기가 다른 문제점이 있었다.As described above, the method of forming the metal electrode using the screen printing method has a problem that the energy cost increases due to the use of a high sintering temperature, and the paste pattern is sintered by sintering the paste pattern so that the printing mask 22 pattern and the metal electrode are contracted. There was a different size problem.
또한, 페이스트 형성을 위해 첨가되는 유기 바인더나 유리기판(21)과의 접착성을 향상시키는 첨가제의 함유에 의해 그 비저항이 높아지는 문제점이 있었다.In addition, there is a problem in that the specific resistance increases due to the inclusion of an additive which improves adhesion with the organic binder or the glass substrate 21 added for forming the paste.
도3a 및 도3d는 도금법을 이용한 종래 금속전극 제조공정 수순단면도로서, 이에 도시한 바와 같이 유리기판(31)의 상부전면에 시드금속층(32)을 증착하는 단계(도3a)와; 상기 시드금속층(32)의 상부전면에 감광성 수지(33)를 도포하고, 노광 및 현상하여 상기 시드금속층(32)의 상부일부를 노출시키는 패턴을 형성하는 단계(도3b)와; 상기 노출된 시드금속층(32)의 상부에 금속을 도금하여 금속전극층(34)을 형성하는 단계(도3c)와; 상기 감광성 수지(33)를 제거하고, 그 감광성 수지(33)의 하부에 위치하는 시드금속층(32)을 제거하여 금속전극(34)을 형성하는 단계(도3d)로 구성된다.3A and 3D are cross-sectional views of a conventional metal electrode manufacturing process using a plating method, as shown in this step, depositing the seed metal layer 32 on the upper surface of the glass substrate 31 (FIG. 3A); Applying a photosensitive resin (33) to the upper surface of the seed metal layer (32), exposing and developing to form a pattern for exposing a portion of the upper part of the seed metal layer (32); Forming a metal electrode layer 34 by plating a metal on the exposed seed metal layer 32 (FIG. 3C); The photosensitive resin 33 is removed, and the seed metal layer 32 positioned below the photosensitive resin 33 is removed to form the metal electrode 34 (FIG. 3D).
이하, 상기와 같이 구성된 종래 도금법을 이용한 플라즈마 디스플레이 패널의 금속전극 제조방법을 좀 더 상세히 설명한다.Hereinafter, the metal electrode manufacturing method of the plasma display panel using the conventional plating method configured as described above will be described in more detail.
먼저, 도3a에 도시한 바와 같이 유리기판(31)의 상부전면에 시드금속층(32)을 증착한다.First, as illustrated in FIG. 3A, the seed metal layer 32 is deposited on the upper surface of the glass substrate 31.
그 다음, 도3b에 도시한 바와 같이 상기 시드금속층(32)의 상부전면에 감광성 수지(33)를 도포하고, 노광 및 패터닝하여 금속전극이 형성될 위치의 시드금속층(32)을 노출시킨다.Next, as shown in FIG. 3B, the photosensitive resin 33 is coated on the top surface of the seed metal layer 32, and the light is exposed and patterned to expose the seed metal layer 32 at the position where the metal electrode is to be formed.
그 다음. 도3c에 도시한 바와 같이 전기도금법 또는 무전해도금법을 이용하여 금속을 도금하여, 상기 노출된 시드금속층(32)의 상부에 위치하는 금속전극(34)을 형성한다.next. As shown in FIG. 3C, the metal is plated by using an electroplating method or an electroless plating method to form a metal electrode 34 positioned on the exposed seed metal layer 32.
이와 같이 도금법으로 형성되는 금속전극층(34)은 순수한 금속만으로 이루어지기 때문에 높은 전기전도도를 갖게 되며, 원하는 부분에만 금속전극을 형성할 수 있다는 장점이 있다.Since the metal electrode layer 34 formed by the plating method is made of pure metal only, it has high electrical conductivity, and there is an advantage in that the metal electrode can be formed only at a desired portion.
그러나, 감광성 수지(33)를 사용하여 도금액의 선택이나 운전조건 등에 제약이 가해진다. 즉, 금속전극층(34)을 구리로 제조하는 경우, 산성 또는 중성의 도금액이 존재하므로 문제가 없지만 구리는 유전체와 접촉되어 있는 경우 유전체의 소성공정에서 그 유전체와 반응을 일으켜 산화되기 때문에 반드시 보호층을 사용해야 하며, 금속전극층(34)의 재료로 은을 사용하는 경우에는 유전체와 반응하지 않기 때문에 보호층은 필요 없으나, 염기성의 시안화은 용액을 사용하기 때문에 도금액의 농도나 도금 시간 등에 제약을 받는다.However, the photosensitive resin 33 is used to place restrictions on the choice of plating solution, operating conditions, and the like. That is, when the metal electrode layer 34 is made of copper, there is no problem because an acidic or neutral plating solution is present. In the case of using silver as the material of the metal electrode layer 34, the protective layer is not necessary because it does not react with the dielectric. However, since the basic silver cyanide solution is used, the concentration of the plating solution and the plating time are limited.
그 다음, 도3d에 도시한 바와 같이 상기 감광성 수지(33) 패턴을 제거하고, 그 감광성 수지(33) 패턴의 하부에 위치한 시드금속층(32)을 제거하여, 상기 유리기판(31)의 상부에 금속전극층(34)을 형성한다.Next, as shown in FIG. 3D, the photosensitive resin 33 pattern is removed, and the seed metal layer 32 positioned below the photosensitive resin 33 pattern is removed, and the upper portion of the glass substrate 31 is removed. The metal electrode layer 34 is formed.
상기한 바와 같이 종래 표시소자의 금속전극 형성방법은 스퍼터링법을 이용할때, 의 특성상 두꺼운 금속전극을 형성하는데 시간이 지연되며, 식각공정을 사용하여 식각에 의한 손실이 많은 문제점이 있었으며, 스크린 인쇄법을 사용하여 금속전극을 형성하는 방법은 높은 소결온도의 사용으로 에너지 비용이 증가하는 문제점과 아울러 페이스트 패턴을 소결하여 그 페이스트 패턴이 수축되어, 인쇄마스크 패턴과 금속전극의 크기가 다른 문제점이 있었다. 이와 같은 문제점을 해결하기 위해 사용하는 도금법을 이용한 금속전극 형성방법은 금속전극을 구리로 제조하는 경우, 산성 또는 중성의 도금액이 존재하므로 문제가 없지만 구리는 유전체와 접촉되어 있는 경우 유전체의 소성공정에서 그 유전체와 반응을 일으켜 산화되기 때문에 반드시 보호층을 사용해야 하며, 금속전극층의 재료로 은을 사용하는 경우에는 유전체와 반응하지 않기 때문에 보호층은 필요 없으나, 염기성의 시안화은 용액을 사용하기 때문에 도금액의 농도나 도금 시간 등에 제약을 받는 문제점이 있었다.As described above, in the method of forming a metal electrode of the conventional display device, when the sputtering method is used, a time is delayed in forming a thick metal electrode due to the characteristics of, and there is a problem of a lot of loss due to etching using an etching process. In the method of forming a metal electrode using a high sintering temperature, the energy cost increases, and the paste pattern is sintered by shrinking the paste pattern, thereby causing a problem in that the size of the printed mask pattern and the metal electrode are different. The metal electrode formation method using the plating method used to solve this problem is not a problem when the metal electrode is made of copper, since the acid or neutral plating solution is present, but the copper is in contact with the dielectric during the firing process of the dielectric The protective layer must be used because it reacts with the dielectric and is oxidized. If silver is used as the material of the metal electrode layer, the protective layer is not necessary because it does not react with the dielectric, but the concentration of the plating solution is used because a basic silver cyanide solution is used. There was a problem of being restricted by the plating time and the like.
이와 같은 문제점을 감안한 본 발명은 도금액의 농도나 도금 시간 등에 제약을 받지않는 은을 이용한 표시소자의 금속전극 형성방법을 제공함에 그 목적이 있다.In view of the above problems, an object of the present invention is to provide a method for forming a metal electrode of a display device using silver, which is not limited by the concentration of the plating solution, the plating time, or the like.
도1a 내지 도1d는 종래 표시소자의 금속전극 제조공정의 일실시 수순단면도.1A to 1D are cross-sectional views of one embodiment of a metal electrode manufacturing process of a conventional display device.
도2a 내지 도2c는 종래 표시소자의 금속전극 제조공정의 다른 실시 수순단면도.2A to 2C are cross-sectional views of another embodiment of a metal electrode manufacturing process of a conventional display device.
도3a 내지 도3d는 종래 표시소자의 금속전극 제조공정의 다른 실시 수순단면도.3A to 3D are cross-sectional views of another embodiment of a metal electrode manufacturing process of a conventional display device.
도4a 내지 도4d는 본 발명 표시소자의 금속전극 제조공정 수순단면도.4A to 4D are cross-sectional views of a metal electrode manufacturing process of the display device according to the present invention.
*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
41:유리기판42:시드금속층41: glass substrate 42: seed metal layer
43:감광성 수지 패턴44:금속전극43: photosensitive resin pattern 44: metal electrode
상기와 같은 목적은 유리기판의 상부전면에 시드금속층을 형성하는 단계와; 상기 구조의 상부전면에 감광성수지를 도포하고, 노광 및 현상하여 금속전극을 형성할 위치에 감광성 수지 패턴을 형성한 후, 그 감광성 수지 패턴을 식각마스크로 사용하는 식각공정으로 상기 시드금속층을 패터닝하는 단계와; 상기 감광성 수지 패턴을 제거하는 단계와; 전기도금법 또는 무전해도금법을 사용하여 은을 석출시켜 상기 잔존하는 시드금속층의 상부에 금속전극을 형성하는 단계로 구성함으로써 달성되는 것으로, 이와 같은 본 발명을 첨부한 도면을 참조하여 상세히 설명하면 다음과 같다.The above object is to form a seed metal layer on the upper surface of the glass substrate; The photosensitive resin is coated on the upper surface of the structure, exposed and developed to form a photosensitive resin pattern at a position where a metal electrode is to be formed, and then the seed metal layer is patterned by an etching process using the photosensitive resin pattern as an etching mask. Steps; Removing the photosensitive resin pattern; It is achieved by forming a metal electrode on the remaining seed metal layer by depositing silver using an electroplating method or an electroless plating method, which will be described in detail with reference to the accompanying drawings. same.
도4a 내지 도4d는 본 발명 표시소자의 금속전극 형성공정 수순단면도로서, 이에 도시한 바와 같이 유리기판(41)의 상부전면에 시드금속층(42)을 형성하는 단계(도4a)와; 상기 구조의 상부전면에 감광성수지를 도포하고, 노광 및 현상하여 금속전극을 형성할 위치에 감광성 수지 패턴(43)을 형성한 후, 그 감광성 수지 패턴(43)을 식각마스크로 사용하는 식각공정으로 상기 시드금속층(42)을 패터닝하는 단계(도4b)와; 상기 감광성 수지 패턴(43)을 제거하는 단계(도4c)와; 전기도금법 또는 무전해도금법을 사용하여 은을 석출시켜 상기 잔존하는 시드금속층(42)의 상부에 금속전극(44)을 형성하는 단계(도4d)로 구성된다.4A to 4D are cross-sectional views of a metal electrode forming process of the display device according to the present invention, as shown therein, forming a seed metal layer 42 on the upper surface of the glass substrate 41 (FIG. 4A); After the photosensitive resin is coated on the upper surface of the structure, the photosensitive resin pattern 43 is formed at the position where the metal electrode is formed by exposure and development, and then the photosensitive resin pattern 43 is used as an etching mask. Patterning the seed metal layer 42 (FIG. 4B); Removing the photosensitive resin pattern 43 (FIG. 4C); Precipitating silver using an electroplating method or an electroless plating method to form a metal electrode 44 on the remaining seed metal layer 42 (FIG. 4D).
이하, 상기와 같이 구성된 본 발명 표시소자의 금속전극 형성방법을 좀 더 상세히 설명하면 다음과 같다.Hereinafter, the metal electrode forming method of the display device of the present invention configured as described above will be described in more detail.
먼저, 도4a에 도시한 바와 같이 유리기판(41)의 상부에 스퍼터링법 또는 이온플레이팅(ION PLATING)법 또는 전자빔 증착법을 이용하여 시드금속층(42)을 형성한다. 이때의 시드금속층(42)은 Cr 또는 Ti 중 하나 또는 이들의 합금이나 산화물을 증착하여 하층을 형성하고, 그 상부에 다시 Cu, Ni, Au 중 선택된 하나를 증착하여 상층을 형성하여 이중층으로 형성한다.First, as shown in FIG. 4A, the seed metal layer 42 is formed on the glass substrate 41 by sputtering, ion plating, or electron beam deposition. At this time, the seed metal layer 42 is formed of a lower layer by depositing one of Cr or Ti, or an alloy or oxide thereof, and depositing one selected from Cu, Ni, and Au on top of the seed metal layer 42 to form a double layer. .
그 다음, 도4b에 도시한 바와 같이 상기 구조의 상부전면에 감광성 수지를 도포하고, 노광 및 현상하여 금속전극이 형성될 위치에만 상기 감광성 수지가 잔존하는 감광성 수지 패턴(43)을 형성한다.Then, as shown in FIG. 4B, a photosensitive resin is applied to the upper front surface of the structure, and exposed and developed to form a photosensitive resin pattern 43 in which the photosensitive resin remains only at the position where the metal electrode is to be formed.
이때, 감광성 수지 패턴(43)을 형성할때, 대면적의 표시소자를 형성하기 위해서 두께가 균일한 감광성 수지 패턴이 요구되며, 이러한 균일한 패턴을 형성하기 위해서는 기 재작된 감광성 수지 필름을 사용하는 것이 바람직하다.At this time, when the photosensitive resin pattern 43 is formed, a photosensitive resin pattern having a uniform thickness is required to form a display device having a large area, and in order to form such a uniform pattern, a previously prepared photosensitive resin film is used. It is preferable.
그 다음, 상기 감광성 수지 패턴(43)을 식각마스크로 사용하는 식각공정으로 상기 노출된 시드금속층(42)을 식각한다.Next, the exposed seed metal layer 42 is etched by an etching process using the photosensitive resin pattern 43 as an etching mask.
그 다음, 도4c에 도시한 바와 같이 상기 감광성 수지 패턴(43)을 제거하여 금속전극을 형성할 위치에만 상기 시드금속층(42)을 위치시킨다.Next, as shown in FIG. 4C, the seed metal layer 42 is positioned only at the position where the photosensitive resin pattern 43 is removed to form a metal electrode.
그 다음, 도4d에 도시한 바와 같이 상기 노출된 상기 시드금속층(42) 패턴의상부에 전기도금법 또는 무전해 도금법을 이용하여 은도금액으로부터 은을 석출시켜, 금속전극(44)을 형성한다.Next, as shown in FIG. 4D, silver is deposited from the silver plating solution on the exposed pattern of the seed metal layer 42 by using an electroplating method or an electroless plating method to form the metal electrode 44.
이때 금속전극(44)을 은으로 형성하면, 상기 설명한 바와 같이 이후의 공정에서 형성하는 유전막과의 반응이 적어 보호층을 따로 설치하는 공정을 생략할 수 있으며, 사용하는 은도금액의 산도가 알칼리성이기 때문에 감광성 수지의 상부측에 형성할 경우 그 도금액의 농도나 조업시간에 제약을 받는 문제점을 해결할 수 있게 된다.In this case, when the metal electrode 44 is formed of silver, as described above, the reaction with the dielectric film formed in the subsequent process may be less, and thus the process of separately installing the protective layer may be omitted, and the acidity of the silver plating solution used may be alkaline. Therefore, when formed on the upper side of the photosensitive resin, it is possible to solve the problem of being limited by the concentration or operating time of the plating liquid.
상기한 바와 같이 본 발명은 감광성 수지패턴을 이용하여 금속전극 하부에 시드 금속층을 형성하고, 그 감광성 수지패턴을 제거한 후, 은을 도금하여 금속전극을 형성함으로써, 종래와 같이 감광성 수지패턴이 잔존하는 가운데 은을 도금할때의 문제점인 도금액의 농도와 조업시간에 제약을 받는 문제점을 해소할 수 있게 된다. 즉, 도금액이 농도와 조업시간에 무관한 금속전극을 형성하는 효과가 있다.As described above, the present invention forms a seed metal layer under the metal electrode by using the photosensitive resin pattern, removes the photosensitive resin pattern, and forms a metal electrode by plating silver, whereby the photosensitive resin pattern remains. The problem of being constrained by the concentration and operating time of the plating solution, which is a problem when plating the middle silver, can be solved. That is, the plating liquid has an effect of forming a metal electrode irrespective of concentration and operating time.
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