KR20020039463A - Method for manufacturing thin film transistor of liquid crystal display device - Google Patents

Abstract

PURPOSE: A method of fabricating a thin film transistor of a liquid crystal display is provided to produce a thin film transistor having stable and good electrical characteristics and simple structure. CONSTITUTION: A method of fabricating a thin film transistor of a liquid crystal display includes the first, second and third mask steps. In the first mask step, a pixel electrode(12), a data line(14) and N+ amorphous silicon layer(16) are sequentially formed on a glass substrate(10) and patterned. In the second mask step, an amorphous silicon layer(18), a gate insulating layer(20), and a gate electrode are sequentially formed on the structure obtained by the first mask step. In the third mask step, a protection layer(24) and storage and common electrodes are formed on the structure obtained by the second mask step.

Description

Manufacturing method of thin film transistor of liquid crystal display device {METHOD FOR MANUFACTURING THIN FILM TRANSISTOR OF LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a method for manufacturing a thin film transistor of a liquid crystal display device, and more particularly, to have a top-gate structure having a relatively simple structure and stable and excellent electrical characteristics while eliminating back channel damage. A method of manufacturing a thin film transistor of a liquid crystal display device applying a mask process.

Currently, a liquid crystal display device, which is attracting attention as a flat panel display, includes a first substrate on which a thin film transistor (TFT) for driving a corresponding pixel is formed in an array, and a color filter in which R / G / B color pixels are formed. The liquid crystal which transmits / blocks light by changing the arrangement direction of the liquid crystal in accordance with the second substrate serving as the substrate and the graphic data signal injected between the first and second substrates and applied to the corresponding TFT elements in the TFT array. It is made of cells.

According to an exemplary process for forming such a TFT element, a gate mask process of forming a gate electrode by laminating a gate metal on a glass substrate as a first substrate and then etching by applying a gate mask having a pattern of a gate electrode; An active mask process for forming an active layer by forming an insulating layer on the gate electrode and then forming an active layer, and then forming an active layer by applying an active mask, and forming a source / drain metal layer on the structure where the active layer is formed; A S / D mask process for patterning the source / drain metal layer using a source / drain (S / D) mask to form a source / drain electrode, and a passivation layer on the entire structure including the source / drain metal. ) And through hole forming mask process for forming through holes in the protective layer Lamination film pixel ITO (Indium Tin Oxide) for forming the electrodes and by using the ITO pixel mask is produced through the ITO pixel mask process for patterning an ITO film that pixel.

Here, in the case of manufacturing the TFT device by the 5-mask process described above, considering that there is a high possibility that the yield decreases due to the increase in manufacturing cost and the complexity of the process, the TFT device (or TFT array) has recently been developed. Efforts have been made to shorten the manufacturing process.

However, when the conventional method is applied to reduce the number of mask processes, the lower layer of the wafer may be undesirably attacked by dry etching or wet etching, and it is impossible to shorten the process to 3-mask in the BCE type. .

In addition, it is assumed that the back channel damage is severe and thus exhibits a degraded electrical characteristic such as leakage current generated at the same time as shortening of the mask process.

Accordingly, the present invention has been made in view of the above-described prior art, and utilizes the three-mask process by making the most of the selectivity of dry and wet etching of each layer forming the TFT device in the manufacturing process of the TFT device. It is an object of the present invention to provide a method of manufacturing a thin film transistor of a liquid crystal display device having a relatively simple structure and eliminating back channel damage, which is stable and has good electrical characteristics.

1A to 1C are views for explaining a first process of a method of manufacturing a thin film transistor of a liquid crystal display according to an embodiment of the present invention;

2A to 2C are views for explaining a second process of a method of manufacturing a thin film transistor of a liquid crystal display according to the present invention;

3A to 3C are views for explaining a third step of a method of manufacturing a thin film transistor of a liquid crystal display according to the present invention;

4A and 4B are views illustrating shapes of a gate pad part and a data pad part in a method of manufacturing a thin film transistor of a liquid crystal display according to the present invention;

5A and 5B illustrate a method of manufacturing a thin film transistor of a liquid crystal display according to another exemplary embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

10: glass substrate, 12: pixel electrode,

14: source / drain (data wiring), 20: gate insulating layer,

24: protective layer, 26: storage and common electrode,

30: Shading film.

According to a preferred embodiment of the present invention, a first mask process for depositing and defining a pixel electrode, a data wiring (S / D), and an n + a-Si layer on a glass substrate in order to achieve the above object; A second mask process of depositing an a-Si layer, a gate insulating layer, and a gate electrode in order on the resulting structure of the first mask process; There is provided a method of manufacturing a thin film transistor of a liquid crystal display device, comprising a third mask process of depositing a protective layer on the structure of the second mask process, and forming a storage and a common electrode.

According to the present invention, in the first mask process, the source / drain is formed of MoW, and the n + a-Si layer and the source / drain are defined by 1-step dry etching, and the dry etching includes SF6 gas. Used.

The pixel electrode is formed to have redundancy under the data line (source / drain).

In the second mask process, the a-Si layer and the gate electrode are simultaneously defined, in which case the gate electrode is formed of MoW, and the a-Si layer and the gate electrode are simultaneously defined by dry etching with SF6 source gas. do.

Preferably, the gate electrode is formed of MoW and the source / drain (data wiring) is formed of AlNd, and dry etching the gate electrode, the gate insulator, the a-Si layer, and the n + a-Si layer simultaneously with SF6 gas. Is defined by

The gate electrode is formed of AlNd, the source / drain is formed of MoW, and the gate electrode and the active layer (gate insulating layer, a-Si layer, n + a-Si layer) are H3PO4 / CH3COOH / HNO3, BOE. 2-step wet etching is performed by the system etchant.

In the third mask process, the source / drain is formed of MoW, and the protective layer of the pad portion, the protective layer of the pixel portion, and the source / drain are simultaneously subjected to one-step etching using SF6 gas as the source gas.

According to the present invention, a mask process for forming the light shielding film is further included.

According to the method of manufacturing a thin film transistor of the liquid crystal display device according to the present invention, in the first mask process, the pixel electrode, the data wiring (S / D), and the n + a-Si layer are sequentially deposited and defined on the glass substrate, In the second mask process, the a-Si layer, the gate insulating layer, and the gate electrode are deposited in order. In the third mask process, the selectivity of etching is performed by a 3-mask process in which a protective layer is deposited, and a storage and a common electrode are formed. By using the thin film transistor of the liquid crystal display device is manufactured.

Hereinafter, with reference to the accompanying drawings, the present invention will be described in detail.

According to the present invention, the data line and the gate line in the manufacturing process of the TFT element may be in the form of etching (ie dry etching or wet etching) or source gas (dry etching) or etching agent (wet) applied during the etching. The electrode material can be determined according to the etching), and the present invention can be applied to any metal in consideration of the electrical characteristics and the etching characteristics of the electrode.

From such a situation, in the present invention, a process using AlNd (a gate electrode application) and a conventional electrode material MoW (data line application), which is noted as a new low resistance wiring electrode material that hardly causes defects such as hillocks, are used. An example will be described.

First, a pixel electrode / drain wiring (source / drain) is defined in the first mask process illustrated in FIGS. 1A, 1B, and 1C in a structure in which a light blocking film is not formed.

That is, after the pixel electrode 12 is formed by stacking ITO on the front surface of the glass substrate 10, the source / drain 16 and the n + a-Si layer 14 are sequentially deposited and then photolithography. Defined through process and etching process. Here, if MoW is used as the S / D electrode 14 material, the n + a-Si layer and the source / drain can be subjected to one-step dry etching (SF6 gas).

Further, in the above structure, as the pixel electrode 12 is formed under the redundancy of the data line S / D 16, data open due to various defects including poor patterning is performed. open) can be reduced.

In the second mask process shown in FIGS. 2A, 2B, and 2C, an active a-Si layer 18, a gate insulating layer 20, and a gate electrode (gate wiring) 22 are sequentially deposited, followed by a photolithography process. By the etching process, the gate electrode 22 is simultaneously defined from the active a-Si layer 18.

For example, when MoW is used as the gate electrode, the etching process can be dry etched with SF6 source gas, and in some cases, the active a-Si layer 18 can also be BOE wet etched. In addition, it is possible to determine the etching type in consideration of the selectivity and the process margin depending on the situation. For example, in the case of using MoW as the gate electrode 22 and AlNd as the source / drain 14, the above-described process is performed. Dry etching can be simultaneously performed on the gate electrode 22 and the gate insulating layer 20, the active a-Si layer 18, and the n + a-Si layer 16 by SF6 gas. Since AlNd is not affected by SF6, it is possible to proceed with this process using good process selectivity.

On the other hand, when AlNd is used to form the gate electrode 22 and MoW is used for the source / drain 14, the gate electrode 22 and the active layer (ie, the gate insulating layer 20 and a) are used. -Si layer 18 and n + a-Si layer 16 are 2-step wet-etched with H3PO4 / CH3COOH / HNO3 and BOE etchant respectively to secure process conditions that do not adversely affect the underlying layer source / drain (MoW). Becomes possible.

Thereafter, in the third mask process illustrated in FIGS. 3A, 3B, and 3C, the deposition of the protective layer and the opening of the pad portion and the pixel electrode region are performed. That is, after the protective layer 24 is laminated to the structure obtained by the above-described process, the photolithography and etching processes are performed to open the pad portion and the pixel electrode region. The protective layer 24 is used to open the pad portion. ), The protective layer 24 and the data wiring (source / drain) 14 must be etched to open the pixel electrode 12 (see FIGS. 4A and 4B).

For example, in the case where the source / drain 14 is formed of MoW, the etching process is performed by dry etching using SF6 gas as the source gas, and the protective layer 24 and the source / drain 14 (MoW) of the pixel part by dry etching. It is effective to etch one step at a time. In that case, the MoW of the data pad is dry etched by the SF6-based gas, while the AlNd of the gate pad is not adversely affected.

3A, reference numeral 26 denotes a storage and a common electrode Cst.

Meanwhile, FIGS. 5A and 5B show a structure in which a light shielding film is added to reduce photo current in the 3-mask process according to the present invention, and when the light shielding film is added, the light shielding film 30 in the 3-mask process. A mask process for patterning of the wafer is additionally performed by a four-mask process.

On the other hand, the present invention is not limited to the above examples and various changes and modifications can be made within the scope not departing from the technical gist and gist of the invention.

As described above, according to the method of manufacturing a thin film transistor of the liquid crystal display device according to the present invention, the process can be manufactured by a three-mask process, thereby simplifying the process and increasing the mass productivity. Compared to the half-tone mask process, the process stability is higher and the process is possible by a simple design change, and the structure without the back channel damage enables TFT devices having excellent electrical characteristics.

Claims (9)

A first mask process of depositing and defining pixel electrodes, data wirings (S / D), and n + a-Si layers in order on a glass substrate; A second mask process of depositing an a-Si layer, a gate insulating layer, and a gate electrode in order on the resulting structure of the first mask process; And a third mask process of depositing a protective layer on the structure of the second mask process, and forming a storage and a common electrode. The method of claim 1, wherein in the first mask process, the source / drain is formed of MoW, and the n + a-Si layer and the source / drain are defined by 1-step dry etching, and the dry etching includes SF6 gas. The thin film transistor manufacturing method of the liquid crystal display device characterized in that it is used. 2. The method of claim 1, wherein the pixel electrode is formed under the data line (source / drain) to have redundancy. The method of claim 1, wherein the a-Si layer and the gate electrode are simultaneously defined in the second mask process. The method of claim 4, wherein the gate electrode is formed of MoW, and the a-Si layer and the gate electrode are simultaneously defined by dry etching with an SF6 source gas. 5. The method of claim 4, wherein the gate electrode is formed of MoW and the source / drain (data wiring) is formed of AlNd, and the gate electrode, the gate insulator, the a-Si layer, and the n + a-Si layer are simultaneously made of SF6 gas. A thin film transistor manufacturing method of a liquid crystal display device, characterized in that defined by dry etching. 7. The gate electrode of claim 6, wherein the gate electrode is formed of AlNd, the source / drain is formed of MoW, and the gate electrode and the active layer (gate insulating layer, a-Si layer, n + a-Si layer) are H3PO4 / CH3COOH. 2. A method for manufacturing a thin film transistor of a liquid crystal display device, characterized in that it is two-step wet etching with / HNO3 and a BOE etchant. The method of claim 1, wherein the source / drain is formed of MoW in the third mask process, and the protective layer of the pad portion, the protective layer of the pixel portion, and the source / drain are simultaneously subjected to dry etching with SF6 gas as the source gas. A thin film transistor manufacturing method of a liquid crystal display device, characterized in that for etching. The method of manufacturing a thin film transistor of a liquid crystal display device according to claim 1, further comprising a mask process for forming a light shielding film.